From: Mike Frysinger Date: Mon, 26 Dec 2022 03:59:01 +0000 (-0500) Subject: sim: avr: move libsim.a creation to top-level X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c65b31b8681703fb1494b10110910f71ad5a7b7b;p=binutils-gdb.git sim: avr: move libsim.a creation to top-level The objects are still compiled in the subdir, but the creation of the archive itself is in the top-level. This is a required step before we can move compilation itself up, and makes it easier to review. The downside is that each object compile is a recursive make instead of a single one. On my 4 core system, it adds ~100msec to the build per port, so it's not great, but it shouldn't be a big deal. This will go away of course once the top-level compiles objects. --- diff --git a/sim/Makefile.in b/sim/Makefile.in index 2c777942e43..594430dc2c9 100644 --- a/sim/Makefile.in +++ b/sim/Makefile.in @@ -145,103 +145,104 @@ TESTS = testsuite/common/bits32m0$(EXEEXT) \ @SIM_ENABLE_ARCH_aarch64_TRUE@am__append_9 = aarch64/run @SIM_ENABLE_ARCH_arm_TRUE@am__append_10 = arm/libsim.a @SIM_ENABLE_ARCH_arm_TRUE@am__append_11 = arm/run -@SIM_ENABLE_ARCH_avr_TRUE@am__append_12 = avr/run -@SIM_ENABLE_ARCH_bfin_TRUE@am__append_13 = bfin/run -@SIM_ENABLE_ARCH_bfin_TRUE@am__append_14 = bfin_SIM_EXTRA_HW_DEVICES="$(bfin_SIM_EXTRA_HW_DEVICES)" -@SIM_ENABLE_ARCH_bpf_TRUE@am__append_15 = bpf/run -@SIM_ENABLE_ARCH_bpf_TRUE@am__append_16 = \ +@SIM_ENABLE_ARCH_avr_TRUE@am__append_12 = avr/libsim.a +@SIM_ENABLE_ARCH_avr_TRUE@am__append_13 = avr/run +@SIM_ENABLE_ARCH_bfin_TRUE@am__append_14 = bfin/run +@SIM_ENABLE_ARCH_bfin_TRUE@am__append_15 = bfin_SIM_EXTRA_HW_DEVICES="$(bfin_SIM_EXTRA_HW_DEVICES)" +@SIM_ENABLE_ARCH_bpf_TRUE@am__append_16 = bpf/run +@SIM_ENABLE_ARCH_bpf_TRUE@am__append_17 = \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/eng-le.h \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/eng-be.h -@SIM_ENABLE_ARCH_bpf_TRUE@am__append_17 = $(bpf_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_bpf_TRUE@am__append_18 = $(bpf_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_cr16_TRUE@am__append_19 = cr16/run -@SIM_ENABLE_ARCH_cr16_TRUE@am__append_20 = cr16/simops.h -@SIM_ENABLE_ARCH_cr16_TRUE@am__append_21 = $(cr16_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_cr16_TRUE@am__append_22 = cr16/gencode -@SIM_ENABLE_ARCH_cr16_TRUE@am__append_23 = $(cr16_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_cris_TRUE@am__append_24 = cris/run -@SIM_ENABLE_ARCH_cris_TRUE@am__append_25 = cris_SIM_EXTRA_HW_DEVICES="$(cris_SIM_EXTRA_HW_DEVICES)" -@SIM_ENABLE_ARCH_cris_TRUE@am__append_26 = cris/rvdummy -@SIM_ENABLE_ARCH_cris_TRUE@am__append_27 = \ +@SIM_ENABLE_ARCH_bpf_TRUE@am__append_19 = $(bpf_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_cr16_TRUE@am__append_20 = cr16/run +@SIM_ENABLE_ARCH_cr16_TRUE@am__append_21 = cr16/simops.h +@SIM_ENABLE_ARCH_cr16_TRUE@am__append_22 = $(cr16_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_cr16_TRUE@am__append_23 = cr16/gencode +@SIM_ENABLE_ARCH_cr16_TRUE@am__append_24 = $(cr16_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_cris_TRUE@am__append_25 = cris/run +@SIM_ENABLE_ARCH_cris_TRUE@am__append_26 = cris_SIM_EXTRA_HW_DEVICES="$(cris_SIM_EXTRA_HW_DEVICES)" +@SIM_ENABLE_ARCH_cris_TRUE@am__append_27 = cris/rvdummy +@SIM_ENABLE_ARCH_cris_TRUE@am__append_28 = \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/engv10.h \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/engv32.h -@SIM_ENABLE_ARCH_cris_TRUE@am__append_28 = $(cris_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_cris_TRUE@am__append_29 = $(cris_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_d10v_TRUE@am__append_30 = d10v/run -@SIM_ENABLE_ARCH_d10v_TRUE@am__append_31 = d10v/simops.h -@SIM_ENABLE_ARCH_d10v_TRUE@am__append_32 = $(d10v_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_d10v_TRUE@am__append_33 = d10v/gencode -@SIM_ENABLE_ARCH_d10v_TRUE@am__append_34 = $(d10v_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_erc32_TRUE@am__append_35 = erc32/run erc32/sis -@SIM_ENABLE_ARCH_erc32_TRUE@am__append_36 = sim-%D-install-exec-local -@SIM_ENABLE_ARCH_erc32_TRUE@am__append_37 = sim-erc32-uninstall-local -@SIM_ENABLE_ARCH_examples_TRUE@am__append_38 = example-synacor/run -@SIM_ENABLE_ARCH_frv_TRUE@am__append_39 = frv/run -@SIM_ENABLE_ARCH_frv_TRUE@am__append_40 = frv/eng.h -@SIM_ENABLE_ARCH_frv_TRUE@am__append_41 = $(frv_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_cris_TRUE@am__append_30 = $(cris_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_d10v_TRUE@am__append_31 = d10v/run +@SIM_ENABLE_ARCH_d10v_TRUE@am__append_32 = d10v/simops.h +@SIM_ENABLE_ARCH_d10v_TRUE@am__append_33 = $(d10v_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_d10v_TRUE@am__append_34 = d10v/gencode +@SIM_ENABLE_ARCH_d10v_TRUE@am__append_35 = $(d10v_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_erc32_TRUE@am__append_36 = erc32/run erc32/sis +@SIM_ENABLE_ARCH_erc32_TRUE@am__append_37 = sim-%D-install-exec-local +@SIM_ENABLE_ARCH_erc32_TRUE@am__append_38 = sim-erc32-uninstall-local +@SIM_ENABLE_ARCH_examples_TRUE@am__append_39 = example-synacor/run +@SIM_ENABLE_ARCH_frv_TRUE@am__append_40 = frv/run +@SIM_ENABLE_ARCH_frv_TRUE@am__append_41 = frv/eng.h @SIM_ENABLE_ARCH_frv_TRUE@am__append_42 = $(frv_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_ft32_TRUE@am__append_43 = ft32/run -@SIM_ENABLE_ARCH_h8300_TRUE@am__append_44 = h8300/run -@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_45 = iq2000/run -@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_46 = iq2000/eng.h -@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_47 = $(iq2000_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_frv_TRUE@am__append_43 = $(frv_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_ft32_TRUE@am__append_44 = ft32/run +@SIM_ENABLE_ARCH_h8300_TRUE@am__append_45 = h8300/run +@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_46 = iq2000/run +@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_47 = iq2000/eng.h @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_48 = $(iq2000_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_lm32_TRUE@am__append_49 = lm32/run -@SIM_ENABLE_ARCH_lm32_TRUE@am__append_50 = lm32_SIM_EXTRA_HW_DEVICES="$(lm32_SIM_EXTRA_HW_DEVICES)" -@SIM_ENABLE_ARCH_lm32_TRUE@am__append_51 = lm32/eng.h -@SIM_ENABLE_ARCH_lm32_TRUE@am__append_52 = $(lm32_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_49 = $(iq2000_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_lm32_TRUE@am__append_50 = lm32/run +@SIM_ENABLE_ARCH_lm32_TRUE@am__append_51 = lm32_SIM_EXTRA_HW_DEVICES="$(lm32_SIM_EXTRA_HW_DEVICES)" +@SIM_ENABLE_ARCH_lm32_TRUE@am__append_52 = lm32/eng.h @SIM_ENABLE_ARCH_lm32_TRUE@am__append_53 = $(lm32_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_m32c_TRUE@am__append_54 = m32c/run -@SIM_ENABLE_ARCH_m32c_TRUE@am__append_55 = $(m32c_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_m32c_TRUE@am__append_56 = m32c/opc2c -@SIM_ENABLE_ARCH_m32c_TRUE@am__append_57 = \ +@SIM_ENABLE_ARCH_lm32_TRUE@am__append_54 = $(lm32_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_m32c_TRUE@am__append_55 = m32c/run +@SIM_ENABLE_ARCH_m32c_TRUE@am__append_56 = $(m32c_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_m32c_TRUE@am__append_57 = m32c/opc2c +@SIM_ENABLE_ARCH_m32c_TRUE@am__append_58 = \ @SIM_ENABLE_ARCH_m32c_TRUE@ $(m32c_BUILD_OUTPUTS) \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/m32c.c.log \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/r8c.c.log -@SIM_ENABLE_ARCH_m32r_TRUE@am__append_58 = m32r/run -@SIM_ENABLE_ARCH_m32r_TRUE@am__append_59 = m32r_SIM_EXTRA_HW_DEVICES="$(m32r_SIM_EXTRA_HW_DEVICES)" -@SIM_ENABLE_ARCH_m32r_TRUE@am__append_60 = \ +@SIM_ENABLE_ARCH_m32r_TRUE@am__append_59 = m32r/run +@SIM_ENABLE_ARCH_m32r_TRUE@am__append_60 = m32r_SIM_EXTRA_HW_DEVICES="$(m32r_SIM_EXTRA_HW_DEVICES)" +@SIM_ENABLE_ARCH_m32r_TRUE@am__append_61 = \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/eng.h \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/engx.h \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/eng2.h -@SIM_ENABLE_ARCH_m32r_TRUE@am__append_61 = $(m32r_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_m32r_TRUE@am__append_62 = $(m32r_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_63 = m68hc11/run -@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_64 = m68hc11_SIM_EXTRA_HW_DEVICES="$(m68hc11_SIM_EXTRA_HW_DEVICES)" -@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_65 = $(m68hc11_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_66 = m68hc11/gencode -@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_67 = $(m68hc11_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_mcore_TRUE@am__append_68 = mcore/run -@SIM_ENABLE_ARCH_microblaze_TRUE@am__append_69 = microblaze/run -@SIM_ENABLE_ARCH_mips_TRUE@am__append_70 = mips/run -@SIM_ENABLE_ARCH_mips_TRUE@am__append_71 = mips_SIM_EXTRA_HW_DEVICES="$(mips_SIM_EXTRA_HW_DEVICES)" -@SIM_ENABLE_ARCH_mips_TRUE@am__append_72 = mips/itable.h \ +@SIM_ENABLE_ARCH_m32r_TRUE@am__append_63 = $(m32r_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_64 = m68hc11/run +@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_65 = m68hc11_SIM_EXTRA_HW_DEVICES="$(m68hc11_SIM_EXTRA_HW_DEVICES)" +@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_66 = $(m68hc11_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_67 = m68hc11/gencode +@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_68 = $(m68hc11_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_mcore_TRUE@am__append_69 = mcore/run +@SIM_ENABLE_ARCH_microblaze_TRUE@am__append_70 = microblaze/run +@SIM_ENABLE_ARCH_mips_TRUE@am__append_71 = mips/run +@SIM_ENABLE_ARCH_mips_TRUE@am__append_72 = mips_SIM_EXTRA_HW_DEVICES="$(mips_SIM_EXTRA_HW_DEVICES)" +@SIM_ENABLE_ARCH_mips_TRUE@am__append_73 = mips/itable.h \ @SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_MIPS_MULTI_SRC) -@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_73 = \ +@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_74 = \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE) \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/stamp-gen-mode-single -@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_74 = \ +@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_75 = \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16) \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32) \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m16 \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m32 -@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_75 = \ +@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_76 = \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ $(SIM_MIPS_MULTI_SRC) \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/stamp-gen-mode-multi-igen \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/stamp-gen-mode-multi-run -@SIM_ENABLE_ARCH_mips_TRUE@am__append_76 = $(mips_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_mips_TRUE@am__append_77 = $(mips_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_mips_TRUE@am__append_78 = mips/multi-include.h mips/multi-run.c -@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_79 = mn10300/run -@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_80 = mn10300_SIM_EXTRA_HW_DEVICES="$(mn10300_SIM_EXTRA_HW_DEVICES)" -@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_81 = \ +@SIM_ENABLE_ARCH_mips_TRUE@am__append_78 = $(mips_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_mips_TRUE@am__append_79 = mips/multi-include.h mips/multi-run.c +@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_80 = mn10300/run +@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_81 = mn10300_SIM_EXTRA_HW_DEVICES="$(mn10300_SIM_EXTRA_HW_DEVICES)" +@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_82 = \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/icache.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.h \ @@ -250,29 +251,29 @@ TESTS = testsuite/common/bits32m0$(EXEEXT) \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/engine.h -@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_82 = $(mn10300_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_83 = $(mn10300_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_moxie_TRUE@am__append_84 = moxie/run -@SIM_ENABLE_ARCH_msp430_TRUE@am__append_85 = msp430/run -@SIM_ENABLE_ARCH_or1k_TRUE@am__append_86 = or1k/run -@SIM_ENABLE_ARCH_or1k_TRUE@am__append_87 = or1k/eng.h -@SIM_ENABLE_ARCH_or1k_TRUE@am__append_88 = $(or1k_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_84 = $(mn10300_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_moxie_TRUE@am__append_85 = moxie/run +@SIM_ENABLE_ARCH_msp430_TRUE@am__append_86 = msp430/run +@SIM_ENABLE_ARCH_or1k_TRUE@am__append_87 = or1k/run +@SIM_ENABLE_ARCH_or1k_TRUE@am__append_88 = or1k/eng.h @SIM_ENABLE_ARCH_or1k_TRUE@am__append_89 = $(or1k_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_ppc_TRUE@am__append_90 = ppc/run ppc/psim -@SIM_ENABLE_ARCH_pru_TRUE@am__append_91 = pru/run -@SIM_ENABLE_ARCH_riscv_TRUE@am__append_92 = riscv/run -@SIM_ENABLE_ARCH_rl78_TRUE@am__append_93 = rl78/run -@SIM_ENABLE_ARCH_rx_TRUE@am__append_94 = rx/run -@SIM_ENABLE_ARCH_sh_TRUE@am__append_95 = sh/run -@SIM_ENABLE_ARCH_sh_TRUE@am__append_96 = \ +@SIM_ENABLE_ARCH_or1k_TRUE@am__append_90 = $(or1k_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_ppc_TRUE@am__append_91 = ppc/run ppc/psim +@SIM_ENABLE_ARCH_pru_TRUE@am__append_92 = pru/run +@SIM_ENABLE_ARCH_riscv_TRUE@am__append_93 = riscv/run +@SIM_ENABLE_ARCH_rl78_TRUE@am__append_94 = rl78/run +@SIM_ENABLE_ARCH_rx_TRUE@am__append_95 = rx/run +@SIM_ENABLE_ARCH_sh_TRUE@am__append_96 = sh/run +@SIM_ENABLE_ARCH_sh_TRUE@am__append_97 = \ @SIM_ENABLE_ARCH_sh_TRUE@ sh/code.c \ @SIM_ENABLE_ARCH_sh_TRUE@ sh/ppi.c -@SIM_ENABLE_ARCH_sh_TRUE@am__append_97 = $(sh_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_sh_TRUE@am__append_98 = sh/gencode -@SIM_ENABLE_ARCH_sh_TRUE@am__append_99 = $(sh_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_v850_TRUE@am__append_100 = v850/run -@SIM_ENABLE_ARCH_v850_TRUE@am__append_101 = \ +@SIM_ENABLE_ARCH_sh_TRUE@am__append_98 = $(sh_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_sh_TRUE@am__append_99 = sh/gencode +@SIM_ENABLE_ARCH_sh_TRUE@am__append_100 = $(sh_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_v850_TRUE@am__append_101 = v850/run +@SIM_ENABLE_ARCH_v850_TRUE@am__append_102 = \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/icache.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/semantics.h \ @@ -281,8 +282,8 @@ TESTS = testsuite/common/bits32m0$(EXEEXT) \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.h -@SIM_ENABLE_ARCH_v850_TRUE@am__append_102 = $(v850_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_v850_TRUE@am__append_103 = $(v850_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_v850_TRUE@am__append_104 = $(v850_BUILD_OUTPUTS) subdir = . ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \ @@ -377,6 +378,15 @@ arm_libsim_a_AR = $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_arm_TRUE@ arm/modules.o am_arm_libsim_a_OBJECTS = arm_libsim_a_OBJECTS = $(am_arm_libsim_a_OBJECTS) +avr_libsim_a_AR = $(AR) $(ARFLAGS) +@SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_DEPENDENCIES = avr/interp.o \ +@SIM_ENABLE_ARCH_avr_TRUE@ $(patsubst \ +@SIM_ENABLE_ARCH_avr_TRUE@ %,avr/%,$(SIM_NEW_COMMON_OBJS)) \ +@SIM_ENABLE_ARCH_avr_TRUE@ $(patsubst \ +@SIM_ENABLE_ARCH_avr_TRUE@ %,avr/dv-%.o,$(SIM_HW_DEVICES)) \ +@SIM_ENABLE_ARCH_avr_TRUE@ avr/modules.o avr/sim-resume.o +am_avr_libsim_a_OBJECTS = +avr_libsim_a_OBJECTS = $(am_avr_libsim_a_OBJECTS) common_libcommon_a_AR = $(AR) $(ARFLAGS) common_libcommon_a_LIBADD = am_common_libcommon_a_OBJECTS = common/callback.$(OBJEXT) \ @@ -730,12 +740,13 @@ am__v_CCLD_ = $(am__v_CCLD_@AM_DEFAULT_V@) am__v_CCLD_0 = @echo " CCLD " $@; am__v_CCLD_1 = SOURCES = $(aarch64_libsim_a_SOURCES) $(arm_libsim_a_SOURCES) \ - $(common_libcommon_a_SOURCES) $(igen_libigen_a_SOURCES) \ - $(aarch64_run_SOURCES) $(arm_run_SOURCES) $(avr_run_SOURCES) \ - $(bfin_run_SOURCES) $(bpf_run_SOURCES) $(cr16_gencode_SOURCES) \ - $(cr16_run_SOURCES) $(cris_run_SOURCES) \ - $(cris_rvdummy_SOURCES) $(d10v_gencode_SOURCES) \ - $(d10v_run_SOURCES) $(erc32_run_SOURCES) erc32/sis.c \ + $(avr_libsim_a_SOURCES) $(common_libcommon_a_SOURCES) \ + $(igen_libigen_a_SOURCES) $(aarch64_run_SOURCES) \ + $(arm_run_SOURCES) $(avr_run_SOURCES) $(bfin_run_SOURCES) \ + $(bpf_run_SOURCES) $(cr16_gencode_SOURCES) $(cr16_run_SOURCES) \ + $(cris_run_SOURCES) $(cris_rvdummy_SOURCES) \ + $(d10v_gencode_SOURCES) $(d10v_run_SOURCES) \ + $(erc32_run_SOURCES) erc32/sis.c \ $(example_synacor_run_SOURCES) $(frv_run_SOURCES) \ $(ft32_run_SOURCES) $(h8300_run_SOURCES) \ $(igen_filter_SOURCES) $(igen_gen_SOURCES) \ @@ -1286,32 +1297,32 @@ srccom = $(srcdir)/common srcroot = $(srcdir)/.. SUBDIRS = @subdirs@ $(SIM_SUBDIRS) AM_MAKEFLAGS = SIM_NEW_COMMON_OBJS_="$(SIM_NEW_COMMON_OBJS)" \ - $(am__append_3) $(am__append_14) $(am__append_25) \ - $(am__append_50) $(am__append_59) $(am__append_64) \ - $(am__append_71) $(am__append_80) + $(am__append_3) $(am__append_15) $(am__append_26) \ + $(am__append_51) $(am__append_60) $(am__append_65) \ + $(am__append_72) $(am__append_81) pkginclude_HEADERS = $(am__append_1) noinst_LIBRARIES = common/libcommon.a $(am__append_5) $(am__append_8) \ - $(am__append_10) -BUILT_SOURCES = $(am__append_16) $(am__append_20) $(am__append_27) \ - $(am__append_31) $(am__append_40) $(am__append_46) \ - $(am__append_51) $(am__append_60) $(am__append_72) \ - $(am__append_81) $(am__append_87) $(am__append_96) \ - $(am__append_101) + $(am__append_10) $(am__append_12) +BUILT_SOURCES = $(am__append_17) $(am__append_21) $(am__append_28) \ + $(am__append_32) $(am__append_41) $(am__append_47) \ + $(am__append_52) $(am__append_61) $(am__append_73) \ + $(am__append_82) $(am__append_88) $(am__append_97) \ + $(am__append_102) CLEANFILES = common/version.c common/version.c-stamp \ testsuite/common/bits-gen testsuite/common/bits32m0.c \ testsuite/common/bits32m31.c testsuite/common/bits64m0.c \ testsuite/common/bits64m63.c -DISTCLEANFILES = $(am__append_78) +DISTCLEANFILES = $(am__append_79) MOSTLYCLEANFILES = core $(common_HW_CONFIG_H_TARGETS) $(patsubst \ %,%/stamp-hw,$(SIM_ENABLED_ARCHES)) \ $(common_GEN_MODULES_C_TARGETS) $(patsubst \ %,%/stamp-modules,$(SIM_ENABLED_ARCHES)) $(am__append_7) \ - site-sim-config.exp testrun.log testrun.sum $(am__append_18) \ - $(am__append_23) $(am__append_29) $(am__append_34) \ - $(am__append_42) $(am__append_48) $(am__append_53) \ - $(am__append_57) $(am__append_62) $(am__append_67) \ - $(am__append_77) $(am__append_83) $(am__append_89) \ - $(am__append_99) $(am__append_103) + site-sim-config.exp testrun.log testrun.sum $(am__append_19) \ + $(am__append_24) $(am__append_30) $(am__append_35) \ + $(am__append_43) $(am__append_49) $(am__append_54) \ + $(am__append_58) $(am__append_63) $(am__append_68) \ + $(am__append_78) $(am__append_84) $(am__append_90) \ + $(am__append_100) $(am__append_104) AM_CFLAGS = $(WERROR_CFLAGS) $(WARN_CFLAGS) AM_CPPFLAGS = $(INCGNU) -I$(srcroot)/include -I../bfd -I.. \ $(SIM_HW_CFLAGS) $(SIM_INLINE) -I$(srcdir)/common \ @@ -1322,15 +1333,15 @@ COMPILE_FOR_BUILD = $(CC_FOR_BUILD) $(AM_CPPFLAGS_FOR_BUILD) $(CPPFLAGS_FOR_BUIL LINK_FOR_BUILD = $(CC_FOR_BUILD) $(CFLAGS_FOR_BUILD) $(LDFLAGS_FOR_BUILD) -o $@ SIM_ALL_RECURSIVE_DEPS = common/libcommon.a \ $(common_HW_CONFIG_H_TARGETS) $(common_GEN_MODULES_C_TARGETS) \ - $(am__append_4) $(am__append_17) $(am__append_21) \ - $(am__append_28) $(am__append_32) $(am__append_41) \ - $(am__append_47) $(am__append_52) $(am__append_55) \ - $(am__append_61) $(am__append_65) $(am__append_76) \ - $(am__append_82) $(am__append_88) $(am__append_97) \ - $(am__append_102) + $(am__append_4) $(am__append_18) $(am__append_22) \ + $(am__append_29) $(am__append_33) $(am__append_42) \ + $(am__append_48) $(am__append_53) $(am__append_56) \ + $(am__append_62) $(am__append_66) $(am__append_77) \ + $(am__append_83) $(am__append_89) $(am__append_98) \ + $(am__append_103) SIM_INSTALL_DATA_LOCAL_DEPS = -SIM_INSTALL_EXEC_LOCAL_DEPS = $(am__append_36) -SIM_UNINSTALL_LOCAL_DEPS = $(am__append_37) +SIM_INSTALL_EXEC_LOCAL_DEPS = $(am__append_37) +SIM_UNINSTALL_LOCAL_DEPS = $(am__append_38) common_libcommon_a_SOURCES = \ common/callback.c \ common/portability.c \ @@ -1535,6 +1546,15 @@ testsuite_common_CPPFLAGS = \ @SIM_ENABLE_ARCH_arm_TRUE@armdocdir = $(docdir)/arm @SIM_ENABLE_ARCH_arm_TRUE@armdoc_DATA = arm/README +@SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_SOURCES = +@SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_LIBADD = \ +@SIM_ENABLE_ARCH_avr_TRUE@ $(common_libcommon_a_OBJECTS) \ +@SIM_ENABLE_ARCH_avr_TRUE@ avr/interp.o \ +@SIM_ENABLE_ARCH_avr_TRUE@ $(patsubst %,avr/%,$(SIM_NEW_COMMON_OBJS)) \ +@SIM_ENABLE_ARCH_avr_TRUE@ $(patsubst %,avr/dv-%.o,$(SIM_HW_DEVICES)) \ +@SIM_ENABLE_ARCH_avr_TRUE@ avr/modules.o \ +@SIM_ENABLE_ARCH_avr_TRUE@ avr/sim-resume.o + @SIM_ENABLE_ARCH_avr_TRUE@avr_run_SOURCES = @SIM_ENABLE_ARCH_avr_TRUE@avr_run_LDADD = \ @SIM_ENABLE_ARCH_avr_TRUE@ avr/nrun.o \ @@ -1798,8 +1818,8 @@ testsuite_common_CPPFLAGS = \ @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILD_OUTPUTS = \ @SIM_ENABLE_ARCH_mips_TRUE@ $(mips_BUILT_SRC_FROM_IGEN_ITABLE) \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/stamp-igen-itable \ -@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_73) $(am__append_74) \ -@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_75) +@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_74) $(am__append_75) \ +@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_76) @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN = $(srcdir)/mips/mips.igen @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN_INC = \ @@ -2159,6 +2179,14 @@ arm/libsim.a: $(arm_libsim_a_OBJECTS) $(arm_libsim_a_DEPENDENCIES) $(EXTRA_arm_l $(AM_V_at)-rm -f arm/libsim.a $(AM_V_AR)$(arm_libsim_a_AR) arm/libsim.a $(arm_libsim_a_OBJECTS) $(arm_libsim_a_LIBADD) $(AM_V_at)$(RANLIB) arm/libsim.a +avr/$(am__dirstamp): + @$(MKDIR_P) avr + @: > avr/$(am__dirstamp) + +avr/libsim.a: $(avr_libsim_a_OBJECTS) $(avr_libsim_a_DEPENDENCIES) $(EXTRA_avr_libsim_a_DEPENDENCIES) avr/$(am__dirstamp) + $(AM_V_at)-rm -f avr/libsim.a + $(AM_V_AR)$(avr_libsim_a_AR) avr/libsim.a $(avr_libsim_a_OBJECTS) $(avr_libsim_a_LIBADD) + $(AM_V_at)$(RANLIB) avr/libsim.a common/$(am__dirstamp): @$(MKDIR_P) common @: > common/$(am__dirstamp) @@ -2256,9 +2284,6 @@ aarch64/run$(EXEEXT): $(aarch64_run_OBJECTS) $(aarch64_run_DEPENDENCIES) $(EXTRA arm/run$(EXEEXT): $(arm_run_OBJECTS) $(arm_run_DEPENDENCIES) $(EXTRA_arm_run_DEPENDENCIES) arm/$(am__dirstamp) @rm -f arm/run$(EXEEXT) $(AM_V_CCLD)$(LINK) $(arm_run_OBJECTS) $(arm_run_LDADD) $(LIBS) -avr/$(am__dirstamp): - @$(MKDIR_P) avr - @: > avr/$(am__dirstamp) avr/run$(EXEEXT): $(avr_run_OBJECTS) $(avr_run_DEPENDENCIES) $(EXTRA_avr_run_DEPENDENCIES) avr/$(am__dirstamp) @rm -f avr/run$(EXEEXT) @@ -3576,6 +3601,13 @@ testsuite/common/bits64m63.c: testsuite/common/bits-gen$(EXEEXT) testsuite/commo @SIM_ENABLE_ARCH_arm_TRUE@arm/%.o: common/%.c @SIM_ENABLE_ARCH_arm_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F) +@SIM_ENABLE_ARCH_avr_TRUE@$(avr_libsim_a_OBJECTS) $(avr_libsim_a_LIBADD): avr/hw-config.h + +@SIM_ENABLE_ARCH_avr_TRUE@avr/%.o: avr/%.c +@SIM_ENABLE_ARCH_avr_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F) + +@SIM_ENABLE_ARCH_avr_TRUE@avr/%.o: common/%.c +@SIM_ENABLE_ARCH_avr_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F) @SIM_ENABLE_ARCH_bfin_TRUE@bfin/linux-fixed-code.h: @MAINT@ $(srcdir)/bfin/linux-fixed-code.s bfin/local.mk bfin/$(am__dirstamp) @SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_GEN)$(AS_FOR_TARGET_BFIN) $(srcdir)/bfin/linux-fixed-code.s -o bfin/linux-fixed-code.o diff --git a/sim/avr/Makefile.in b/sim/avr/Makefile.in index 579c2322c5b..eaf6c4b6a97 100644 --- a/sim/avr/Makefile.in +++ b/sim/avr/Makefile.in @@ -16,9 +16,6 @@ ## COMMON_PRE_CONFIG_FRAG -SIM_OBJS = \ - interp.o \ - $(SIM_NEW_COMMON_OBJS) \ - sim-resume.o +SIM_LIBSIM = ## COMMON_POST_CONFIG_FRAG diff --git a/sim/avr/local.mk b/sim/avr/local.mk index a667abd839f..84ba9d6f6e4 100644 --- a/sim/avr/local.mk +++ b/sim/avr/local.mk @@ -15,6 +15,24 @@ ## You should have received a copy of the GNU General Public License ## along with this program. If not, see . +%C%_libsim_a_SOURCES = +%C%_libsim_a_LIBADD = \ + $(common_libcommon_a_OBJECTS) \ + %D%/interp.o \ + $(patsubst %,%D%/%,$(SIM_NEW_COMMON_OBJS)) \ + $(patsubst %,%D%/dv-%.o,$(SIM_HW_DEVICES)) \ + %D%/modules.o \ + %D%/sim-resume.o +$(%C%_libsim_a_OBJECTS) $(%C%_libsim_a_LIBADD): %D%/hw-config.h + +noinst_LIBRARIES += %D%/libsim.a + +%D%/%.o: %D%/%.c + $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F) + +%D%/%.o: common/%.c + $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F) + %C%_run_SOURCES = %C%_run_LDADD = \ %D%/nrun.o \