From: Clifford Wolf <clifford@clifford.at>
Date: Sat, 14 Feb 2015 21:36:34 +0000 (+0100)
Subject: Fixed "stat" handling of blackbox modules
X-Git-Tag: yosys-0.6~435
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c6ae9ebb7997548fdf7445f9fda64dc97f8e92f8;p=yosys.git

Fixed "stat" handling of blackbox modules
---

diff --git a/passes/cmds/stat.cc b/passes/cmds/stat.cc
index d68c57b20..bd3a43aca 100644
--- a/passes/cmds/stat.cc
+++ b/passes/cmds/stat.cc
@@ -208,20 +208,17 @@ struct StatPass : public Pass {
 		}
 		extra_args(args, argidx, design);
 
-		for (auto &it : design->modules_)
+		for (auto mod : design->selected_modules())
 		{
-			if (!design->selected_module(it.first))
-				continue;
-
 			if (!top_mod && design->full_selection())
-				if (it.second->get_bool_attribute("\\top"))
-					top_mod = it.second;
+				if (mod->get_bool_attribute("\\top"))
+					top_mod = mod;
 
-			statdata_t data(design, it.second, width_mode);
-			mod_stat[it.first] = data;
+			statdata_t data(design, mod, width_mode);
+			mod_stat[mod->name] = data;
 
 			log("\n");
-			log("=== %s%s ===\n", RTLIL::id2cstr(it.first), design->selected_whole_module(it.first) ? "" : " (partially selected)");
+			log("=== %s%s ===\n", RTLIL::id2cstr(mod->name), design->selected_whole_module(mod->name) ? "" : " (partially selected)");
 			log("\n");
 			data.log_data();
 		}