From: Cesar_Strauss <Cesar_Strauss@web>
Date: Thu, 22 Aug 2024 23:33:25 +0000 (+0100)
Subject: First draft of an updated Cryptorouter page gathering goals and deliverables in one... 
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c6bcd02f2f45e8aa230f112e2bea1930f88ce63f;p=libreriscv.git

First draft of an updated Cryptorouter page gathering goals and deliverables in one place
---

diff --git a/crypto_router_asic.mdwn b/crypto_router_asic.mdwn
index c877516d2..c6efce26b 100644
--- a/crypto_router_asic.mdwn
+++ b/crypto_router_asic.mdwn
@@ -14,6 +14,35 @@
 * Top-level bugreport: <https://bugs.libre-soc.org/show_bug.cgi?id=589>
 * ASIC/IO Pin specification page: [[crypto_router_asic/crypto_router_pinspec]]
 
+# Goal
+
+To build the foundations of a cryptographic extension of the Power ISA, allowing
+anyone interested to build upon this effort and make an Cryptorouter FPGA or ASIC
+for oneself.
+
+# Deliverables
+
+* a set of instructions suitable for crypto applications
+* documentation of said instructions
+* reference HDL implementation of a number of them
+* additional definitions for concepts like a REMAP engine and element width
+overrides which, when implemented, will allow efficient implementation of many
+fundamental crypto algorithms
+* a flexible HDL platform (ls2) for implementing a System-on-Chip on an FPGA or ASIC
+
+# TODO
+
+Links to:
+
+* sub-page about historical reasoning for some of the decisions taken
+* documentation and examples for the crypto instructions
+* bug reports, git commits and other wiki pages 
+
+# Helpful information for Cryptorouter implementations:
+
+Given the work above, the information below is useful for allowing anyone
+interested to work towards building a Cryptorouter FPGA or ASIC for oneself:
+
 # Specifications
 
 All of these are entirely Libre-Licensed or are to be written as Libre-Licensed: