From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Mon, 26 Sep 2022 11:03:07 +0000 (+0100)
Subject: swap RA/RB so that RA|0 is used not RB|0
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c6fa0d418b53b2e94eea2e0bf378217daa66d668;p=openpower-isa.git

swap RA/RB so that RA|0 is used not RB|0
RB|0 would need a new flag to be passed down to ALUs in HDL
---

diff --git a/openpower/isa/prefix_codes.mdwn b/openpower/isa/prefix_codes.mdwn
index ab6c2c6b..f5cb1b50 100644
--- a/openpower/isa/prefix_codes.mdwn
+++ b/openpower/isa/prefix_codes.mdwn
@@ -1,6 +1,6 @@
 <!-- https://libre-soc.org/openpower/prefix_codes/ -->
 
-# [DRAFT] Prefix-code decode
+# [DRBFT] Prefix-code decode
 
 VA2-Form
 
@@ -8,7 +8,7 @@ VA2-Form
 
 Pseudo-code:
 
-    tree[0:63] <- (RA)
+    tree[0:63] <- (RB)
     rb_used <- 0b0
     in_bits[0:63] <- (RC|0)
     if in_bits = 0 then
@@ -22,11 +22,11 @@ Pseudo-code:
     do while out_byte < 8
         in_bit <- in_bits[63]
         if in_bits = 1 then
-            if rb_used | (_RB = 0) then
+            if rb_used | (_RA = 0) then
                 leave
             rb_used <- 0b1
-            in_bit <- (RB)[63]
-            in_bits <- 0b1 || (RB)[0:62]
+            in_bit <- (RA)[63]
+            in_bits <- 0b1 || (RA)[0:62]
         else
             in_bits <- 0b0 || in_bits[0:62]
         # walk the binary tree in `tree` from parent to the selected child
diff --git a/src/openpower/test/prefix_codes/prefix_codes_cases.py b/src/openpower/test/prefix_codes/prefix_codes_cases.py
index 0f8a72aa..088d2d9d 100644
--- a/src/openpower/test/prefix_codes/prefix_codes_cases.py
+++ b/src/openpower/test/prefix_codes/prefix_codes_cases.py
@@ -81,7 +81,7 @@ class PrefixCodesCases(TestAccumulatorBase):
         RC_val = int("1" + rev_input_bits, 2)
         if expected_RS is None:
             expected_RS = RC_val >> decoded_bits_len
-        lst = list(SVP64Asm([f"pcdec. 4,6,{RB},5,0"]))
+        lst = list(SVP64Asm([f"pcdec. 4,{RB},6,5,0"]))
         gprs = [0] * 32
         gprs[6] = RA_val
         if RB: