From: Gabe Black <gabeblack@google.com>
Date: Sat, 13 Oct 2018 06:10:01 +0000 (-0700)
Subject: mips: Change the integer and fp register widths to be 64 bits.
X-Git-Tag: v19.0.0.0~1429
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c6ff8d31f241d564ec4162b7b49286131ef78559;p=gem5.git

mips: Change the integer and fp register widths to be 64 bits.

This makes them more consistent with the other architectures, helping
to facilitate having a single, unified type across ISAs in the future.

Change-Id: I65efb10e39d453281b8429eeedbb46fa6b023a2b
Reviewed-on: https://gem5-review.googlesource.com/c/13620
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
---

diff --git a/src/arch/mips/registers.hh b/src/arch/mips/registers.hh
index 55c2dee03..dbac83995 100644
--- a/src/arch/mips/registers.hh
+++ b/src/arch/mips/registers.hh
@@ -278,11 +278,11 @@ const int NumMiscRegs = MISCREG_NUMREGS;
 
 const int TotalNumRegs = NumIntRegs + NumFloatRegs + NumMiscRegs;
 
-typedef uint32_t IntReg;
+typedef uint64_t IntReg;
 
 // floating point register file entry type
-typedef uint32_t FloatRegBits;
-typedef float FloatReg;
+typedef uint64_t FloatRegBits;
+typedef double FloatReg;
 
 // cop-0/cop-1 system control register
 typedef uint64_t MiscReg;