From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Tue, 5 May 2020 14:59:23 +0000 (+0100)
Subject: track down error in CORDIC pipe_data, "yield from" used instead of just "yield"
X-Git-Tag: ls180-24jan2020~61
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c78285ae63e779f2742de6d1d38ea8aa5d81e3b9;p=ieee754fpu.git

track down error in CORDIC pipe_data, "yield from" used instead of just "yield"
---

diff --git a/src/ieee754/cordic/pipe_data.py b/src/ieee754/cordic/pipe_data.py
index c3f600ae..d83dbe7b 100644
--- a/src/ieee754/cordic/pipe_data.py
+++ b/src/ieee754/cordic/pipe_data.py
@@ -28,8 +28,8 @@ class CordicOutputData:
         self.muxid = self.ctx.muxid
 
     def __iter__(self):
-        yield from self.x
-        yield from self.y
+        yield self.x
+        yield self.y
         yield from self.ctx
 
     def eq(self, i):
diff --git a/src/ieee754/cordic/test/test_fp_pipe.py b/src/ieee754/cordic/test/test_fp_pipe.py
index 22d2f20a..db8c7a17 100644
--- a/src/ieee754/cordic/test/test_fp_pipe.py
+++ b/src/ieee754/cordic/test/test_fp_pipe.py
@@ -20,9 +20,9 @@ class SinCosTestCase(FHDLTestCase):
         # write out module (useful for seeing what's going on)
         # XXX WHOOPS can't do this at the moment, need to track down
         # an issue in the ports
-        # vl = rtlil.convert(dut, ports=dut.ports())
-        # with open("test_cordic_pipe_sin_cos.il", "w") as f:
-        #     f.write(vl)
+        vl = rtlil.convert(dut, ports=dut.ports())
+        with open("test_cordic_pipe_sin_cos.il", "w") as f:
+            f.write(vl)
 
         z = Signal(dut.p.data_i.a.shape())
         z_valid = Signal()