From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Mon, 13 May 2019 21:07:38 +0000 (+0100)
Subject: return to latch on src for oper
X-Git-Tag: div_pipeline~2054
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c7853d0232db590cf828b8d009eb4deab817a182;p=soc.git

return to latch on src for oper
---

diff --git a/src/experiment/compalu.py b/src/experiment/compalu.py
index a240a6b4..6209ae0e 100644
--- a/src/experiment/compalu.py
+++ b/src/experiment/compalu.py
@@ -60,7 +60,7 @@ class ComputationUnitNoDelay(Elaboratable):
         #    m.d.comb += self.alu.op.eq(self.oper_i)
 
         # create a latch/register for the operand
-        latchregister(m, self.oper_i, self.alu.op, opc_l.q)
+        latchregister(m, self.oper_i, self.alu.op, src_l.q)
 
         # and one for the output from the ALU
         data_o = Signal(self.rwid, reset_less=True) # Dest register