From: lkcl <lkcl@web>
Date: Sun, 26 Sep 2021 14:59:16 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~3815
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c7c1d561ba0eeb91df4986b3e468f2f38f9c429c;p=libreriscv.git

---

diff --git a/3d_gpu/architecture/dynamic_simd.mdwn b/3d_gpu/architecture/dynamic_simd.mdwn
index 4517674a0..3212ad5f4 100644
--- a/3d_gpu/architecture/dynamic_simd.mdwn
+++ b/3d_gpu/architecture/dynamic_simd.mdwn
@@ -105,6 +105,13 @@ Therefore, a Parallel Switch statement is as simple as taking the relevant colum
      with m.If(a):
          comb += o.eq(c)
      with m.Elif(b):
-         comb += o eq(d)
+         comb += o.eq(d)
 
+If these were ordinary Signals, they would be translated to a Switch where:
 
+* if_tests would be Cat(a, b) i.e. a 2 bit quantity
+* cases would be (quantity 2) "1-" and "-1" in order to match
+  against the first binary test bit of Cat(a, b) and the second,
+  respectively.
+* the first case would be "1-" to activate `o.eq(c)
+* the second case would be "-1" to activate o.eq(d)