From: Kevin Lim <ktlim@umich.edu>
Date: Fri, 19 May 2006 18:27:46 +0000 (-0400)
Subject: Fixes for regression build errors.
X-Git-Tag: m5_2.0_beta1~36^2~108^2~19
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c7e7d07ec395156015e3baf52048c403d28a6442;p=gem5.git

Fixes for regression build errors.

--HG--
extra : convert_revision : 1f59c853cb0e327d7cf586021b5139f1242e4f28
---

diff --git a/cpu/cpu_exec_context.cc b/cpu/cpu_exec_context.cc
index 3d047856a..24de6d450 100644
--- a/cpu/cpu_exec_context.cc
+++ b/cpu/cpu_exec_context.cc
@@ -157,8 +157,7 @@ CPUExecContext::takeOverFrom(ExecContext *oldContext)
     cpu_id = oldContext->readCpuId();
 #if !FULL_SYSTEM
     func_exe_inst = oldContext->readFuncExeInst();
-#endif
-
+#else
     EndQuiesceEvent *quiesce = oldContext->getQuiesceEvent();
     if (quiesce) {
         // Point the quiesce event's XC at this XC so that it wakes up
@@ -168,6 +167,7 @@ CPUExecContext::takeOverFrom(ExecContext *oldContext)
     if (quiesceEvent) {
         quiesceEvent->xc = proxy;
     }
+#endif
 
     storeCondFailures = 0;
 
diff --git a/cpu/o3/alpha_cpu_impl.hh b/cpu/o3/alpha_cpu_impl.hh
index 856fcb1c8..58b2b3548 100644
--- a/cpu/o3/alpha_cpu_impl.hh
+++ b/cpu/o3/alpha_cpu_impl.hh
@@ -171,8 +171,7 @@ AlphaFullCPU<Impl>::AlphaXC::takeOverFrom(ExecContext *old_context)
     setCpuId(old_context->readCpuId());
 #if !FULL_SYSTEM
     thread->funcExeInst = old_context->readFuncExeInst();
-#endif
-
+#else
     EndQuiesceEvent *other_quiesce = old_context->getQuiesceEvent();
     if (other_quiesce) {
         // Point the quiesce event's XC at this XC so that it wakes up
@@ -184,6 +183,7 @@ AlphaFullCPU<Impl>::AlphaXC::takeOverFrom(ExecContext *old_context)
     }
 //    storeCondFailures = 0;
     cpu->lockFlag = false;
+#endif
 
     old_context->setStatus(ExecContext::Unallocated);
 
diff --git a/cpu/ozone/cpu.hh b/cpu/ozone/cpu.hh
index 1d522b2fa..7e12e75e5 100644
--- a/cpu/ozone/cpu.hh
+++ b/cpu/ozone/cpu.hh
@@ -89,7 +89,6 @@ class OzoneCPU : public BaseCPU
     typedef typename Impl::FrontEnd FrontEnd;
     typedef typename Impl::BackEnd BackEnd;
     typedef typename Impl::DynInst DynInst;
-    typedef typename Impl::DynInst DynInst;
     typedef typename Impl::DynInstPtr DynInstPtr;
 
     typedef TheISA::MiscReg MiscReg;
diff --git a/cpu/ozone/cpu_impl.hh b/cpu/ozone/cpu_impl.hh
index b085f077f..031b4b145 100644
--- a/cpu/ozone/cpu_impl.hh
+++ b/cpu/ozone/cpu_impl.hh
@@ -934,8 +934,7 @@ OzoneCPU<Impl>::OzoneXC::takeOverFrom(ExecContext *old_context)
     setCpuId(old_context->readCpuId());
 #if !FULL_SYSTEM
     setFuncExeInst(old_context->readFuncExeInst());
-#endif
-
+#else
     EndQuiesceEvent *other_quiesce = old_context->getQuiesceEvent();
     if (other_quiesce) {
         // Point the quiesce event's XC at this XC so that it wakes up
@@ -947,6 +946,7 @@ OzoneCPU<Impl>::OzoneXC::takeOverFrom(ExecContext *old_context)
     }
 //    storeCondFailures = 0;
     cpu->lockFlag = false;
+#endif
 
     old_context->setStatus(ExecContext::Unallocated);
 }