From: lkcl <lkcl@web>
Date: Sat, 9 Apr 2022 21:34:35 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~2813
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c81db78a29ff2651e12f8b8eb19fb1917e2f32b1;p=libreriscv.git

---

diff --git a/openpower/sv/svp64/appendix.mdwn b/openpower/sv/svp64/appendix.mdwn
index b571d9195..83665022a 100644
--- a/openpower/sv/svp64/appendix.mdwn
+++ b/openpower/sv/svp64/appendix.mdwn
@@ -266,8 +266,9 @@ as a simple and natural relaxation of the usual restriction on the Vector
 Looping which would terminate if the destination was marked as a Scalar.
 Scalar Reduction by contrast *keeps issuing Vector Element Operations*
 even though the destination register is marked as scalar.
-Thus it is up to the programmer to be aware of this and observe some
-conventions.
+Thus it is up to the programmer to be aware of this, observe some
+conventions, and thus end up achieving the desired outcome of scalar
+reduction.
 
 It is also important to appreciate that there is no
 actual imposition or restriction on how this mode is utilised: there