From: Ian Romanick <ian.d.romanick@intel.com>
Date: Sat, 25 Aug 2018 00:24:36 +0000 (-0700)
Subject: i965/vec4: Emit BRW_AOP_INC or BRW_AOP_DEC for atomicAdd of +1 or -1
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c836326a290e867e736478b340fca725a978309f;p=mesa.git

i965/vec4: Emit BRW_AOP_INC or BRW_AOP_DEC for atomicAdd of +1 or -1

No shader-db changes on any Intel platform.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
---

diff --git a/src/intel/compiler/brw_vec4_nir.cpp b/src/intel/compiler/brw_vec4_nir.cpp
index 4c3a2d2e10a..124714b59de 100644
--- a/src/intel/compiler/brw_vec4_nir.cpp
+++ b/src/intel/compiler/brw_vec4_nir.cpp
@@ -709,9 +709,20 @@ vec4_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr)
       break;
    }
 
-   case nir_intrinsic_ssbo_atomic_add:
-      nir_emit_ssbo_atomic(BRW_AOP_ADD, instr);
+   case nir_intrinsic_ssbo_atomic_add: {
+      int op = BRW_AOP_ADD;
+      const nir_const_value *const val = nir_src_as_const_value(instr->src[2]);
+
+      if (val != NULL) {
+         if (val->i32[0] == 1)
+            op = BRW_AOP_INC;
+         else if (val->i32[0] == -1)
+            op = BRW_AOP_DEC;
+      }
+
+      nir_emit_ssbo_atomic(op, instr);
       break;
+   }
    case nir_intrinsic_ssbo_atomic_imin:
       nir_emit_ssbo_atomic(BRW_AOP_IMIN, instr);
       break;
@@ -937,7 +948,9 @@ vec4_visitor::nir_emit_ssbo_atomic(int op, nir_intrinsic_instr *instr)
    }
 
    src_reg offset = get_nir_src(instr->src[1], 1);
-   src_reg data1 = get_nir_src(instr->src[2], 1);
+   src_reg data1;
+   if (op != BRW_AOP_INC && op != BRW_AOP_DEC && op != BRW_AOP_PREDEC)
+      data1 = get_nir_src(instr->src[2], 1);
    src_reg data2;
    if (op == BRW_AOP_CMPWR)
       data2 = get_nir_src(instr->src[3], 1);