From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Mon, 24 Sep 2018 00:01:15 +0000 (+0200)
Subject: soc_core: add uart-stub argument
X-Git-Tag: 24jan2021_ls180~1595
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c88029d330ad658ef3dfdbb64d9a367afe67607a;p=litex.git

soc_core: add uart-stub argument
---

diff --git a/litex/soc/integration/soc_core.py b/litex/soc/integration/soc_core.py
index 5f688338..bfbeacce 100644
--- a/litex/soc/integration/soc_core.py
+++ b/litex/soc/integration/soc_core.py
@@ -385,11 +385,18 @@ def soc_core_args(parser):
                         help="size/enable the integrated (BIOS) ROM")
     parser.add_argument("--integrated-main-ram-size", default=None, type=int,
                         help="size/enable the integrated main RAM")
+    parser.add_argument("--uart-stub", default=False, type=bool,
+                        help="enable uart stub")
 
 
 def soc_core_argdict(args):
     r = dict()
-    for a in "cpu_type", "cpu_variant", "integrated_rom_size", "integrated_main_ram_size":
+    for a in [
+        "cpu_type",
+        "cpu_variant",
+        "integrated_rom_size",
+        "integrated_main_ram_size",
+        "uart_stub"]:
         arg = getattr(args, a)
         if arg is not None:
             r[a] = arg