From: lkcl <lkcl@web>
Date: Wed, 6 Apr 2022 17:04:24 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~2873
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c883d37e580c2a316fba76de84caba18716a5fc0;p=libreriscv.git

---

diff --git a/openpower/sv/bitmanip.mdwn b/openpower/sv/bitmanip.mdwn
index 91eb79ede..3f2fd4e3c 100644
--- a/openpower/sv/bitmanip.mdwn
+++ b/openpower/sv/bitmanip.mdwn
@@ -981,7 +981,7 @@ RA ← EXTZ64(count)
 
 ## bit deposit
 
-vpdepd VRT,VRA,VRB, identical to RV bitmamip bdep, found already in v3.1 p106
+pdepd VRT,VRA,VRB, identical to RV bitmamip bdep, found already in v3.1 p106
 
     do while(m < 64)
        if VSR[VRB+32].dword[i].bit[63-m]=1 then do
@@ -1008,7 +1008,7 @@ uint_xlen_t bdep(uint_xlen_t RA, uint_xlen_t RB)
 
 ## bit extract
 
-other way round: identical to RV bext, found in v3.1 p196
+other way round: identical to RV bext: pextd, found in v3.1 p196
 
 ```
 uint_xlen_t bext(uint_xlen_t RA, uint_xlen_t RB)