From: Matthew Wahab Date: Tue, 20 Jan 2015 10:26:18 +0000 (+0000) Subject: [ARM] PR 64149: Remove -mlra/-mno-lra option for ARM. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c896d4b449d797c6d43b7c4863adbbe19677d5cb;p=gcc.git [ARM] PR 64149: Remove -mlra/-mno-lra option for ARM. gcc/ 2015-01-20 Matthew Wahab PR target/64149 * config/arm/arm.option: Remove lra option and arm_lra_flag variable. * config/arm/arm.h (MODE_BASE_REG_CLASS): Remove use of arm_lra_flag, replace the conditional with it's true branch. * config/arm/arm.c (TARGET_LRA_P): Set to hook_bool_void_true. (arm_lra_p): Remove. gcc/testsuite/ 2015-01-20 matthewhew Wahab PR target/64149 * gcc.target/arm/armthumb1-far-jump-3.c: Remove. From-SVN: r219884 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4ca1b89fedc..3ad6b9d6bfb 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2015-01-20 Matthew Wahab + + PR target/64149 + * config/arm/arm.opt: Remove lra option and arm_lra_flag variablesle. + * config/arm/arm.h (MODE_BASE_REG_CLASS): Remove use of arm_lra_flagag, + replace the conditional with it's true branch. + * config/arm/arm.config (TARGET_LRA_P): Set to hook_bool_void_true. + (arm_lra_p): Remove. + 2015-01-20 Eric Botcazou * config/visium/visium.h (LIB_SPEC): Adjust in default case. diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index fddd7708972..9826a9621cd 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -112,7 +112,6 @@ struct four_ints /* Forward function declarations. */ static bool arm_const_not_ok_for_debug_p (rtx); -static bool arm_lra_p (void); static bool arm_needs_doubleword_align (machine_mode, const_tree); static int arm_compute_static_chain_stack_bytes (void); static arm_stack_offsets *arm_get_frame_offsets (void); @@ -382,7 +381,7 @@ static const struct attribute_spec arm_attribute_table[] = #define TARGET_LEGITIMIZE_ADDRESS arm_legitimize_address #undef TARGET_LRA_P -#define TARGET_LRA_P arm_lra_p +#define TARGET_LRA_P hook_bool_void_true #undef TARGET_ATTRIBUTE_TABLE #define TARGET_ATTRIBUTE_TABLE arm_attribute_table @@ -5999,13 +5998,6 @@ arm_init_cumulative_args (CUMULATIVE_ARGS *pcum, tree fntype, } } -/* Return true if we use LRA instead of reload pass. */ -static bool -arm_lra_p (void) -{ - return arm_lra_flag; -} - /* Return true if mode/type need doubleword alignment. */ static bool arm_needs_doubleword_align (machine_mode mode, const_tree type) diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index bae7d0bf9aa..831d6e17d1f 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -1287,14 +1287,10 @@ enum reg_class /* For the Thumb the high registers cannot be used as base registers when addressing quantities in QI or HI mode; if we don't know the mode, then we must be conservative. */ -#define MODE_BASE_REG_CLASS(MODE) \ - (arm_lra_flag \ - ? (TARGET_32BIT ? CORE_REGS \ - : GET_MODE_SIZE (MODE) >= 4 ? BASE_REGS \ - : LO_REGS) \ - : ((TARGET_ARM || (TARGET_THUMB2 && !optimize_size)) ? CORE_REGS \ - : ((MODE) == SImode) ? BASE_REGS \ - : LO_REGS)) +#define MODE_BASE_REG_CLASS(MODE) \ + (TARGET_32BIT ? CORE_REGS \ + : GET_MODE_SIZE (MODE) >= 4 ? BASE_REGS \ + : LO_REGS) /* For Thumb we can not support SP+reg addressing, so we return LO_REGS instead of BASE_REGS. */ diff --git a/gcc/config/arm/arm.opt b/gcc/config/arm/arm.opt index 5385e4a24c8..6da49b8a771 100644 --- a/gcc/config/arm/arm.opt +++ b/gcc/config/arm/arm.opt @@ -143,10 +143,6 @@ mfpu= Target RejectNegative Joined Enum(arm_fpu) Var(arm_fpu_index) Specify the name of the target floating point hardware/format -mlra -Target Report Var(arm_lra_flag) Init(1) Save -Use LRA instead of reload (transitional) - mhard-float Target RejectNegative Alias(mfloat-abi=, hard) Undocumented diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 83f2e29fa0f..b19a58dc41e 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2015-01-20 Matthew Wahab + PR target/64149 + * gcc.target/arm/thumb1-far-farjump-3.c: Remove. + 2015-01-20 Igor Zamyatin PR bootstrap/64676 diff --git a/gcc/testsuite/gcc.target/arm/thumb1-far-jump-3.c b/gcc/testsuite/gcc.target/arm/thumb1-far-jump-3.c deleted file mode 100644 index 90559bacb2a..00000000000 --- a/gcc/testsuite/gcc.target/arm/thumb1-far-jump-3.c +++ /dev/null @@ -1,108 +0,0 @@ -/* Catch reload ICE on target thumb1 with far jump optimization. - * It is also a valid case for non-thumb1 target. */ - -/* Add -mno-lra option as it is only reproducable with reload. It will - be removed after reload is completely removed. */ -/* { dg-options "-mno-lra -fomit-frame-pointer" } */ -/* { dg-do compile } */ - -#define C 2 -#define A 4 -#define RGB (C | A) -#define GRAY (A) - -typedef unsigned long uint_32; -typedef unsigned char byte; -typedef byte * bytep; - -typedef struct ss -{ - uint_32 w; - uint_32 r; - byte c; - byte b; - byte p; -} info; - -typedef info * infop; - -void -foo(infop info, bytep row) -{ - uint_32 iw = info->w; - if (info->c == RGB) - { - if (info->b == 8) - { - bytep sp = row + info->r; - bytep dp = sp; - byte save; - uint_32 i; - - for (i = 0; i < iw; i++) - { - save = *(--sp); - *(--dp) = *(--sp); - *(--dp) = *(--sp); - *(--dp) = *(--sp); - *(--dp) = save; - } - } - - else - { - bytep sp = row + info->r; - bytep dp = sp; - byte save[2]; - uint_32 i; - - for (i = 0; i < iw; i++) - { - save[0] = *(--sp); - save[1] = *(--sp); - *(--dp) = *(--sp); - *(--dp) = *(--sp); - *(--dp) = *(--sp); - *(--dp) = *(--sp); - *(--dp) = *(--sp); - *(--dp) = *(--sp); - *(--dp) = save[0]; - *(--dp) = save[1]; - } - } - } - else if (info->c == GRAY) - { - if (info->b == 8) - { - bytep sp = row + info->r; - bytep dp = sp; - byte save; - uint_32 i; - - for (i = 0; i < iw; i++) - { - save = *(--sp); - *(--dp) = *(--sp); - *(--dp) = save; - } - } - else - { - bytep sp = row + info->r; - bytep dp = sp; - byte save[2]; - uint_32 i; - - for (i = 0; i < iw; i++) - { - save[0] = *(--sp); - save[1] = *(--sp); - *(--dp) = *(--sp); - *(--dp) = *(--sp); - *(--dp) = save[0]; - *(--dp) = save[1]; - } - } - } -}