From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Mon, 15 Oct 2018 05:43:24 +0000 (+0100)
Subject: add overload/redirection for WRITE_REG
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c8f30f041f935a127ae046505704c99f470dba60;p=riscv-isa-sim.git

add overload/redirection for WRITE_REG
---

diff --git a/riscv/sv_insn_redirect.cc b/riscv/sv_insn_redirect.cc
index f329ebd..1dd16d7 100644
--- a/riscv/sv_insn_redirect.cc
+++ b/riscv/sv_insn_redirect.cc
@@ -35,6 +35,12 @@ void (sv_proc_t::WRITE_RD)(uint64_t value)
     WRITE_REG( _insn->rd(), value ); // XXX TODO: replace properly
 }
 
+void (sv_proc_t::WRITE_REG)(reg_t reg, uint64_t value)
+{
+    WRITE_REG( reg, value ); // XXX TODO: replace properly
+    //STATE.XPR.write(reg, value);
+}
+
 /*
 void (sv_proc_t::WRITE_RD)(int_fast64_t value)
 {
diff --git a/riscv/sv_insn_redirect.h b/riscv/sv_insn_redirect.h
index 8052013..8942114 100644
--- a/riscv/sv_insn_redirect.h
+++ b/riscv/sv_insn_redirect.h
@@ -15,6 +15,7 @@
 #undef RVC_RS2
 #undef RVC_RS1S
 #undef RVC_RS2S
+//#undef WRITE_REG
 #undef WRITE_FRD
 #undef WRITE_RD
 #undef RVC_SP
@@ -48,6 +49,7 @@ public:
     //void (WRITE_RD)(int_fast64_t value); // XXX TODO investigate
     //void (WRITE_RD)(uint_fast64_t value); // XXX TODO investigate
     void (WRITE_RD)(uint64_t value); // XXX TODO investigate
+    void (WRITE_REG)(reg_t reg, uint64_t value);
     void (WRITE_FRD)(freg_t value);
     void (WRITE_FRD)(float64_t value);
     void (WRITE_FRD)(float32_t value);