From: Jiong Wang Date: Tue, 10 Mar 2015 11:27:56 +0000 (+0000) Subject: [AARCH64] Remove Load/Store register (unscaled immediate) alias. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c8f89a3423101b25e57bc8fd55b060ce2ac45a55;p=binutils-gdb.git [AARCH64] Remove Load/Store register (unscaled immediate) alias. opcodes/ChangeLog: 2015-03-10 Renlin Li * aarch64-tbl.h (aarch64_opcode_table): Remove strub, ldurb, ldursb, stur, ldur, sturh, ldurh, ldursh, ldursw, prfum F_HAS_ALIAS flag and related alias. * aarch64-asm-2.c: Regenerate. * aarch64-dis-2.c: Likewise. * aarch64-opc-2.c: Likewise. gas/testsuite/ChangeLog: 2015-03-10 Renlin Li * gas/aarch64/ldst-reg-uns-imm.d: Adjust expected output. * gas/aarch64/ldst-reg-unscaled-imm.d: Likewise. * gas/aarch64/reloc-insn.d: Likewise. --- diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 004c6423f2a..25f560a6f91 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,4 +1,8 @@ -2015-03-10 Matthew Wahab +2015-03-10 Renlin Li + + * gas/aarch64/ldst-reg-uns-imm.d: Adjust expected output. + * gas/aarch64/ldst-reg-unscaled-imm.d: Likewise. + * gas/aarch64/reloc-insn.d: Likewise.2015-03-10 Matthew Wahab * gas/aarch64/codealign.d: Add test for code section alignment. * gas/aarch64/codealign.s: New file. diff --git a/gas/testsuite/gas/aarch64/ldst-reg-uns-imm.d b/gas/testsuite/gas/aarch64/ldst-reg-uns-imm.d index caaea0722c3..be9fd605fcf 100644 --- a/gas/testsuite/gas/aarch64/ldst-reg-uns-imm.d +++ b/gas/testsuite/gas/aarch64/ldst-reg-uns-imm.d @@ -5,8 +5,8 @@ Disassembly of section \.text: 0000000000000000 <.*>: - 0: 3c1003e7 str b7, \[sp,#-256\] - 4: 3c1553e7 str b7, \[sp,#-171\] + 0: 3c1003e7 stur b7, \[sp,#-256\] + 4: 3c1553e7 stur b7, \[sp,#-171\] 8: 3d0003e7 str b7, \[sp\] c: 3d0003e7 str b7, \[sp\] 10: 3d000be7 str b7, \[sp,#2\] @@ -16,52 +16,52 @@ Disassembly of section \.text: 20: 3d0157e7 str b7, \[sp,#85\] 24: 3d03ffe7 str b7, \[sp,#255\] 28: 3d3fffe7 str b7, \[sp,#4095\] - 2c: 7c1003e7 str h7, \[sp,#-256\] - 30: 7c1553e7 str h7, \[sp,#-171\] + 2c: 7c1003e7 stur h7, \[sp,#-256\] + 30: 7c1553e7 stur h7, \[sp,#-171\] 34: 7d0003e7 str h7, \[sp\] 38: 7d0003e7 str h7, \[sp\] 3c: 7d0007e7 str h7, \[sp,#2\] 40: 7d000be7 str h7, \[sp,#4\] 44: 7d0013e7 str h7, \[sp,#8\] 48: 7d0023e7 str h7, \[sp,#16\] - 4c: 7c0553e7 str h7, \[sp,#85\] - 50: 7c0ff3e7 str h7, \[sp,#255\] + 4c: 7c0553e7 stur h7, \[sp,#85\] + 50: 7c0ff3e7 stur h7, \[sp,#255\] 54: 7d3fffe7 str h7, \[sp,#8190\] - 58: bc1003e7 str s7, \[sp,#-256\] - 5c: bc1553e7 str s7, \[sp,#-171\] + 58: bc1003e7 stur s7, \[sp,#-256\] + 5c: bc1553e7 stur s7, \[sp,#-171\] 60: bd0003e7 str s7, \[sp\] 64: bd0003e7 str s7, \[sp\] - 68: bc0023e7 str s7, \[sp,#2\] + 68: bc0023e7 stur s7, \[sp,#2\] 6c: bd0007e7 str s7, \[sp,#4\] 70: bd000be7 str s7, \[sp,#8\] 74: bd0013e7 str s7, \[sp,#16\] - 78: bc0553e7 str s7, \[sp,#85\] - 7c: bc0ff3e7 str s7, \[sp,#255\] + 78: bc0553e7 stur s7, \[sp,#85\] + 7c: bc0ff3e7 stur s7, \[sp,#255\] 80: bd3fffe7 str s7, \[sp,#16380\] - 84: fc1003e7 str d7, \[sp,#-256\] - 88: fc1553e7 str d7, \[sp,#-171\] + 84: fc1003e7 stur d7, \[sp,#-256\] + 88: fc1553e7 stur d7, \[sp,#-171\] 8c: fd0003e7 str d7, \[sp\] 90: fd0003e7 str d7, \[sp\] - 94: fc0023e7 str d7, \[sp,#2\] - 98: fc0043e7 str d7, \[sp,#4\] + 94: fc0023e7 stur d7, \[sp,#2\] + 98: fc0043e7 stur d7, \[sp,#4\] 9c: fd0007e7 str d7, \[sp,#8\] a0: fd000be7 str d7, \[sp,#16\] - a4: fc0553e7 str d7, \[sp,#85\] - a8: fc0ff3e7 str d7, \[sp,#255\] + a4: fc0553e7 stur d7, \[sp,#85\] + a8: fc0ff3e7 stur d7, \[sp,#255\] ac: fd3fffe7 str d7, \[sp,#32760\] - b0: 3c9003e7 str q7, \[sp,#-256\] - b4: 3c9553e7 str q7, \[sp,#-171\] + b0: 3c9003e7 stur q7, \[sp,#-256\] + b4: 3c9553e7 stur q7, \[sp,#-171\] b8: 3d8003e7 str q7, \[sp\] bc: 3d8003e7 str q7, \[sp\] - c0: 3c8023e7 str q7, \[sp,#2\] - c4: 3c8043e7 str q7, \[sp,#4\] - c8: 3c8083e7 str q7, \[sp,#8\] + c0: 3c8023e7 stur q7, \[sp,#2\] + c4: 3c8043e7 stur q7, \[sp,#4\] + c8: 3c8083e7 stur q7, \[sp,#8\] cc: 3d8007e7 str q7, \[sp,#16\] - d0: 3c8553e7 str q7, \[sp,#85\] - d4: 3c8ff3e7 str q7, \[sp,#255\] + d0: 3c8553e7 stur q7, \[sp,#85\] + d4: 3c8ff3e7 stur q7, \[sp,#255\] d8: 3dbfffe7 str q7, \[sp,#65520\] - dc: 3c5003e7 ldr b7, \[sp,#-256\] - e0: 3c5553e7 ldr b7, \[sp,#-171\] + dc: 3c5003e7 ldur b7, \[sp,#-256\] + e0: 3c5553e7 ldur b7, \[sp,#-171\] e4: 3d4003e7 ldr b7, \[sp\] e8: 3d4003e7 ldr b7, \[sp\] ec: 3d400be7 ldr b7, \[sp,#2\] @@ -71,52 +71,52 @@ Disassembly of section \.text: fc: 3d4157e7 ldr b7, \[sp,#85\] 100: 3d43ffe7 ldr b7, \[sp,#255\] 104: 3d7fffe7 ldr b7, \[sp,#4095\] - 108: 7c5003e7 ldr h7, \[sp,#-256\] - 10c: 7c5553e7 ldr h7, \[sp,#-171\] + 108: 7c5003e7 ldur h7, \[sp,#-256\] + 10c: 7c5553e7 ldur h7, \[sp,#-171\] 110: 7d4003e7 ldr h7, \[sp\] 114: 7d4003e7 ldr h7, \[sp\] 118: 7d4007e7 ldr h7, \[sp,#2\] 11c: 7d400be7 ldr h7, \[sp,#4\] 120: 7d4013e7 ldr h7, \[sp,#8\] 124: 7d4023e7 ldr h7, \[sp,#16\] - 128: 7c4553e7 ldr h7, \[sp,#85\] - 12c: 7c4ff3e7 ldr h7, \[sp,#255\] + 128: 7c4553e7 ldur h7, \[sp,#85\] + 12c: 7c4ff3e7 ldur h7, \[sp,#255\] 130: 7d7fffe7 ldr h7, \[sp,#8190\] - 134: bc5003e7 ldr s7, \[sp,#-256\] - 138: bc5553e7 ldr s7, \[sp,#-171\] + 134: bc5003e7 ldur s7, \[sp,#-256\] + 138: bc5553e7 ldur s7, \[sp,#-171\] 13c: bd4003e7 ldr s7, \[sp\] 140: bd4003e7 ldr s7, \[sp\] - 144: bc4023e7 ldr s7, \[sp,#2\] + 144: bc4023e7 ldur s7, \[sp,#2\] 148: bd4007e7 ldr s7, \[sp,#4\] 14c: bd400be7 ldr s7, \[sp,#8\] 150: bd4013e7 ldr s7, \[sp,#16\] - 154: bc4553e7 ldr s7, \[sp,#85\] - 158: bc4ff3e7 ldr s7, \[sp,#255\] + 154: bc4553e7 ldur s7, \[sp,#85\] + 158: bc4ff3e7 ldur s7, \[sp,#255\] 15c: bd7fffe7 ldr s7, \[sp,#16380\] - 160: fc5003e7 ldr d7, \[sp,#-256\] - 164: fc5553e7 ldr d7, \[sp,#-171\] + 160: fc5003e7 ldur d7, \[sp,#-256\] + 164: fc5553e7 ldur d7, \[sp,#-171\] 168: fd4003e7 ldr d7, \[sp\] 16c: fd4003e7 ldr d7, \[sp\] - 170: fc4023e7 ldr d7, \[sp,#2\] - 174: fc4043e7 ldr d7, \[sp,#4\] + 170: fc4023e7 ldur d7, \[sp,#2\] + 174: fc4043e7 ldur d7, \[sp,#4\] 178: fd4007e7 ldr d7, \[sp,#8\] 17c: fd400be7 ldr d7, \[sp,#16\] - 180: fc4553e7 ldr d7, \[sp,#85\] - 184: fc4ff3e7 ldr d7, \[sp,#255\] + 180: fc4553e7 ldur d7, \[sp,#85\] + 184: fc4ff3e7 ldur d7, \[sp,#255\] 188: fd7fffe7 ldr d7, \[sp,#32760\] - 18c: 3cd003e7 ldr q7, \[sp,#-256\] - 190: 3cd553e7 ldr q7, \[sp,#-171\] + 18c: 3cd003e7 ldur q7, \[sp,#-256\] + 190: 3cd553e7 ldur q7, \[sp,#-171\] 194: 3dc003e7 ldr q7, \[sp\] 198: 3dc003e7 ldr q7, \[sp\] - 19c: 3cc023e7 ldr q7, \[sp,#2\] - 1a0: 3cc043e7 ldr q7, \[sp,#4\] - 1a4: 3cc083e7 ldr q7, \[sp,#8\] + 19c: 3cc023e7 ldur q7, \[sp,#2\] + 1a0: 3cc043e7 ldur q7, \[sp,#4\] + 1a4: 3cc083e7 ldur q7, \[sp,#8\] 1a8: 3dc007e7 ldr q7, \[sp,#16\] - 1ac: 3cc553e7 ldr q7, \[sp,#85\] - 1b0: 3ccff3e7 ldr q7, \[sp,#255\] + 1ac: 3cc553e7 ldur q7, \[sp,#85\] + 1b0: 3ccff3e7 ldur q7, \[sp,#255\] 1b4: 3dffffe7 ldr q7, \[sp,#65520\] - 1b8: 381003e7 strb w7, \[sp,#-256\] - 1bc: 381553e7 strb w7, \[sp,#-171\] + 1b8: 381003e7 sturb w7, \[sp,#-256\] + 1bc: 381553e7 sturb w7, \[sp,#-171\] 1c0: 390003e7 strb w7, \[sp\] 1c4: 390003e7 strb w7, \[sp\] 1c8: 39000be7 strb w7, \[sp,#2\] @@ -126,41 +126,41 @@ Disassembly of section \.text: 1d8: 390157e7 strb w7, \[sp,#85\] 1dc: 3903ffe7 strb w7, \[sp,#255\] 1e0: 393fffe7 strb w7, \[sp,#4095\] - 1e4: 781003e7 strh w7, \[sp,#-256\] - 1e8: 781553e7 strh w7, \[sp,#-171\] + 1e4: 781003e7 sturh w7, \[sp,#-256\] + 1e8: 781553e7 sturh w7, \[sp,#-171\] 1ec: 790003e7 strh w7, \[sp\] 1f0: 790003e7 strh w7, \[sp\] 1f4: 790007e7 strh w7, \[sp,#2\] 1f8: 79000be7 strh w7, \[sp,#4\] 1fc: 790013e7 strh w7, \[sp,#8\] 200: 790023e7 strh w7, \[sp,#16\] - 204: 780553e7 strh w7, \[sp,#85\] - 208: 780ff3e7 strh w7, \[sp,#255\] + 204: 780553e7 sturh w7, \[sp,#85\] + 208: 780ff3e7 sturh w7, \[sp,#255\] 20c: 793fffe7 strh w7, \[sp,#8190\] - 210: b81003e7 str w7, \[sp,#-256\] - 214: b81553e7 str w7, \[sp,#-171\] + 210: b81003e7 stur w7, \[sp,#-256\] + 214: b81553e7 stur w7, \[sp,#-171\] 218: b90003e7 str w7, \[sp\] 21c: b90003e7 str w7, \[sp\] - 220: b80023e7 str w7, \[sp,#2\] + 220: b80023e7 stur w7, \[sp,#2\] 224: b90007e7 str w7, \[sp,#4\] 228: b9000be7 str w7, \[sp,#8\] 22c: b90013e7 str w7, \[sp,#16\] - 230: b80553e7 str w7, \[sp,#85\] - 234: b80ff3e7 str w7, \[sp,#255\] + 230: b80553e7 stur w7, \[sp,#85\] + 234: b80ff3e7 stur w7, \[sp,#255\] 238: b93fffe7 str w7, \[sp,#16380\] - 23c: f81003e7 str x7, \[sp,#-256\] - 240: f81553e7 str x7, \[sp,#-171\] + 23c: f81003e7 stur x7, \[sp,#-256\] + 240: f81553e7 stur x7, \[sp,#-171\] 244: f90003e7 str x7, \[sp\] 248: f90003e7 str x7, \[sp\] - 24c: f80023e7 str x7, \[sp,#2\] - 250: f80043e7 str x7, \[sp,#4\] + 24c: f80023e7 stur x7, \[sp,#2\] + 250: f80043e7 stur x7, \[sp,#4\] 254: f90007e7 str x7, \[sp,#8\] 258: f9000be7 str x7, \[sp,#16\] - 25c: f80553e7 str x7, \[sp,#85\] - 260: f80ff3e7 str x7, \[sp,#255\] + 25c: f80553e7 stur x7, \[sp,#85\] + 260: f80ff3e7 stur x7, \[sp,#255\] 264: f93fffe7 str x7, \[sp,#32760\] - 268: 385003e7 ldrb w7, \[sp,#-256\] - 26c: 385553e7 ldrb w7, \[sp,#-171\] + 268: 385003e7 ldurb w7, \[sp,#-256\] + 26c: 385553e7 ldurb w7, \[sp,#-171\] 270: 394003e7 ldrb w7, \[sp\] 274: 394003e7 ldrb w7, \[sp\] 278: 39400be7 ldrb w7, \[sp,#2\] @@ -170,41 +170,41 @@ Disassembly of section \.text: 288: 394157e7 ldrb w7, \[sp,#85\] 28c: 3943ffe7 ldrb w7, \[sp,#255\] 290: 397fffe7 ldrb w7, \[sp,#4095\] - 294: 785003e7 ldrh w7, \[sp,#-256\] - 298: 785553e7 ldrh w7, \[sp,#-171\] + 294: 785003e7 ldurh w7, \[sp,#-256\] + 298: 785553e7 ldurh w7, \[sp,#-171\] 29c: 794003e7 ldrh w7, \[sp\] 2a0: 794003e7 ldrh w7, \[sp\] 2a4: 794007e7 ldrh w7, \[sp,#2\] 2a8: 79400be7 ldrh w7, \[sp,#4\] 2ac: 794013e7 ldrh w7, \[sp,#8\] 2b0: 794023e7 ldrh w7, \[sp,#16\] - 2b4: 784553e7 ldrh w7, \[sp,#85\] - 2b8: 784ff3e7 ldrh w7, \[sp,#255\] + 2b4: 784553e7 ldurh w7, \[sp,#85\] + 2b8: 784ff3e7 ldurh w7, \[sp,#255\] 2bc: 797fffe7 ldrh w7, \[sp,#8190\] - 2c0: b85003e7 ldr w7, \[sp,#-256\] - 2c4: b85553e7 ldr w7, \[sp,#-171\] + 2c0: b85003e7 ldur w7, \[sp,#-256\] + 2c4: b85553e7 ldur w7, \[sp,#-171\] 2c8: b94003e7 ldr w7, \[sp\] 2cc: b94003e7 ldr w7, \[sp\] - 2d0: b84023e7 ldr w7, \[sp,#2\] + 2d0: b84023e7 ldur w7, \[sp,#2\] 2d4: b94007e7 ldr w7, \[sp,#4\] 2d8: b9400be7 ldr w7, \[sp,#8\] 2dc: b94013e7 ldr w7, \[sp,#16\] - 2e0: b84553e7 ldr w7, \[sp,#85\] - 2e4: b84ff3e7 ldr w7, \[sp,#255\] + 2e0: b84553e7 ldur w7, \[sp,#85\] + 2e4: b84ff3e7 ldur w7, \[sp,#255\] 2e8: b97fffe7 ldr w7, \[sp,#16380\] - 2ec: f85003e7 ldr x7, \[sp,#-256\] - 2f0: f85553e7 ldr x7, \[sp,#-171\] + 2ec: f85003e7 ldur x7, \[sp,#-256\] + 2f0: f85553e7 ldur x7, \[sp,#-171\] 2f4: f94003e7 ldr x7, \[sp\] 2f8: f94003e7 ldr x7, \[sp\] - 2fc: f84023e7 ldr x7, \[sp,#2\] - 300: f84043e7 ldr x7, \[sp,#4\] + 2fc: f84023e7 ldur x7, \[sp,#2\] + 300: f84043e7 ldur x7, \[sp,#4\] 304: f94007e7 ldr x7, \[sp,#8\] 308: f9400be7 ldr x7, \[sp,#16\] - 30c: f84553e7 ldr x7, \[sp,#85\] - 310: f84ff3e7 ldr x7, \[sp,#255\] + 30c: f84553e7 ldur x7, \[sp,#85\] + 310: f84ff3e7 ldur x7, \[sp,#255\] 314: f97fffe7 ldr x7, \[sp,#32760\] - 318: 389003e7 ldrsb x7, \[sp,#-256\] - 31c: 389553e7 ldrsb x7, \[sp,#-171\] + 318: 389003e7 ldursb x7, \[sp,#-256\] + 31c: 389553e7 ldursb x7, \[sp,#-171\] 320: 398003e7 ldrsb x7, \[sp\] 324: 398003e7 ldrsb x7, \[sp\] 328: 39800be7 ldrsb x7, \[sp,#2\] @@ -214,30 +214,30 @@ Disassembly of section \.text: 338: 398157e7 ldrsb x7, \[sp,#85\] 33c: 3983ffe7 ldrsb x7, \[sp,#255\] 340: 39bfffe7 ldrsb x7, \[sp,#4095\] - 344: 789003e7 ldrsh x7, \[sp,#-256\] - 348: 789553e7 ldrsh x7, \[sp,#-171\] + 344: 789003e7 ldursh x7, \[sp,#-256\] + 348: 789553e7 ldursh x7, \[sp,#-171\] 34c: 798003e7 ldrsh x7, \[sp\] 350: 798003e7 ldrsh x7, \[sp\] 354: 798007e7 ldrsh x7, \[sp,#2\] 358: 79800be7 ldrsh x7, \[sp,#4\] 35c: 798013e7 ldrsh x7, \[sp,#8\] 360: 798023e7 ldrsh x7, \[sp,#16\] - 364: 788553e7 ldrsh x7, \[sp,#85\] - 368: 788ff3e7 ldrsh x7, \[sp,#255\] + 364: 788553e7 ldursh x7, \[sp,#85\] + 368: 788ff3e7 ldursh x7, \[sp,#255\] 36c: 79bfffe7 ldrsh x7, \[sp,#8190\] - 370: b89003e7 ldrsw x7, \[sp,#-256\] - 374: b89553e7 ldrsw x7, \[sp,#-171\] + 370: b89003e7 ldursw x7, \[sp,#-256\] + 374: b89553e7 ldursw x7, \[sp,#-171\] 378: b98003e7 ldrsw x7, \[sp\] 37c: b98003e7 ldrsw x7, \[sp\] - 380: b88023e7 ldrsw x7, \[sp,#2\] + 380: b88023e7 ldursw x7, \[sp,#2\] 384: b98007e7 ldrsw x7, \[sp,#4\] 388: b9800be7 ldrsw x7, \[sp,#8\] 38c: b98013e7 ldrsw x7, \[sp,#16\] - 390: b88553e7 ldrsw x7, \[sp,#85\] - 394: b88ff3e7 ldrsw x7, \[sp,#255\] + 390: b88553e7 ldursw x7, \[sp,#85\] + 394: b88ff3e7 ldursw x7, \[sp,#255\] 398: b9bfffe7 ldrsw x7, \[sp,#16380\] - 39c: 38d003e7 ldrsb w7, \[sp,#-256\] - 3a0: 38d553e7 ldrsb w7, \[sp,#-171\] + 39c: 38d003e7 ldursb w7, \[sp,#-256\] + 3a0: 38d553e7 ldursb w7, \[sp,#-171\] 3a4: 39c003e7 ldrsb w7, \[sp\] 3a8: 39c003e7 ldrsb w7, \[sp\] 3ac: 39c00be7 ldrsb w7, \[sp,#2\] @@ -247,14 +247,14 @@ Disassembly of section \.text: 3bc: 39c157e7 ldrsb w7, \[sp,#85\] 3c0: 39c3ffe7 ldrsb w7, \[sp,#255\] 3c4: 39ffffe7 ldrsb w7, \[sp,#4095\] - 3c8: 78d003e7 ldrsh w7, \[sp,#-256\] - 3cc: 78d553e7 ldrsh w7, \[sp,#-171\] + 3c8: 78d003e7 ldursh w7, \[sp,#-256\] + 3cc: 78d553e7 ldursh w7, \[sp,#-171\] 3d0: 79c003e7 ldrsh w7, \[sp\] 3d4: 79c003e7 ldrsh w7, \[sp\] 3d8: 79c007e7 ldrsh w7, \[sp,#2\] 3dc: 79c00be7 ldrsh w7, \[sp,#4\] 3e0: 79c013e7 ldrsh w7, \[sp,#8\] 3e4: 79c023e7 ldrsh w7, \[sp,#16\] - 3e8: 78c553e7 ldrsh w7, \[sp,#85\] - 3ec: 78cff3e7 ldrsh w7, \[sp,#255\] + 3e8: 78c553e7 ldursh w7, \[sp,#85\] + 3ec: 78cff3e7 ldursh w7, \[sp,#255\] 3f0: 79ffffe7 ldrsh w7, \[sp,#8190\] diff --git a/gas/testsuite/gas/aarch64/ldst-reg-unscaled-imm.d b/gas/testsuite/gas/aarch64/ldst-reg-unscaled-imm.d index 39dba7b4889..03358e9abb4 100644 --- a/gas/testsuite/gas/aarch64/ldst-reg-unscaled-imm.d +++ b/gas/testsuite/gas/aarch64/ldst-reg-unscaled-imm.d @@ -5,8 +5,8 @@ Disassembly of section \.text: 0000000000000000 <.*>: - 0: 3c1003e7 str b7, \[sp,#-256\] - 4: 3c1553e7 str b7, \[sp,#-171\] + 0: 3c1003e7 stur b7, \[sp,#-256\] + 4: 3c1553e7 stur b7, \[sp,#-171\] 8: 3c0003e7 stur b7, \[sp\] c: 3c0003e7 stur b7, \[sp\] 10: 3c0023e7 stur b7, \[sp,#2\] @@ -15,48 +15,48 @@ Disassembly of section \.text: 1c: 3c0103e7 stur b7, \[sp,#16\] 20: 3c0553e7 stur b7, \[sp,#85\] 24: 3c0ff3e7 stur b7, \[sp,#255\] - 28: 7c1003e7 str h7, \[sp,#-256\] - 2c: 7c1553e7 str h7, \[sp,#-171\] + 28: 7c1003e7 stur h7, \[sp,#-256\] + 2c: 7c1553e7 stur h7, \[sp,#-171\] 30: 7c0003e7 stur h7, \[sp\] 34: 7c0003e7 stur h7, \[sp\] 38: 7c0023e7 stur h7, \[sp,#2\] 3c: 7c0043e7 stur h7, \[sp,#4\] 40: 7c0083e7 stur h7, \[sp,#8\] 44: 7c0103e7 stur h7, \[sp,#16\] - 48: 7c0553e7 str h7, \[sp,#85\] - 4c: 7c0ff3e7 str h7, \[sp,#255\] - 50: bc1003e7 str s7, \[sp,#-256\] - 54: bc1553e7 str s7, \[sp,#-171\] + 48: 7c0553e7 stur h7, \[sp,#85\] + 4c: 7c0ff3e7 stur h7, \[sp,#255\] + 50: bc1003e7 stur s7, \[sp,#-256\] + 54: bc1553e7 stur s7, \[sp,#-171\] 58: bc0003e7 stur s7, \[sp\] 5c: bc0003e7 stur s7, \[sp\] - 60: bc0023e7 str s7, \[sp,#2\] + 60: bc0023e7 stur s7, \[sp,#2\] 64: bc0043e7 stur s7, \[sp,#4\] 68: bc0083e7 stur s7, \[sp,#8\] 6c: bc0103e7 stur s7, \[sp,#16\] - 70: bc0553e7 str s7, \[sp,#85\] - 74: bc0ff3e7 str s7, \[sp,#255\] - 78: fc1003e7 str d7, \[sp,#-256\] - 7c: fc1553e7 str d7, \[sp,#-171\] + 70: bc0553e7 stur s7, \[sp,#85\] + 74: bc0ff3e7 stur s7, \[sp,#255\] + 78: fc1003e7 stur d7, \[sp,#-256\] + 7c: fc1553e7 stur d7, \[sp,#-171\] 80: fc0003e7 stur d7, \[sp\] 84: fc0003e7 stur d7, \[sp\] - 88: fc0023e7 str d7, \[sp,#2\] - 8c: fc0043e7 str d7, \[sp,#4\] + 88: fc0023e7 stur d7, \[sp,#2\] + 8c: fc0043e7 stur d7, \[sp,#4\] 90: fc0083e7 stur d7, \[sp,#8\] 94: fc0103e7 stur d7, \[sp,#16\] - 98: fc0553e7 str d7, \[sp,#85\] - 9c: fc0ff3e7 str d7, \[sp,#255\] - a0: 3c9003e7 str q7, \[sp,#-256\] - a4: 3c9553e7 str q7, \[sp,#-171\] + 98: fc0553e7 stur d7, \[sp,#85\] + 9c: fc0ff3e7 stur d7, \[sp,#255\] + a0: 3c9003e7 stur q7, \[sp,#-256\] + a4: 3c9553e7 stur q7, \[sp,#-171\] a8: 3c8003e7 stur q7, \[sp\] ac: 3c8003e7 stur q7, \[sp\] - b0: 3c8023e7 str q7, \[sp,#2\] - b4: 3c8043e7 str q7, \[sp,#4\] - b8: 3c8083e7 str q7, \[sp,#8\] + b0: 3c8023e7 stur q7, \[sp,#2\] + b4: 3c8043e7 stur q7, \[sp,#4\] + b8: 3c8083e7 stur q7, \[sp,#8\] bc: 3c8103e7 stur q7, \[sp,#16\] - c0: 3c8553e7 str q7, \[sp,#85\] - c4: 3c8ff3e7 str q7, \[sp,#255\] - c8: 3c5003e7 ldr b7, \[sp,#-256\] - cc: 3c5553e7 ldr b7, \[sp,#-171\] + c0: 3c8553e7 stur q7, \[sp,#85\] + c4: 3c8ff3e7 stur q7, \[sp,#255\] + c8: 3c5003e7 ldur b7, \[sp,#-256\] + cc: 3c5553e7 ldur b7, \[sp,#-171\] d0: 3c4003e7 ldur b7, \[sp\] d4: 3c4003e7 ldur b7, \[sp\] d8: 3c4023e7 ldur b7, \[sp,#2\] @@ -65,48 +65,48 @@ Disassembly of section \.text: e4: 3c4103e7 ldur b7, \[sp,#16\] e8: 3c4553e7 ldur b7, \[sp,#85\] ec: 3c4ff3e7 ldur b7, \[sp,#255\] - f0: 7c5003e7 ldr h7, \[sp,#-256\] - f4: 7c5553e7 ldr h7, \[sp,#-171\] + f0: 7c5003e7 ldur h7, \[sp,#-256\] + f4: 7c5553e7 ldur h7, \[sp,#-171\] f8: 7c4003e7 ldur h7, \[sp\] fc: 7c4003e7 ldur h7, \[sp\] 100: 7c4023e7 ldur h7, \[sp,#2\] 104: 7c4043e7 ldur h7, \[sp,#4\] 108: 7c4083e7 ldur h7, \[sp,#8\] 10c: 7c4103e7 ldur h7, \[sp,#16\] - 110: 7c4553e7 ldr h7, \[sp,#85\] - 114: 7c4ff3e7 ldr h7, \[sp,#255\] - 118: bc5003e7 ldr s7, \[sp,#-256\] - 11c: bc5553e7 ldr s7, \[sp,#-171\] + 110: 7c4553e7 ldur h7, \[sp,#85\] + 114: 7c4ff3e7 ldur h7, \[sp,#255\] + 118: bc5003e7 ldur s7, \[sp,#-256\] + 11c: bc5553e7 ldur s7, \[sp,#-171\] 120: bc4003e7 ldur s7, \[sp\] 124: bc4003e7 ldur s7, \[sp\] - 128: bc4023e7 ldr s7, \[sp,#2\] + 128: bc4023e7 ldur s7, \[sp,#2\] 12c: bc4043e7 ldur s7, \[sp,#4\] 130: bc4083e7 ldur s7, \[sp,#8\] 134: bc4103e7 ldur s7, \[sp,#16\] - 138: bc4553e7 ldr s7, \[sp,#85\] - 13c: bc4ff3e7 ldr s7, \[sp,#255\] - 140: fc5003e7 ldr d7, \[sp,#-256\] - 144: fc5553e7 ldr d7, \[sp,#-171\] + 138: bc4553e7 ldur s7, \[sp,#85\] + 13c: bc4ff3e7 ldur s7, \[sp,#255\] + 140: fc5003e7 ldur d7, \[sp,#-256\] + 144: fc5553e7 ldur d7, \[sp,#-171\] 148: fc4003e7 ldur d7, \[sp\] 14c: fc4003e7 ldur d7, \[sp\] - 150: fc4023e7 ldr d7, \[sp,#2\] - 154: fc4043e7 ldr d7, \[sp,#4\] + 150: fc4023e7 ldur d7, \[sp,#2\] + 154: fc4043e7 ldur d7, \[sp,#4\] 158: fc4083e7 ldur d7, \[sp,#8\] 15c: fc4103e7 ldur d7, \[sp,#16\] - 160: fc4553e7 ldr d7, \[sp,#85\] - 164: fc4ff3e7 ldr d7, \[sp,#255\] - 168: 3cd003e7 ldr q7, \[sp,#-256\] - 16c: 3cd553e7 ldr q7, \[sp,#-171\] + 160: fc4553e7 ldur d7, \[sp,#85\] + 164: fc4ff3e7 ldur d7, \[sp,#255\] + 168: 3cd003e7 ldur q7, \[sp,#-256\] + 16c: 3cd553e7 ldur q7, \[sp,#-171\] 170: 3cc003e7 ldur q7, \[sp\] 174: 3cc003e7 ldur q7, \[sp\] - 178: 3cc023e7 ldr q7, \[sp,#2\] - 17c: 3cc043e7 ldr q7, \[sp,#4\] - 180: 3cc083e7 ldr q7, \[sp,#8\] + 178: 3cc023e7 ldur q7, \[sp,#2\] + 17c: 3cc043e7 ldur q7, \[sp,#4\] + 180: 3cc083e7 ldur q7, \[sp,#8\] 184: 3cc103e7 ldur q7, \[sp,#16\] - 188: 3cc553e7 ldr q7, \[sp,#85\] - 18c: 3ccff3e7 ldr q7, \[sp,#255\] - 190: 381003e7 strb w7, \[sp,#-256\] - 194: 381553e7 strb w7, \[sp,#-171\] + 188: 3cc553e7 ldur q7, \[sp,#85\] + 18c: 3ccff3e7 ldur q7, \[sp,#255\] + 190: 381003e7 sturb w7, \[sp,#-256\] + 194: 381553e7 sturb w7, \[sp,#-171\] 198: 380003e7 sturb w7, \[sp\] 19c: 380003e7 sturb w7, \[sp\] 1a0: 380023e7 sturb w7, \[sp,#2\] @@ -115,38 +115,38 @@ Disassembly of section \.text: 1ac: 380103e7 sturb w7, \[sp,#16\] 1b0: 380553e7 sturb w7, \[sp,#85\] 1b4: 380ff3e7 sturb w7, \[sp,#255\] - 1b8: 781003e7 strh w7, \[sp,#-256\] - 1bc: 781553e7 strh w7, \[sp,#-171\] + 1b8: 781003e7 sturh w7, \[sp,#-256\] + 1bc: 781553e7 sturh w7, \[sp,#-171\] 1c0: 780003e7 sturh w7, \[sp\] 1c4: 780003e7 sturh w7, \[sp\] 1c8: 780023e7 sturh w7, \[sp,#2\] 1cc: 780043e7 sturh w7, \[sp,#4\] 1d0: 780083e7 sturh w7, \[sp,#8\] 1d4: 780103e7 sturh w7, \[sp,#16\] - 1d8: 780553e7 strh w7, \[sp,#85\] - 1dc: 780ff3e7 strh w7, \[sp,#255\] - 1e0: b81003e7 str w7, \[sp,#-256\] - 1e4: b81553e7 str w7, \[sp,#-171\] + 1d8: 780553e7 sturh w7, \[sp,#85\] + 1dc: 780ff3e7 sturh w7, \[sp,#255\] + 1e0: b81003e7 stur w7, \[sp,#-256\] + 1e4: b81553e7 stur w7, \[sp,#-171\] 1e8: b80003e7 stur w7, \[sp\] 1ec: b80003e7 stur w7, \[sp\] - 1f0: b80023e7 str w7, \[sp,#2\] + 1f0: b80023e7 stur w7, \[sp,#2\] 1f4: b80043e7 stur w7, \[sp,#4\] 1f8: b80083e7 stur w7, \[sp,#8\] 1fc: b80103e7 stur w7, \[sp,#16\] - 200: b80553e7 str w7, \[sp,#85\] - 204: b80ff3e7 str w7, \[sp,#255\] - 208: f81003e7 str x7, \[sp,#-256\] - 20c: f81553e7 str x7, \[sp,#-171\] + 200: b80553e7 stur w7, \[sp,#85\] + 204: b80ff3e7 stur w7, \[sp,#255\] + 208: f81003e7 stur x7, \[sp,#-256\] + 20c: f81553e7 stur x7, \[sp,#-171\] 210: f80003e7 stur x7, \[sp\] 214: f80003e7 stur x7, \[sp\] - 218: f80023e7 str x7, \[sp,#2\] - 21c: f80043e7 str x7, \[sp,#4\] + 218: f80023e7 stur x7, \[sp,#2\] + 21c: f80043e7 stur x7, \[sp,#4\] 220: f80083e7 stur x7, \[sp,#8\] 224: f80103e7 stur x7, \[sp,#16\] - 228: f80553e7 str x7, \[sp,#85\] - 22c: f80ff3e7 str x7, \[sp,#255\] - 230: 385003e7 ldrb w7, \[sp,#-256\] - 234: 385553e7 ldrb w7, \[sp,#-171\] + 228: f80553e7 stur x7, \[sp,#85\] + 22c: f80ff3e7 stur x7, \[sp,#255\] + 230: 385003e7 ldurb w7, \[sp,#-256\] + 234: 385553e7 ldurb w7, \[sp,#-171\] 238: 384003e7 ldurb w7, \[sp\] 23c: 384003e7 ldurb w7, \[sp\] 240: 384023e7 ldurb w7, \[sp,#2\] @@ -155,38 +155,38 @@ Disassembly of section \.text: 24c: 384103e7 ldurb w7, \[sp,#16\] 250: 384553e7 ldurb w7, \[sp,#85\] 254: 384ff3e7 ldurb w7, \[sp,#255\] - 258: 785003e7 ldrh w7, \[sp,#-256\] - 25c: 785553e7 ldrh w7, \[sp,#-171\] + 258: 785003e7 ldurh w7, \[sp,#-256\] + 25c: 785553e7 ldurh w7, \[sp,#-171\] 260: 784003e7 ldurh w7, \[sp\] 264: 784003e7 ldurh w7, \[sp\] 268: 784023e7 ldurh w7, \[sp,#2\] 26c: 784043e7 ldurh w7, \[sp,#4\] 270: 784083e7 ldurh w7, \[sp,#8\] 274: 784103e7 ldurh w7, \[sp,#16\] - 278: 784553e7 ldrh w7, \[sp,#85\] - 27c: 784ff3e7 ldrh w7, \[sp,#255\] - 280: b85003e7 ldr w7, \[sp,#-256\] - 284: b85553e7 ldr w7, \[sp,#-171\] + 278: 784553e7 ldurh w7, \[sp,#85\] + 27c: 784ff3e7 ldurh w7, \[sp,#255\] + 280: b85003e7 ldur w7, \[sp,#-256\] + 284: b85553e7 ldur w7, \[sp,#-171\] 288: b84003e7 ldur w7, \[sp\] 28c: b84003e7 ldur w7, \[sp\] - 290: b84023e7 ldr w7, \[sp,#2\] + 290: b84023e7 ldur w7, \[sp,#2\] 294: b84043e7 ldur w7, \[sp,#4\] 298: b84083e7 ldur w7, \[sp,#8\] 29c: b84103e7 ldur w7, \[sp,#16\] - 2a0: b84553e7 ldr w7, \[sp,#85\] - 2a4: b84ff3e7 ldr w7, \[sp,#255\] - 2a8: f85003e7 ldr x7, \[sp,#-256\] - 2ac: f85553e7 ldr x7, \[sp,#-171\] + 2a0: b84553e7 ldur w7, \[sp,#85\] + 2a4: b84ff3e7 ldur w7, \[sp,#255\] + 2a8: f85003e7 ldur x7, \[sp,#-256\] + 2ac: f85553e7 ldur x7, \[sp,#-171\] 2b0: f84003e7 ldur x7, \[sp\] 2b4: f84003e7 ldur x7, \[sp\] - 2b8: f84023e7 ldr x7, \[sp,#2\] - 2bc: f84043e7 ldr x7, \[sp,#4\] + 2b8: f84023e7 ldur x7, \[sp,#2\] + 2bc: f84043e7 ldur x7, \[sp,#4\] 2c0: f84083e7 ldur x7, \[sp,#8\] 2c4: f84103e7 ldur x7, \[sp,#16\] - 2c8: f84553e7 ldr x7, \[sp,#85\] - 2cc: f84ff3e7 ldr x7, \[sp,#255\] - 2d0: 389003e7 ldrsb x7, \[sp,#-256\] - 2d4: 389553e7 ldrsb x7, \[sp,#-171\] + 2c8: f84553e7 ldur x7, \[sp,#85\] + 2cc: f84ff3e7 ldur x7, \[sp,#255\] + 2d0: 389003e7 ldursb x7, \[sp,#-256\] + 2d4: 389553e7 ldursb x7, \[sp,#-171\] 2d8: 388003e7 ldursb x7, \[sp\] 2dc: 388003e7 ldursb x7, \[sp\] 2e0: 388023e7 ldursb x7, \[sp,#2\] @@ -195,28 +195,28 @@ Disassembly of section \.text: 2ec: 388103e7 ldursb x7, \[sp,#16\] 2f0: 388553e7 ldursb x7, \[sp,#85\] 2f4: 388ff3e7 ldursb x7, \[sp,#255\] - 2f8: 789003e7 ldrsh x7, \[sp,#-256\] - 2fc: 789553e7 ldrsh x7, \[sp,#-171\] + 2f8: 789003e7 ldursh x7, \[sp,#-256\] + 2fc: 789553e7 ldursh x7, \[sp,#-171\] 300: 788003e7 ldursh x7, \[sp\] 304: 788003e7 ldursh x7, \[sp\] 308: 788023e7 ldursh x7, \[sp,#2\] 30c: 788043e7 ldursh x7, \[sp,#4\] 310: 788083e7 ldursh x7, \[sp,#8\] 314: 788103e7 ldursh x7, \[sp,#16\] - 318: 788553e7 ldrsh x7, \[sp,#85\] - 31c: 788ff3e7 ldrsh x7, \[sp,#255\] - 320: b89003e7 ldrsw x7, \[sp,#-256\] - 324: b89553e7 ldrsw x7, \[sp,#-171\] + 318: 788553e7 ldursh x7, \[sp,#85\] + 31c: 788ff3e7 ldursh x7, \[sp,#255\] + 320: b89003e7 ldursw x7, \[sp,#-256\] + 324: b89553e7 ldursw x7, \[sp,#-171\] 328: b88003e7 ldursw x7, \[sp\] 32c: b88003e7 ldursw x7, \[sp\] - 330: b88023e7 ldrsw x7, \[sp,#2\] + 330: b88023e7 ldursw x7, \[sp,#2\] 334: b88043e7 ldursw x7, \[sp,#4\] 338: b88083e7 ldursw x7, \[sp,#8\] 33c: b88103e7 ldursw x7, \[sp,#16\] - 340: b88553e7 ldrsw x7, \[sp,#85\] - 344: b88ff3e7 ldrsw x7, \[sp,#255\] - 348: 38d003e7 ldrsb w7, \[sp,#-256\] - 34c: 38d553e7 ldrsb w7, \[sp,#-171\] + 340: b88553e7 ldursw x7, \[sp,#85\] + 344: b88ff3e7 ldursw x7, \[sp,#255\] + 348: 38d003e7 ldursb w7, \[sp,#-256\] + 34c: 38d553e7 ldursb w7, \[sp,#-171\] 350: 38c003e7 ldursb w7, \[sp\] 354: 38c003e7 ldursb w7, \[sp\] 358: 38c023e7 ldursb w7, \[sp,#2\] @@ -225,13 +225,13 @@ Disassembly of section \.text: 364: 38c103e7 ldursb w7, \[sp,#16\] 368: 38c553e7 ldursb w7, \[sp,#85\] 36c: 38cff3e7 ldursb w7, \[sp,#255\] - 370: 78d003e7 ldrsh w7, \[sp,#-256\] - 374: 78d553e7 ldrsh w7, \[sp,#-171\] + 370: 78d003e7 ldursh w7, \[sp,#-256\] + 374: 78d553e7 ldursh w7, \[sp,#-171\] 378: 78c003e7 ldursh w7, \[sp\] 37c: 78c003e7 ldursh w7, \[sp\] 380: 78c023e7 ldursh w7, \[sp,#2\] 384: 78c043e7 ldursh w7, \[sp,#4\] 388: 78c083e7 ldursh w7, \[sp,#8\] 38c: 78c103e7 ldursh w7, \[sp,#16\] - 390: 78c553e7 ldrsh w7, \[sp,#85\] - 394: 78cff3e7 ldrsh w7, \[sp,#255\] + 390: 78c553e7 ldursh w7, \[sp,#85\] + 394: 78cff3e7 ldursh w7, \[sp,#255\] diff --git a/gas/testsuite/gas/aarch64/reloc-insn.d b/gas/testsuite/gas/aarch64/reloc-insn.d index afcccc76e0c..a9aa0978884 100644 --- a/gas/testsuite/gas/aarch64/reloc-insn.d +++ b/gas/testsuite/gas/aarch64/reloc-insn.d @@ -139,7 +139,7 @@ Disassembly of section \.text: 160: d41fffe1 svc #0xffff 164: f8500420 ldr x0, \[x1\],#-256 168: f8500c20 ldr x0, \[x1,#-256\]! - 16c: f8500020 ldr x0, \[x1,#-256\] + 16c: f8500020 ldur x0, \[x1,#-256\] 170: f97ffc20 ldr x0, \[x1,#32760\] 174: 79400000 ldrh w0, \[x0\] 174: R_AARCH64_LDST16_ABS_LO12_NC \.text\+0x194 diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 22408be7af7..b30907b78b7 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,12 @@ +2015-03-10 Renlin Li + + * aarch64-tbl.h (aarch64_opcode_table): Remove strub, ldurb, ldursb, + stur, ldur, sturh, ldurh, ldursh, ldursw, prfum F_HAS_ALIAS flag and + related alias. + * aarch64-asm-2.c: Regenerate. + * aarch64-dis-2.c: Likewise. + * aarch64-opc-2.c: Likewise. + 2015-03-03 Jiong Wang * arm-dis.c (arm_symbol_is_valid): Skip ARM private symbols. diff --git a/opcodes/aarch64-asm-2.c b/opcodes/aarch64-asm-2.c index 102fa045ad9..dd69dbee0b1 100644 --- a/opcodes/aarch64-asm-2.c +++ b/opcodes/aarch64-asm-2.c @@ -155,224 +155,188 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode) case 595: /* ror */ value = 594; /* --> extr. */ break; - case 695: /* strb */ - value = 693; /* --> sturb. */ + case 746: /* bic */ + value = 745; /* --> and. */ break; - case 696: /* ldrb */ - value = 694; /* --> ldurb. */ + case 748: /* mov */ + value = 747; /* --> orr. */ break; - case 698: /* ldrsb */ - value = 697; /* --> ldursb. */ + case 751: /* tst */ + value = 750; /* --> ands. */ break; - case 701: /* str */ - value = 699; /* --> stur. */ + case 756: /* uxtw */ + case 755: /* mov */ + value = 754; /* --> orr. */ break; - case 702: /* ldr */ - value = 700; /* --> ldur. */ + case 758: /* mvn */ + value = 757; /* --> orn. */ break; - case 705: /* strh */ - value = 703; /* --> sturh. */ + case 762: /* tst */ + value = 761; /* --> ands. */ break; - case 706: /* ldrh */ - value = 704; /* --> ldurh. */ + case 888: /* staddb */ + value = 792; /* --> ldaddb. */ break; - case 708: /* ldrsh */ - value = 707; /* --> ldursh. */ + case 889: /* staddh */ + value = 793; /* --> ldaddh. */ break; - case 711: /* str */ - value = 709; /* --> stur. */ + case 890: /* stadd */ + value = 794; /* --> ldadd. */ break; - case 712: /* ldr */ - value = 710; /* --> ldur. */ + case 891: /* staddlb */ + value = 796; /* --> ldaddlb. */ break; - case 714: /* ldrsw */ - value = 713; /* --> ldursw. */ + case 892: /* staddlh */ + value = 799; /* --> ldaddlh. */ break; - case 716: /* prfm */ - value = 715; /* --> prfum. */ + case 893: /* staddl */ + value = 802; /* --> ldaddl. */ break; - case 758: /* bic */ - value = 757; /* --> and. */ + case 894: /* stclrb */ + value = 804; /* --> ldclrb. */ break; - case 760: /* mov */ - value = 759; /* --> orr. */ + case 895: /* stclrh */ + value = 805; /* --> ldclrh. */ break; - case 763: /* tst */ - value = 762; /* --> ands. */ + case 896: /* stclr */ + value = 806; /* --> ldclr. */ break; - case 768: /* uxtw */ - case 767: /* mov */ - value = 766; /* --> orr. */ + case 897: /* stclrlb */ + value = 808; /* --> ldclrlb. */ break; - case 770: /* mvn */ - value = 769; /* --> orn. */ + case 898: /* stclrlh */ + value = 811; /* --> ldclrlh. */ break; - case 774: /* tst */ - value = 773; /* --> ands. */ + case 899: /* stclrl */ + value = 814; /* --> ldclrl. */ break; - case 900: /* staddb */ - value = 804; /* --> ldaddb. */ + case 900: /* steorb */ + value = 816; /* --> ldeorb. */ break; - case 901: /* staddh */ - value = 805; /* --> ldaddh. */ + case 901: /* steorh */ + value = 817; /* --> ldeorh. */ break; - case 902: /* stadd */ - value = 806; /* --> ldadd. */ + case 902: /* steor */ + value = 818; /* --> ldeor. */ break; - case 903: /* staddlb */ - value = 808; /* --> ldaddlb. */ + case 903: /* steorlb */ + value = 820; /* --> ldeorlb. */ break; - case 904: /* staddlh */ - value = 811; /* --> ldaddlh. */ + case 904: /* steorlh */ + value = 823; /* --> ldeorlh. */ break; - case 905: /* staddl */ - value = 814; /* --> ldaddl. */ + case 905: /* steorl */ + value = 826; /* --> ldeorl. */ break; - case 906: /* stclrb */ - value = 816; /* --> ldclrb. */ + case 906: /* stsetb */ + value = 828; /* --> ldsetb. */ break; - case 907: /* stclrh */ - value = 817; /* --> ldclrh. */ + case 907: /* stseth */ + value = 829; /* --> ldseth. */ break; - case 908: /* stclr */ - value = 818; /* --> ldclr. */ + case 908: /* stset */ + value = 830; /* --> ldset. */ break; - case 909: /* stclrlb */ - value = 820; /* --> ldclrlb. */ + case 909: /* stsetlb */ + value = 832; /* --> ldsetlb. */ break; - case 910: /* stclrlh */ - value = 823; /* --> ldclrlh. */ + case 910: /* stsetlh */ + value = 835; /* --> ldsetlh. */ break; - case 911: /* stclrl */ - value = 826; /* --> ldclrl. */ + case 911: /* stsetl */ + value = 838; /* --> ldsetl. */ break; - case 912: /* steorb */ - value = 828; /* --> ldeorb. */ + case 912: /* stsmaxb */ + value = 840; /* --> ldsmaxb. */ break; - case 913: /* steorh */ - value = 829; /* --> ldeorh. */ + case 913: /* stsmaxh */ + value = 841; /* --> ldsmaxh. */ break; - case 914: /* steor */ - value = 830; /* --> ldeor. */ + case 914: /* stsmax */ + value = 842; /* --> ldsmax. */ break; - case 915: /* steorlb */ - value = 832; /* --> ldeorlb. */ + case 915: /* stsmaxlb */ + value = 844; /* --> ldsmaxlb. */ break; - case 916: /* steorlh */ - value = 835; /* --> ldeorlh. */ + case 916: /* stsmaxlh */ + value = 847; /* --> ldsmaxlh. */ break; - case 917: /* steorl */ - value = 838; /* --> ldeorl. */ + case 917: /* stsmaxl */ + value = 850; /* --> ldsmaxl. */ break; - case 918: /* stsetb */ - value = 840; /* --> ldsetb. */ + case 918: /* stsminb */ + value = 852; /* --> ldsminb. */ break; - case 919: /* stseth */ - value = 841; /* --> ldseth. */ + case 919: /* stsminh */ + value = 853; /* --> ldsminh. */ break; - case 920: /* stset */ - value = 842; /* --> ldset. */ + case 920: /* stsmin */ + value = 854; /* --> ldsmin. */ break; - case 921: /* stsetlb */ - value = 844; /* --> ldsetlb. */ + case 921: /* stsminlb */ + value = 856; /* --> ldsminlb. */ break; - case 922: /* stsetlh */ - value = 847; /* --> ldsetlh. */ + case 922: /* stsminlh */ + value = 859; /* --> ldsminlh. */ break; - case 923: /* stsetl */ - value = 850; /* --> ldsetl. */ + case 923: /* stsminl */ + value = 862; /* --> ldsminl. */ break; - case 924: /* stsmaxb */ - value = 852; /* --> ldsmaxb. */ + case 924: /* stumaxb */ + value = 864; /* --> ldumaxb. */ break; - case 925: /* stsmaxh */ - value = 853; /* --> ldsmaxh. */ + case 925: /* stumaxh */ + value = 865; /* --> ldumaxh. */ break; - case 926: /* stsmax */ - value = 854; /* --> ldsmax. */ + case 926: /* stumax */ + value = 866; /* --> ldumax. */ break; - case 927: /* stsmaxlb */ - value = 856; /* --> ldsmaxlb. */ + case 927: /* stumaxlb */ + value = 868; /* --> ldumaxlb. */ break; - case 928: /* stsmaxlh */ - value = 859; /* --> ldsmaxlh. */ + case 928: /* stumaxlh */ + value = 871; /* --> ldumaxlh. */ break; - case 929: /* stsmaxl */ - value = 862; /* --> ldsmaxl. */ + case 929: /* stumaxl */ + value = 874; /* --> ldumaxl. */ break; - case 930: /* stsminb */ - value = 864; /* --> ldsminb. */ + case 930: /* stuminb */ + value = 876; /* --> lduminb. */ break; - case 931: /* stsminh */ - value = 865; /* --> ldsminh. */ + case 931: /* stuminh */ + value = 877; /* --> lduminh. */ break; - case 932: /* stsmin */ - value = 866; /* --> ldsmin. */ + case 932: /* stumin */ + value = 878; /* --> ldumin. */ break; - case 933: /* stsminlb */ - value = 868; /* --> ldsminlb. */ + case 933: /* stuminlb */ + value = 880; /* --> lduminlb. */ break; - case 934: /* stsminlh */ - value = 871; /* --> ldsminlh. */ + case 934: /* stuminlh */ + value = 883; /* --> lduminlh. */ break; - case 935: /* stsminl */ - value = 874; /* --> ldsminl. */ + case 935: /* stuminl */ + value = 886; /* --> lduminl. */ break; - case 936: /* stumaxb */ - value = 876; /* --> ldumaxb. */ + case 937: /* mov */ + value = 936; /* --> movn. */ break; - case 937: /* stumaxh */ - value = 877; /* --> ldumaxh. */ + case 939: /* mov */ + value = 938; /* --> movz. */ break; - case 938: /* stumax */ - value = 878; /* --> ldumax. */ + case 950: /* sevl */ + case 949: /* sev */ + case 948: /* wfi */ + case 947: /* wfe */ + case 946: /* yield */ + case 945: /* nop */ + value = 944; /* --> hint. */ break; - case 939: /* stumaxlb */ - value = 880; /* --> ldumaxlb. */ - break; - case 940: /* stumaxlh */ - value = 883; /* --> ldumaxlh. */ - break; - case 941: /* stumaxl */ - value = 886; /* --> ldumaxl. */ - break; - case 942: /* stuminb */ - value = 888; /* --> lduminb. */ - break; - case 943: /* stuminh */ - value = 889; /* --> lduminh. */ - break; - case 944: /* stumin */ - value = 890; /* --> ldumin. */ - break; - case 945: /* stuminlb */ - value = 892; /* --> lduminlb. */ - break; - case 946: /* stuminlh */ - value = 895; /* --> lduminlh. */ - break; - case 947: /* stuminl */ - value = 898; /* --> lduminl. */ - break; - case 949: /* mov */ - value = 948; /* --> movn. */ - break; - case 951: /* mov */ - value = 950; /* --> movz. */ - break; - case 962: /* sevl */ - case 961: /* sev */ - case 960: /* wfi */ - case 959: /* wfe */ - case 958: /* yield */ - case 957: /* nop */ - value = 956; /* --> hint. */ - break; - case 971: /* tlbi */ - case 970: /* ic */ - case 969: /* dc */ - case 968: /* at */ - value = 967; /* --> sys. */ + case 959: /* tlbi */ + case 958: /* ic */ + case 957: /* dc */ + case 956: /* at */ + value = 955; /* --> sys. */ break; default: return NULL; } diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c index 022b78f5a0d..ded92929a85 100644 --- a/opcodes/aarch64-dis-2.c +++ b/opcodes/aarch64-dis-2.c @@ -40,7 +40,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxxxxxxxxxxx0000xxx0 adr. */ - return 953; + return 941; } else { @@ -48,7 +48,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxxxxxxxxxxx0000xxx1 adrp. */ - return 954; + return 942; } } else @@ -115,7 +115,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxx0xxxxx000x0010000 stxrb. */ - return 717; + return 705; } else { @@ -123,7 +123,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxx0xxxxx000x0010010 stxrh. */ - return 723; + return 711; } } else @@ -132,7 +132,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxx0xxxxx000x00100x1 stxr. */ - return 729; + return 717; } } else @@ -143,7 +143,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxx0xxxxx100x00100x0 casp. */ - return 788; + return 776; } else { @@ -151,7 +151,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxx0xxxxx100x00100x1 stxp. */ - return 731; + return 719; } } } @@ -167,7 +167,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxx1xxxxx000x0010000 stlxrb. */ - return 718; + return 706; } else { @@ -175,7 +175,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxx1xxxxx000x0010010 stlxrh. */ - return 724; + return 712; } } else @@ -184,7 +184,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxx1xxxxx000x00100x1 stlxr. */ - return 730; + return 718; } } else @@ -195,7 +195,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxx1xxxxx100x00100x0 caspl. */ - return 790; + return 778; } else { @@ -203,7 +203,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxx1xxxxx100x00100x1 stlxp. */ - return 732; + return 720; } } } @@ -214,7 +214,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxxxxxxxxx00x00101xx stnp. */ - return 739; + return 727; } } else @@ -231,7 +231,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxx0xxxxxx01x0010000 casb. */ - return 776; + return 764; } else { @@ -239,7 +239,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxx0xxxxxx01x0010010 cash. */ - return 777; + return 765; } } else @@ -248,7 +248,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxx0xxxxxx01x00100x1 cas. */ - return 778; + return 766; } } else @@ -263,7 +263,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxx1xxxxx001x0010000 stlrb. */ - return 721; + return 709; } else { @@ -271,7 +271,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxx1xxxxx001x0010010 stlrh. */ - return 727; + return 715; } } else @@ -280,7 +280,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxx1xxxxx001x00100x1 stlr. */ - return 737; + return 725; } } else @@ -293,7 +293,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxx1xxxxx101x0010000 caslb. */ - return 780; + return 768; } else { @@ -301,7 +301,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxx1xxxxx101x0010010 caslh. */ - return 783; + return 771; } } else @@ -310,7 +310,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxx1xxxxx101x00100x1 casl. */ - return 786; + return 774; } } } @@ -321,7 +321,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxxxxxxxxx01x00101xx stp. */ - return 748; + return 736; } } } @@ -343,7 +343,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxx0xxxxx010x0010000 ldxrb. */ - return 719; + return 707; } else { @@ -351,7 +351,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxx0xxxxx010x0010010 ldxrh. */ - return 725; + return 713; } } else @@ -360,7 +360,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxx0xxxxx010x00100x1 ldxr. */ - return 733; + return 721; } } else @@ -371,7 +371,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxx0xxxxx110x00100x0 caspa. */ - return 789; + return 777; } else { @@ -379,7 +379,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxx0xxxxx110x00100x1 ldxp. */ - return 735; + return 723; } } } @@ -395,7 +395,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxx1xxxxx010x0010000 ldaxrb. */ - return 720; + return 708; } else { @@ -403,7 +403,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxx1xxxxx010x0010010 ldaxrh. */ - return 726; + return 714; } } else @@ -412,7 +412,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxx1xxxxx010x00100x1 ldaxr. */ - return 734; + return 722; } } else @@ -423,7 +423,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxx1xxxxx110x00100x0 caspal. */ - return 791; + return 779; } else { @@ -431,7 +431,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxx1xxxxx110x00100x1 ldaxp. */ - return 736; + return 724; } } } @@ -444,7 +444,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxxxxxxxxx10x001010x ldnp. */ - return 740; + return 728; } else { @@ -452,7 +452,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxxxxxxxxx10x001011x ldpsw. */ - return 747; + return 735; } } } @@ -470,7 +470,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxx0xxxxxx11x0010000 casab. */ - return 779; + return 767; } else { @@ -478,7 +478,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxx0xxxxxx11x0010010 casah. */ - return 782; + return 770; } } else @@ -487,7 +487,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxx0xxxxxx11x00100x1 casa. */ - return 785; + return 773; } } else @@ -502,7 +502,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxx1xxxxx011x0010000 ldarb. */ - return 722; + return 710; } else { @@ -510,7 +510,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxx1xxxxx011x0010010 ldarh. */ - return 728; + return 716; } } else @@ -519,7 +519,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxx1xxxxx011x00100x1 ldar. */ - return 738; + return 726; } } else @@ -532,7 +532,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxx1xxxxx111x0010000 casalb. */ - return 781; + return 769; } else { @@ -540,7 +540,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxx1xxxxx111x0010010 casalh. */ - return 784; + return 772; } } else @@ -549,7 +549,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxx1xxxxx111x00100x1 casal. */ - return 787; + return 775; } } } @@ -562,7 +562,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxxxxxxxxx11x001010x ldp. */ - return 749; + return 737; } else { @@ -570,7 +570,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxxxxxxxxx11x001011x ldpsw. */ - return 752; + return 740; } } } @@ -588,7 +588,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxxxxxxxxxxx000110x0 ldr. */ - return 753; + return 741; } else { @@ -598,7 +598,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxxxxxxxxxxx00011001 ldrsw. */ - return 755; + return 743; } else { @@ -606,7 +606,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxxxxxxxxxxx00011011 prfm. */ - return 756; + return 744; } } } @@ -638,7 +638,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00xxxxxxxxx00000011110 sturh. */ - return 703; + return 698; } } else @@ -647,7 +647,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00xxxxxxxxx000000111x1 stur. */ - return 709; + return 701; } } else @@ -668,7 +668,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00xxxxxxxxx01000011110 ldurh. */ - return 704; + return 699; } } else @@ -677,7 +677,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00xxxxxxxxx010000111x1 ldur. */ - return 710; + return 702; } } } @@ -691,7 +691,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00xxxxxxxxx0x100011100 ldursb. */ - return 697; + return 695; } else { @@ -699,7 +699,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00xxxxxxxxx0x100011101 ldursw. */ - return 713; + return 703; } } else @@ -710,7 +710,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00xxxxxxxxx0x100011110 ldursh. */ - return 707; + return 700; } else { @@ -718,7 +718,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00xxxxxxxxx0x100011111 prfum. */ - return 715; + return 704; } } } @@ -745,7 +745,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx000000xxxxx10000011100 ldaddb. */ - return 804; + return 792; } else { @@ -753,7 +753,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx000000xxxxx10000011110 ldaddh. */ - return 805; + return 793; } } else @@ -762,7 +762,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx000000xxxxx100000111x1 ldadd. */ - return 806; + return 794; } } else @@ -775,7 +775,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx000000xxxxx10100011100 ldaddab. */ - return 807; + return 795; } else { @@ -783,7 +783,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx000000xxxxx10100011110 ldaddah. */ - return 810; + return 798; } } else @@ -792,7 +792,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx000000xxxxx101000111x1 ldadda. */ - return 813; + return 801; } } } @@ -808,7 +808,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx000000xxxxx11000011100 ldaddlb. */ - return 808; + return 796; } else { @@ -816,7 +816,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx000000xxxxx11000011110 ldaddlh. */ - return 811; + return 799; } } else @@ -825,7 +825,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx000000xxxxx110000111x1 ldaddl. */ - return 814; + return 802; } } else @@ -838,7 +838,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx000000xxxxx11100011100 ldaddalb. */ - return 809; + return 797; } else { @@ -846,7 +846,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx000000xxxxx11100011110 ldaddalh. */ - return 812; + return 800; } } else @@ -855,7 +855,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx000000xxxxx111000111x1 ldaddal. */ - return 815; + return 803; } } } @@ -874,7 +874,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx000001xxxxx10000011100 swpb. */ - return 792; + return 780; } else { @@ -882,7 +882,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx000001xxxxx10000011110 swph. */ - return 793; + return 781; } } else @@ -891,7 +891,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx000001xxxxx100000111x1 swp. */ - return 794; + return 782; } } else @@ -904,7 +904,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx000001xxxxx10100011100 swpab. */ - return 795; + return 783; } else { @@ -912,7 +912,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx000001xxxxx10100011110 swpah. */ - return 798; + return 786; } } else @@ -921,7 +921,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx000001xxxxx101000111x1 swpa. */ - return 801; + return 789; } } } @@ -937,7 +937,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx000001xxxxx11000011100 swplb. */ - return 796; + return 784; } else { @@ -945,7 +945,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx000001xxxxx11000011110 swplh. */ - return 799; + return 787; } } else @@ -954,7 +954,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx000001xxxxx110000111x1 swpl. */ - return 802; + return 790; } } else @@ -967,7 +967,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx000001xxxxx11100011100 swpalb. */ - return 797; + return 785; } else { @@ -975,7 +975,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx000001xxxxx11100011110 swpalh. */ - return 800; + return 788; } } else @@ -984,7 +984,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx000001xxxxx111000111x1 swpal. */ - return 803; + return 791; } } } @@ -1004,7 +1004,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00001xxxxxx10000011100 ldsmaxb. */ - return 852; + return 840; } else { @@ -1012,7 +1012,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00001xxxxxx10000011110 ldsmaxh. */ - return 853; + return 841; } } else @@ -1021,7 +1021,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00001xxxxxx100000111x1 ldsmax. */ - return 854; + return 842; } } else @@ -1034,7 +1034,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00001xxxxxx10100011100 ldsmaxab. */ - return 855; + return 843; } else { @@ -1042,7 +1042,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00001xxxxxx10100011110 ldsmaxah. */ - return 858; + return 846; } } else @@ -1051,7 +1051,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00001xxxxxx101000111x1 ldsmaxa. */ - return 861; + return 849; } } } @@ -1067,7 +1067,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00001xxxxxx11000011100 ldsmaxlb. */ - return 856; + return 844; } else { @@ -1075,7 +1075,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00001xxxxxx11000011110 ldsmaxlh. */ - return 859; + return 847; } } else @@ -1084,7 +1084,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00001xxxxxx110000111x1 ldsmaxl. */ - return 862; + return 850; } } else @@ -1097,7 +1097,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00001xxxxxx11100011100 ldsmaxalb. */ - return 857; + return 845; } else { @@ -1105,7 +1105,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00001xxxxxx11100011110 ldsmaxalh. */ - return 860; + return 848; } } else @@ -1114,7 +1114,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00001xxxxxx111000111x1 ldsmaxal. */ - return 863; + return 851; } } } @@ -1136,7 +1136,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00010xxxxxx10000011100 ldeorb. */ - return 828; + return 816; } else { @@ -1144,7 +1144,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00010xxxxxx10000011110 ldeorh. */ - return 829; + return 817; } } else @@ -1153,7 +1153,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00010xxxxxx100000111x1 ldeor. */ - return 830; + return 818; } } else @@ -1166,7 +1166,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00010xxxxxx10100011100 ldeorab. */ - return 831; + return 819; } else { @@ -1174,7 +1174,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00010xxxxxx10100011110 ldeorah. */ - return 834; + return 822; } } else @@ -1183,7 +1183,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00010xxxxxx101000111x1 ldeora. */ - return 837; + return 825; } } } @@ -1199,7 +1199,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00010xxxxxx11000011100 ldeorlb. */ - return 832; + return 820; } else { @@ -1207,7 +1207,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00010xxxxxx11000011110 ldeorlh. */ - return 835; + return 823; } } else @@ -1216,7 +1216,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00010xxxxxx110000111x1 ldeorl. */ - return 838; + return 826; } } else @@ -1229,7 +1229,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00010xxxxxx11100011100 ldeoralb. */ - return 833; + return 821; } else { @@ -1237,7 +1237,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00010xxxxxx11100011110 ldeoralh. */ - return 836; + return 824; } } else @@ -1246,7 +1246,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00010xxxxxx111000111x1 ldeoral. */ - return 839; + return 827; } } } @@ -1265,7 +1265,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00011xxxxxx10000011100 ldumaxb. */ - return 876; + return 864; } else { @@ -1273,7 +1273,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00011xxxxxx10000011110 ldumaxh. */ - return 877; + return 865; } } else @@ -1282,7 +1282,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00011xxxxxx100000111x1 ldumax. */ - return 878; + return 866; } } else @@ -1295,7 +1295,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00011xxxxxx10100011100 ldumaxab. */ - return 879; + return 867; } else { @@ -1303,7 +1303,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00011xxxxxx10100011110 ldumaxah. */ - return 882; + return 870; } } else @@ -1312,7 +1312,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00011xxxxxx101000111x1 ldumaxa. */ - return 885; + return 873; } } } @@ -1328,7 +1328,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00011xxxxxx11000011100 ldumaxlb. */ - return 880; + return 868; } else { @@ -1336,7 +1336,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00011xxxxxx11000011110 ldumaxlh. */ - return 883; + return 871; } } else @@ -1345,7 +1345,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00011xxxxxx110000111x1 ldumaxl. */ - return 886; + return 874; } } else @@ -1358,7 +1358,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00011xxxxxx11100011100 ldumaxalb. */ - return 881; + return 869; } else { @@ -1366,7 +1366,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00011xxxxxx11100011110 ldumaxalh. */ - return 884; + return 872; } } else @@ -1375,7 +1375,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00011xxxxxx111000111x1 ldumaxal. */ - return 887; + return 875; } } } @@ -1400,7 +1400,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00100xxxxxx10000011100 ldclrb. */ - return 816; + return 804; } else { @@ -1408,7 +1408,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00100xxxxxx10000011110 ldclrh. */ - return 817; + return 805; } } else @@ -1417,7 +1417,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00100xxxxxx100000111x1 ldclr. */ - return 818; + return 806; } } else @@ -1430,7 +1430,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00100xxxxxx10100011100 ldclrab. */ - return 819; + return 807; } else { @@ -1438,7 +1438,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00100xxxxxx10100011110 ldclrah. */ - return 822; + return 810; } } else @@ -1447,7 +1447,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00100xxxxxx101000111x1 ldclra. */ - return 825; + return 813; } } } @@ -1463,7 +1463,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00100xxxxxx11000011100 ldclrlb. */ - return 820; + return 808; } else { @@ -1471,7 +1471,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00100xxxxxx11000011110 ldclrlh. */ - return 823; + return 811; } } else @@ -1480,7 +1480,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00100xxxxxx110000111x1 ldclrl. */ - return 826; + return 814; } } else @@ -1493,7 +1493,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00100xxxxxx11100011100 ldclralb. */ - return 821; + return 809; } else { @@ -1501,7 +1501,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00100xxxxxx11100011110 ldclralh. */ - return 824; + return 812; } } else @@ -1510,7 +1510,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00100xxxxxx111000111x1 ldclral. */ - return 827; + return 815; } } } @@ -1529,7 +1529,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00101xxxxxx10000011100 ldsminb. */ - return 864; + return 852; } else { @@ -1537,7 +1537,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00101xxxxxx10000011110 ldsminh. */ - return 865; + return 853; } } else @@ -1546,7 +1546,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00101xxxxxx100000111x1 ldsmin. */ - return 866; + return 854; } } else @@ -1559,7 +1559,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00101xxxxxx10100011100 ldsminab. */ - return 867; + return 855; } else { @@ -1567,7 +1567,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00101xxxxxx10100011110 ldsminah. */ - return 870; + return 858; } } else @@ -1576,7 +1576,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00101xxxxxx101000111x1 ldsmina. */ - return 873; + return 861; } } } @@ -1592,7 +1592,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00101xxxxxx11000011100 ldsminlb. */ - return 868; + return 856; } else { @@ -1600,7 +1600,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00101xxxxxx11000011110 ldsminlh. */ - return 871; + return 859; } } else @@ -1609,7 +1609,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00101xxxxxx110000111x1 ldsminl. */ - return 874; + return 862; } } else @@ -1622,7 +1622,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00101xxxxxx11100011100 ldsminalb. */ - return 869; + return 857; } else { @@ -1630,7 +1630,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00101xxxxxx11100011110 ldsminalh. */ - return 872; + return 860; } } else @@ -1639,7 +1639,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00101xxxxxx111000111x1 ldsminal. */ - return 875; + return 863; } } } @@ -1661,7 +1661,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00110xxxxxx10000011100 ldsetb. */ - return 840; + return 828; } else { @@ -1669,7 +1669,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00110xxxxxx10000011110 ldseth. */ - return 841; + return 829; } } else @@ -1678,7 +1678,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00110xxxxxx100000111x1 ldset. */ - return 842; + return 830; } } else @@ -1691,7 +1691,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00110xxxxxx10100011100 ldsetab. */ - return 843; + return 831; } else { @@ -1699,7 +1699,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00110xxxxxx10100011110 ldsetah. */ - return 846; + return 834; } } else @@ -1708,7 +1708,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00110xxxxxx101000111x1 ldseta. */ - return 849; + return 837; } } } @@ -1724,7 +1724,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00110xxxxxx11000011100 ldsetlb. */ - return 844; + return 832; } else { @@ -1732,7 +1732,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00110xxxxxx11000011110 ldsetlh. */ - return 847; + return 835; } } else @@ -1741,7 +1741,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00110xxxxxx110000111x1 ldsetl. */ - return 850; + return 838; } } else @@ -1754,7 +1754,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00110xxxxxx11100011100 ldsetalb. */ - return 845; + return 833; } else { @@ -1762,7 +1762,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00110xxxxxx11100011110 ldsetalh. */ - return 848; + return 836; } } else @@ -1771,7 +1771,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00110xxxxxx111000111x1 ldsetal. */ - return 851; + return 839; } } } @@ -1790,7 +1790,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00111xxxxxx10000011100 lduminb. */ - return 888; + return 876; } else { @@ -1798,7 +1798,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00111xxxxxx10000011110 lduminh. */ - return 889; + return 877; } } else @@ -1807,7 +1807,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00111xxxxxx100000111x1 ldumin. */ - return 890; + return 878; } } else @@ -1820,7 +1820,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00111xxxxxx10100011100 lduminab. */ - return 891; + return 879; } else { @@ -1828,7 +1828,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00111xxxxxx10100011110 lduminah. */ - return 894; + return 882; } } else @@ -1837,7 +1837,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00111xxxxxx101000111x1 ldumina. */ - return 897; + return 885; } } } @@ -1853,7 +1853,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00111xxxxxx11000011100 lduminlb. */ - return 892; + return 880; } else { @@ -1861,7 +1861,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00111xxxxxx11000011110 lduminlh. */ - return 895; + return 883; } } else @@ -1870,7 +1870,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00111xxxxxx110000111x1 lduminl. */ - return 898; + return 886; } } else @@ -1883,7 +1883,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00111xxxxxx11100011100 lduminalb. */ - return 893; + return 881; } else { @@ -1891,7 +1891,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00111xxxxxx11100011110 lduminalh. */ - return 896; + return 884; } } else @@ -1900,7 +1900,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00111xxxxxx111000111x1 lduminal. */ - return 899; + return 887; } } } @@ -2340,7 +2340,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxxxxxxxxxx00100x00x and. */ - return 757; + return 745; } else { @@ -2348,7 +2348,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxxxxxxxxxx00100x01x eor. */ - return 761; + return 749; } } else @@ -2359,7 +2359,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxxxxxxxxxx00100x10x orr. */ - return 759; + return 747; } else { @@ -2367,7 +2367,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxxxxxxxxxx00100x11x ands. */ - return 762; + return 750; } } } @@ -2381,7 +2381,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxxxxxxxxxx10100x00x movn. */ - return 948; + return 936; } else { @@ -2389,7 +2389,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxxxxxxxxxx10100x01x movz. */ - return 950; + return 938; } } else @@ -2398,7 +2398,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxxxxxxxxxx10100x1xx movk. */ - return 952; + return 940; } } } @@ -2416,7 +2416,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxxxxxxxx0xx0101000x and. */ - return 764; + return 752; } else { @@ -2424,7 +2424,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxxxxxxxx0xx0101001x eor. */ - return 771; + return 759; } } else @@ -2435,7 +2435,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxxxxxxxx0xx0101010x orr. */ - return 766; + return 754; } else { @@ -2443,7 +2443,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxxxxxxxx0xx0101011x ands. */ - return 773; + return 761; } } } @@ -2818,7 +2818,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxxxxxxxx1xx0101x00x bic. */ - return 765; + return 753; } else { @@ -2826,7 +2826,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxxxxxxxx1xx0101x01x eon. */ - return 772; + return 760; } } else @@ -2837,7 +2837,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxxxxxxxx1xx0101x10x orn. */ - return 769; + return 757; } else { @@ -2845,7 +2845,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxxxxxxxx1xx0101x11x bics. */ - return 775; + return 763; } } } @@ -3256,7 +3256,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxxxxxxxx0xx1x10x01x msr. */ - return 955; + return 943; } else { @@ -3264,7 +3264,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxxxxxxxx1xx1x10x01x sysl. */ - return 973; + return 961; } } } @@ -3287,7 +3287,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxxxxxxxxxxx0110x1xx tbz. */ - return 975; + return 963; } } else @@ -3306,7 +3306,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxxxxxxxxxxx1110x1xx tbnz. */ - return 976; + return 964; } } } @@ -3337,7 +3337,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxxxxxxxxx00001101xx stnp. */ - return 741; + return 729; } } else @@ -3389,7 +3389,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxxxxxxxxx00101101xx stp. */ - return 745; + return 733; } } } @@ -3453,7 +3453,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxxxxxxxxx01x01101xx stp. */ - return 750; + return 738; } } } @@ -3477,7 +3477,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxxxxxxxxx10001101xx ldnp. */ - return 742; + return 730; } } else @@ -3529,7 +3529,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxxxxxxxxx10101101xx ldp. */ - return 746; + return 734; } } } @@ -3593,7 +3593,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxxxxxxxxx11x01101xx ldp. */ - return 751; + return 739; } } } @@ -3608,7 +3608,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxxxxxxxxxxxxxxxx001110xx ldr. */ - return 754; + return 742; } else { @@ -3622,7 +3622,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00xxxxxxxxxx0x001111xx stur. */ - return 699; + return 696; } else { @@ -3630,7 +3630,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxxxxxxxxx00xxxxxxxxxx1x001111xx ldur. */ - return 700; + return 697; } } else @@ -8707,20 +8707,20 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode) int value; switch (key) { - case 739: value = 743; break; /* stnp --> stp. */ - case 743: return NULL; /* stp --> NULL. */ - case 740: value = 744; break; /* ldnp --> ldp. */ - case 744: return NULL; /* ldp --> NULL. */ - case 955: value = 956; break; /* msr --> hint. */ - case 956: value = 963; break; /* hint --> clrex. */ - case 963: value = 964; break; /* clrex --> dsb. */ - case 964: value = 965; break; /* dsb --> dmb. */ - case 965: value = 966; break; /* dmb --> isb. */ - case 966: value = 967; break; /* isb --> sys. */ - case 967: value = 972; break; /* sys --> msr. */ - case 972: return NULL; /* msr --> NULL. */ - case 973: value = 974; break; /* sysl --> mrs. */ - case 974: return NULL; /* mrs --> NULL. */ + case 727: value = 731; break; /* stnp --> stp. */ + case 731: return NULL; /* stp --> NULL. */ + case 728: value = 732; break; /* ldnp --> ldp. */ + case 732: return NULL; /* ldp --> NULL. */ + case 943: value = 944; break; /* msr --> hint. */ + case 944: value = 951; break; /* hint --> clrex. */ + case 951: value = 952; break; /* clrex --> dsb. */ + case 952: value = 953; break; /* dsb --> dmb. */ + case 953: value = 954; break; /* dmb --> isb. */ + case 954: value = 955; break; /* isb --> sys. */ + case 955: value = 960; break; /* sys --> msr. */ + case 960: return NULL; /* msr --> NULL. */ + case 961: value = 962; break; /* sysl --> mrs. */ + case 962: return NULL; /* mrs --> NULL. */ case 355: value = 356; break; /* st4 --> st1. */ case 356: value = 357; break; /* st1 --> st2. */ case 357: value = 358; break; /* st2 --> st3. */ @@ -8843,76 +8843,64 @@ aarch64_find_alias_opcode (const aarch64_opcode *opcode) case 581: value = 582; break; /* umaddl --> umull. */ case 583: value = 584; break; /* umsubl --> umnegl. */ case 594: value = 595; break; /* extr --> ror. */ - case 693: value = 695; break; /* sturb --> strb. */ - case 694: value = 696; break; /* ldurb --> ldrb. */ - case 697: value = 698; break; /* ldursb --> ldrsb. */ - case 699: value = 701; break; /* stur --> str. */ - case 700: value = 702; break; /* ldur --> ldr. */ - case 703: value = 705; break; /* sturh --> strh. */ - case 704: value = 706; break; /* ldurh --> ldrh. */ - case 707: value = 708; break; /* ldursh --> ldrsh. */ - case 709: value = 711; break; /* stur --> str. */ - case 710: value = 712; break; /* ldur --> ldr. */ - case 713: value = 714; break; /* ldursw --> ldrsw. */ - case 715: value = 716; break; /* prfum --> prfm. */ - case 757: value = 758; break; /* and --> bic. */ - case 759: value = 760; break; /* orr --> mov. */ - case 762: value = 763; break; /* ands --> tst. */ - case 766: value = 768; break; /* orr --> uxtw. */ - case 769: value = 770; break; /* orn --> mvn. */ - case 773: value = 774; break; /* ands --> tst. */ - case 804: value = 900; break; /* ldaddb --> staddb. */ - case 805: value = 901; break; /* ldaddh --> staddh. */ - case 806: value = 902; break; /* ldadd --> stadd. */ - case 808: value = 903; break; /* ldaddlb --> staddlb. */ - case 811: value = 904; break; /* ldaddlh --> staddlh. */ - case 814: value = 905; break; /* ldaddl --> staddl. */ - case 816: value = 906; break; /* ldclrb --> stclrb. */ - case 817: value = 907; break; /* ldclrh --> stclrh. */ - case 818: value = 908; break; /* ldclr --> stclr. */ - case 820: value = 909; break; /* ldclrlb --> stclrlb. */ - case 823: value = 910; break; /* ldclrlh --> stclrlh. */ - case 826: value = 911; break; /* ldclrl --> stclrl. */ - case 828: value = 912; break; /* ldeorb --> steorb. */ - case 829: value = 913; break; /* ldeorh --> steorh. */ - case 830: value = 914; break; /* ldeor --> steor. */ - case 832: value = 915; break; /* ldeorlb --> steorlb. */ - case 835: value = 916; break; /* ldeorlh --> steorlh. */ - case 838: value = 917; break; /* ldeorl --> steorl. */ - case 840: value = 918; break; /* ldsetb --> stsetb. */ - case 841: value = 919; break; /* ldseth --> stseth. */ - case 842: value = 920; break; /* ldset --> stset. */ - case 844: value = 921; break; /* ldsetlb --> stsetlb. */ - case 847: value = 922; break; /* ldsetlh --> stsetlh. */ - case 850: value = 923; break; /* ldsetl --> stsetl. */ - case 852: value = 924; break; /* ldsmaxb --> stsmaxb. */ - case 853: value = 925; break; /* ldsmaxh --> stsmaxh. */ - case 854: value = 926; break; /* ldsmax --> stsmax. */ - case 856: value = 927; break; /* ldsmaxlb --> stsmaxlb. */ - case 859: value = 928; break; /* ldsmaxlh --> stsmaxlh. */ - case 862: value = 929; break; /* ldsmaxl --> stsmaxl. */ - case 864: value = 930; break; /* ldsminb --> stsminb. */ - case 865: value = 931; break; /* ldsminh --> stsminh. */ - case 866: value = 932; break; /* ldsmin --> stsmin. */ - case 868: value = 933; break; /* ldsminlb --> stsminlb. */ - case 871: value = 934; break; /* ldsminlh --> stsminlh. */ - case 874: value = 935; break; /* ldsminl --> stsminl. */ - case 876: value = 936; break; /* ldumaxb --> stumaxb. */ - case 877: value = 937; break; /* ldumaxh --> stumaxh. */ - case 878: value = 938; break; /* ldumax --> stumax. */ - case 880: value = 939; break; /* ldumaxlb --> stumaxlb. */ - case 883: value = 940; break; /* ldumaxlh --> stumaxlh. */ - case 886: value = 941; break; /* ldumaxl --> stumaxl. */ - case 888: value = 942; break; /* lduminb --> stuminb. */ - case 889: value = 943; break; /* lduminh --> stuminh. */ - case 890: value = 944; break; /* ldumin --> stumin. */ - case 892: value = 945; break; /* lduminlb --> stuminlb. */ - case 895: value = 946; break; /* lduminlh --> stuminlh. */ - case 898: value = 947; break; /* lduminl --> stuminl. */ - case 948: value = 949; break; /* movn --> mov. */ - case 950: value = 951; break; /* movz --> mov. */ - case 956: value = 962; break; /* hint --> sevl. */ - case 967: value = 971; break; /* sys --> tlbi. */ + case 745: value = 746; break; /* and --> bic. */ + case 747: value = 748; break; /* orr --> mov. */ + case 750: value = 751; break; /* ands --> tst. */ + case 754: value = 756; break; /* orr --> uxtw. */ + case 757: value = 758; break; /* orn --> mvn. */ + case 761: value = 762; break; /* ands --> tst. */ + case 792: value = 888; break; /* ldaddb --> staddb. */ + case 793: value = 889; break; /* ldaddh --> staddh. */ + case 794: value = 890; break; /* ldadd --> stadd. */ + case 796: value = 891; break; /* ldaddlb --> staddlb. */ + case 799: value = 892; break; /* ldaddlh --> staddlh. */ + case 802: value = 893; break; /* ldaddl --> staddl. */ + case 804: value = 894; break; /* ldclrb --> stclrb. */ + case 805: value = 895; break; /* ldclrh --> stclrh. */ + case 806: value = 896; break; /* ldclr --> stclr. */ + case 808: value = 897; break; /* ldclrlb --> stclrlb. */ + case 811: value = 898; break; /* ldclrlh --> stclrlh. */ + case 814: value = 899; break; /* ldclrl --> stclrl. */ + case 816: value = 900; break; /* ldeorb --> steorb. */ + case 817: value = 901; break; /* ldeorh --> steorh. */ + case 818: value = 902; break; /* ldeor --> steor. */ + case 820: value = 903; break; /* ldeorlb --> steorlb. */ + case 823: value = 904; break; /* ldeorlh --> steorlh. */ + case 826: value = 905; break; /* ldeorl --> steorl. */ + case 828: value = 906; break; /* ldsetb --> stsetb. */ + case 829: value = 907; break; /* ldseth --> stseth. */ + case 830: value = 908; break; /* ldset --> stset. */ + case 832: value = 909; break; /* ldsetlb --> stsetlb. */ + case 835: value = 910; break; /* ldsetlh --> stsetlh. */ + case 838: value = 911; break; /* ldsetl --> stsetl. */ + case 840: value = 912; break; /* ldsmaxb --> stsmaxb. */ + case 841: value = 913; break; /* ldsmaxh --> stsmaxh. */ + case 842: value = 914; break; /* ldsmax --> stsmax. */ + case 844: value = 915; break; /* ldsmaxlb --> stsmaxlb. */ + case 847: value = 916; break; /* ldsmaxlh --> stsmaxlh. */ + case 850: value = 917; break; /* ldsmaxl --> stsmaxl. */ + case 852: value = 918; break; /* ldsminb --> stsminb. */ + case 853: value = 919; break; /* ldsminh --> stsminh. */ + case 854: value = 920; break; /* ldsmin --> stsmin. */ + case 856: value = 921; break; /* ldsminlb --> stsminlb. */ + case 859: value = 922; break; /* ldsminlh --> stsminlh. */ + case 862: value = 923; break; /* ldsminl --> stsminl. */ + case 864: value = 924; break; /* ldumaxb --> stumaxb. */ + case 865: value = 925; break; /* ldumaxh --> stumaxh. */ + case 866: value = 926; break; /* ldumax --> stumax. */ + case 868: value = 927; break; /* ldumaxlb --> stumaxlb. */ + case 871: value = 928; break; /* ldumaxlh --> stumaxlh. */ + case 874: value = 929; break; /* ldumaxl --> stumaxl. */ + case 876: value = 930; break; /* lduminb --> stuminb. */ + case 877: value = 931; break; /* lduminh --> stuminh. */ + case 878: value = 932; break; /* ldumin --> stumin. */ + case 880: value = 933; break; /* lduminlb --> stuminlb. */ + case 883: value = 934; break; /* lduminlh --> stuminlh. */ + case 886: value = 935; break; /* lduminl --> stuminl. */ + case 936: value = 937; break; /* movn --> mov. */ + case 938: value = 939; break; /* movz --> mov. */ + case 944: value = 950; break; /* hint --> sevl. */ + case 955: value = 959; break; /* sys --> tlbi. */ default: return NULL; } @@ -8941,15 +8929,15 @@ aarch64_find_next_alias_opcode (const aarch64_opcode *opcode) case 505: value = 504; break; /* ubfx --> ubfiz. */ case 527: value = 526; break; /* cset --> cinc. */ case 530: value = 529; break; /* csetm --> cinv. */ - case 768: value = 767; break; /* uxtw --> mov. */ - case 962: value = 961; break; /* sevl --> sev. */ - case 961: value = 960; break; /* sev --> wfi. */ - case 960: value = 959; break; /* wfi --> wfe. */ - case 959: value = 958; break; /* wfe --> yield. */ - case 958: value = 957; break; /* yield --> nop. */ - case 971: value = 970; break; /* tlbi --> ic. */ - case 970: value = 969; break; /* ic --> dc. */ - case 969: value = 968; break; /* dc --> at. */ + case 756: value = 755; break; /* uxtw --> mov. */ + case 950: value = 949; break; /* sevl --> sev. */ + case 949: value = 948; break; /* sev --> wfi. */ + case 948: value = 947; break; /* wfi --> wfe. */ + case 947: value = 946; break; /* wfe --> yield. */ + case 946: value = 945; break; /* yield --> nop. */ + case 959: value = 958; break; /* tlbi --> ic. */ + case 958: value = 957; break; /* ic --> dc. */ + case 957: value = 956; break; /* dc --> at. */ default: return NULL; } diff --git a/opcodes/aarch64-opc-2.c b/opcodes/aarch64-opc-2.c index eb08ee40852..4a9c6c3772b 100644 --- a/opcodes/aarch64-opc-2.c +++ b/opcodes/aarch64-opc-2.c @@ -135,34 +135,34 @@ static const unsigned op_enum_table [] = 671, 693, 694, + 695, + 698, + 699, + 700, + 701, + 702, + 696, 697, 703, 704, - 707, - 709, - 710, - 699, - 700, - 713, - 715, - 753, - 754, - 755, - 756, + 741, + 742, + 743, + 744, 12, 510, 511, - 948, - 950, - 952, - 760, - 951, - 949, + 936, + 938, + 940, + 748, + 939, + 937, 259, 499, 509, 508, - 758, + 746, 505, 502, 495, @@ -171,7 +171,7 @@ static const unsigned op_enum_table [] = 504, 506, 507, - 768, + 756, 526, 529, 532, diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h index 315fdf56dfb..228ce3529a7 100644 --- a/opcodes/aarch64-tbl.h +++ b/opcodes/aarch64-tbl.h @@ -1982,30 +1982,18 @@ struct aarch64_opcode aarch64_opcode_table[] = {"ldtr", 0xb8400800, 0xbfe00c00, ldst_unpriv, 0, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_R, F_GPRSIZE_IN_Q}, {"ldtrsw", 0xb8800800, 0xffe00c00, ldst_unpriv, 0, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_X32, 0}, /* Load/store register (unscaled immediate). */ - {"sturb", 0x38000000, 0xffe00c00, ldst_unscaled, OP_STURB, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_W8, F_HAS_ALIAS}, - {"ldurb", 0x38400000, 0xffe00c00, ldst_unscaled, OP_LDURB, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_W8, F_HAS_ALIAS}, - {"strb", 0x38000000, 0xffe00c00, ldst_unscaled, 0, CORE, OP2 (Rt, ADDR_SIMM9_2), QL_LDST_W8, F_ALIAS}, - {"ldrb", 0x38400000, 0xffe00c00, ldst_unscaled, 0, CORE, OP2 (Rt, ADDR_SIMM9_2), QL_LDST_W8, F_ALIAS}, - {"ldursb", 0x38800000, 0xffa00c00, ldst_unscaled, OP_LDURSB, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_R8, F_HAS_ALIAS | F_LDS_SIZE}, - {"ldrsb", 0x38800000, 0xffa00c00, ldst_unscaled, 0, CORE, OP2 (Rt, ADDR_SIMM9_2), QL_LDST_R8, F_ALIAS | F_LDS_SIZE}, - {"stur", 0x3c000000, 0x3f600c00, ldst_unscaled, OP_STURV, CORE, OP2 (Ft, ADDR_SIMM9), QL_LDST_FP, F_HAS_ALIAS}, - {"ldur", 0x3c400000, 0x3f600c00, ldst_unscaled, OP_LDURV, CORE, OP2 (Ft, ADDR_SIMM9), QL_LDST_FP, F_HAS_ALIAS}, - {"str", 0x3c000000, 0x3f600c00, ldst_unscaled, 0, CORE, OP2 (Ft, ADDR_SIMM9_2), QL_LDST_FP, F_ALIAS}, - {"ldr", 0x3c400000, 0x3f600c00, ldst_unscaled, 0, CORE, OP2 (Ft, ADDR_SIMM9_2), QL_LDST_FP, F_ALIAS}, - {"sturh", 0x78000000, 0xffe00c00, ldst_unscaled, OP_STURH, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_W16, F_HAS_ALIAS}, - {"ldurh", 0x78400000, 0xffe00c00, ldst_unscaled, OP_LDURH, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_W16, F_HAS_ALIAS}, - {"strh", 0x78000000, 0xffe00c00, ldst_unscaled, 0, CORE, OP2 (Rt, ADDR_SIMM9_2), QL_LDST_W16, F_ALIAS}, - {"ldrh", 0x78400000, 0xffe00c00, ldst_unscaled, 0, CORE, OP2 (Rt, ADDR_SIMM9_2), QL_LDST_W16, F_ALIAS}, - {"ldursh", 0x78800000, 0xffa00c00, ldst_unscaled, OP_LDURSH, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_R16, F_HAS_ALIAS | F_LDS_SIZE}, - {"ldrsh", 0x78800000, 0xffa00c00, ldst_unscaled, 0, CORE, OP2 (Rt, ADDR_SIMM9_2), QL_LDST_R16, F_ALIAS | F_LDS_SIZE}, - {"stur", 0xb8000000, 0xbfe00c00, ldst_unscaled, OP_STUR, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_R, F_HAS_ALIAS | F_GPRSIZE_IN_Q}, - {"ldur", 0xb8400000, 0xbfe00c00, ldst_unscaled, OP_LDUR, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_R, F_HAS_ALIAS | F_GPRSIZE_IN_Q}, - {"str", 0xb8000000, 0xbfe00c00, ldst_unscaled, 0, CORE, OP2 (Rt, ADDR_SIMM9_2), QL_LDST_R, F_ALIAS | F_GPRSIZE_IN_Q}, - {"ldr", 0xb8400000, 0xbfe00c00, ldst_unscaled, 0, CORE, OP2 (Rt, ADDR_SIMM9_2), QL_LDST_R, F_ALIAS | F_GPRSIZE_IN_Q}, - {"ldursw", 0xb8800000, 0xffe00c00, ldst_unscaled, OP_LDURSW, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_X32, F_HAS_ALIAS}, - {"ldrsw", 0xb8800000, 0xffe00c00, ldst_unscaled, 0, CORE, OP2 (Rt, ADDR_SIMM9_2), QL_LDST_X32, F_ALIAS}, - {"prfum", 0xf8800000, 0xffe00c00, ldst_unscaled, OP_PRFUM, CORE, OP2 (PRFOP, ADDR_SIMM9), QL_LDST_PRFM, F_HAS_ALIAS}, - {"prfm", 0xf8800000, 0xffe00c00, ldst_unscaled, 0, CORE, OP2 (PRFOP, ADDR_SIMM9_2), QL_LDST_PRFM, F_ALIAS}, + {"sturb", 0x38000000, 0xffe00c00, ldst_unscaled, OP_STURB, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_W8, 0}, + {"ldurb", 0x38400000, 0xffe00c00, ldst_unscaled, OP_LDURB, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_W8, 0}, + {"ldursb", 0x38800000, 0xffa00c00, ldst_unscaled, OP_LDURSB, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_R8, F_LDS_SIZE}, + {"stur", 0x3c000000, 0x3f600c00, ldst_unscaled, OP_STURV, CORE, OP2 (Ft, ADDR_SIMM9), QL_LDST_FP, 0}, + {"ldur", 0x3c400000, 0x3f600c00, ldst_unscaled, OP_LDURV, CORE, OP2 (Ft, ADDR_SIMM9), QL_LDST_FP, 0}, + {"sturh", 0x78000000, 0xffe00c00, ldst_unscaled, OP_STURH, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_W16, 0}, + {"ldurh", 0x78400000, 0xffe00c00, ldst_unscaled, OP_LDURH, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_W16, 0}, + {"ldursh", 0x78800000, 0xffa00c00, ldst_unscaled, OP_LDURSH, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_R16, F_LDS_SIZE}, + {"stur", 0xb8000000, 0xbfe00c00, ldst_unscaled, OP_STUR, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_R, F_GPRSIZE_IN_Q}, + {"ldur", 0xb8400000, 0xbfe00c00, ldst_unscaled, OP_LDUR, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_R, F_GPRSIZE_IN_Q}, + {"ldursw", 0xb8800000, 0xffe00c00, ldst_unscaled, OP_LDURSW, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_X32, 0}, + {"prfum", 0xf8800000, 0xffe00c00, ldst_unscaled, OP_PRFUM, CORE, OP2 (PRFOP, ADDR_SIMM9), QL_LDST_PRFM, 0}, /* Load/store exclusive. */ {"stxrb", 0x8007c00, 0xffe08000, ldstexcl, 0, CORE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0}, {"stlxrb", 0x800fc00, 0xffe08000, ldstexcl, 0, CORE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},