From: lkcl Date: Thu, 13 Apr 2023 04:06:11 +0000 (+0100) Subject: (no commit message) X-Git-Tag: opf_rfc_ls010_v1~24 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c90bb74ac832b4be51eca5eb006a37ce8426febc;p=libreriscv.git --- diff --git a/openpower/sv/svp64.mdwn b/openpower/sv/svp64.mdwn index 2907b908c..d171d4e14 100644 --- a/openpower/sv/svp64.mdwn +++ b/openpower/sv/svp64.mdwn @@ -135,7 +135,7 @@ inside Vector loops, which is very rare for Vector ISAs. Strict Program Order is also preserved by the Parallel Reduction REMAP Schedule, but only at the cost of requiring the destination Vector to be used (Deterministically) to store partial progress of the -Parallel Reduction Schedule. +Parallel Reduction. The only major caveat for REMAP is that after an explicit change to