From: Ben Widawsky Date: Sat, 22 Nov 2014 23:22:15 +0000 (-0800) Subject: i965/skl: Fix SBE state upload code. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c914247dcb7c44c25efc335413da2d9d83fe550f;p=mesa.git i965/skl: Fix SBE state upload code. The state upload code was incorrectly shifting the attribute swizzles. The effect of this is we're likely to get the default swizzle values, which disables the component. This doesn't technically fix any bugs since Skylake support is still disabled by default (no PCI IDs). While here, since VARYING_SLOT_MAX can be greater than the number of attributes we have available, add a warning to the code to make sure we never do the wrong thing (and hopefully prevent further static analysis from finding this). Admittedly I am a bit confused. It seems to me like the moment a user has greater than 8 varyings we will hit this condition. CC Ken to clarify. v2: Forgot to git add the warning message in v1 v3: Change the > 31 varyings to an assertion (Ken) Reported-by: Ilia Mirkin (via Coverity) Signed-off-by: Ben Widawsky Reviewed-by: Kenneth Graunke --- diff --git a/src/mesa/drivers/dri/i965/gen8_sf_state.c b/src/mesa/drivers/dri/i965/gen8_sf_state.c index f6cb3ddef27..0e514c61010 100644 --- a/src/mesa/drivers/dri/i965/gen8_sf_state.c +++ b/src/mesa/drivers/dri/i965/gen8_sf_state.c @@ -93,10 +93,12 @@ upload_sbe(struct brw_context *brw) if (!(brw->fragment_program->Base.InputsRead & BITFIELD64_BIT(attr))) continue; + assert(input_index < 32); + if (input_index < 16) dw4 |= (GEN9_SBE_ACTIVE_COMPONENT_XYZW << (input_index << 1)); else - dw5 |= (GEN9_SBE_ACTIVE_COMPONENT_XYZW << (input_index << 1)); + dw5 |= (GEN9_SBE_ACTIVE_COMPONENT_XYZW << ((input_index - 16) << 1)); ++input_index; }