From: Wilco Dijkstra Date: Mon, 4 Sep 2017 17:23:01 +0000 (+0000) Subject: Fix ldrd offsets X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c9244494c07bce8ef0c7830b101eb94e9eff3bc0;p=gcc.git Fix ldrd offsets Fix the ldrd offsets of Thumb-2 - for TARGET_LDRD the range is +-1020, without -252..4096. This reduces the number of addressing instructions when using DI mode operations (such as in PR77308). gcc/ * config/arm/arm.c (arm_legitimate_index_p): Add comment. (thumb2_legitimate_index_p): Use correct range for DI/DF mode. From-SVN: r251681 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6f93a4b57b3..74bf4a07f98 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2017-09-04 Wilco Dijkstra + + * config/arm/arm.c (arm_legitimate_index_p): Add comment. + (thumb2_legitimate_index_p): Use correct range for DI/DF mode. + 2017-09-04 Bernd Edlinger PR target/77308 diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index e31ab608dd3..48709578541 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -7932,6 +7932,8 @@ arm_legitimate_index_p (machine_mode mode, rtx index, RTX_CODE outer, { HOST_WIDE_INT val = INTVAL (index); + /* Assume we emit ldrd or 2x ldr if !TARGET_LDRD. + If vldr is selected it uses arm_coproc_mem_operand. */ if (TARGET_LDRD) return val > -256 && val < 256; else @@ -8059,11 +8061,13 @@ thumb2_legitimate_index_p (machine_mode mode, rtx index, int strict_p) if (code == CONST_INT) { HOST_WIDE_INT val = INTVAL (index); - /* ??? Can we assume ldrd for thumb2? */ - /* Thumb-2 ldrd only has reg+const addressing modes. */ - /* ldrd supports offsets of +-1020. - However the ldr fallback does not. */ - return val > -256 && val < 256 && (val & 3) == 0; + /* Thumb-2 ldrd only has reg+const addressing modes. + Assume we emit ldrd or 2x ldr if !TARGET_LDRD. + If vldr is selected it uses arm_coproc_mem_operand. */ + if (TARGET_LDRD) + return IN_RANGE (val, -1020, 1020) && (val & 3) == 0; + else + return IN_RANGE (val, -255, 4095 - 4); } else return 0;