From: Kyrylo Tkachov Date: Thu, 25 Jul 2019 11:04:21 +0000 (+0000) Subject: [arm][committed] Clean up code iterator usage in satsi* patterns X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c9357dc13bdc10df1eba95d7b79ee2d3ae4fbbc6;p=gcc.git [arm][committed] Clean up code iterator usage in satsi* patterns GCC 10 now supports having RTL codes being code attributes (thanks Richard) allowing us to map smax to smin and vice versa. This means we can clean up their use in the saturation patterns that do the cross product of [smin, smax] and use the pattern predicate to cancel out the nonsense ones. * config/arm/arm.md (SATrev): Change to code attribute. (*satsi_): Adjust for the above. (*satsi__shift): Likewise. From-SVN: r273796 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 26f60f240d0..05c82636306 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2019-07-25 Kyrylo Tkachov + + * config/arm/arm.md (SATrev): Change to code attribute. + (*satsi_): Adjust for the above. + (*satsi__shift): Likewise. + 2019-07-25 Richard Biener * gimple-loop-versioning.cc (loop_versioning::prune_loop_conditions): diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index dcb57372192..7ab939a35f5 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -3981,16 +3981,16 @@ ) (define_code_iterator SAT [smin smax]) -(define_code_iterator SATrev [smin smax]) +(define_code_attr SATrev [(smin "smax") (smax "smin")]) (define_code_attr SATlo [(smin "1") (smax "2")]) (define_code_attr SAThi [(smin "2") (smax "1")]) (define_insn "*satsi_" [(set (match_operand:SI 0 "s_register_operand" "=r") - (SAT:SI (SATrev:SI (match_operand:SI 3 "s_register_operand" "r") + (SAT:SI (:SI (match_operand:SI 3 "s_register_operand" "r") (match_operand:SI 1 "const_int_operand" "i")) (match_operand:SI 2 "const_int_operand" "i")))] - "TARGET_32BIT && arm_arch6 && != + "TARGET_32BIT && arm_arch6 && arm_sat_operator_match (operands[], operands[], NULL, NULL)" { int mask; @@ -4011,12 +4011,12 @@ (define_insn "*satsi__shift" [(set (match_operand:SI 0 "s_register_operand" "=r") - (SAT:SI (SATrev:SI (match_operator:SI 3 "sat_shift_operator" + (SAT:SI (:SI (match_operator:SI 3 "sat_shift_operator" [(match_operand:SI 4 "s_register_operand" "r") (match_operand:SI 5 "const_int_operand" "i")]) (match_operand:SI 1 "const_int_operand" "i")) (match_operand:SI 2 "const_int_operand" "i")))] - "TARGET_32BIT && arm_arch6 && != + "TARGET_32BIT && arm_arch6 && arm_sat_operator_match (operands[], operands[], NULL, NULL)" { int mask;