From: lkcl Date: Sat, 13 Feb 2021 11:39:45 +0000 (+0000) Subject: (no commit message) X-Git-Tag: convert-csv-opcode-to-binary~195 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c949805c14d0869d66386848626e10e3429f442f;p=libreriscv.git --- diff --git a/openpower/sv/bitmanip.mdwn b/openpower/sv/bitmanip.mdwn index 56b0c8cb2..3924a3575 100644 --- a/openpower/sv/bitmanip.mdwn +++ b/openpower/sv/bitmanip.mdwn @@ -229,7 +229,8 @@ based on RV bitmanip singlebit set, instruction format similar to shift [[isa/fixedshift]]. bmext is actually covered already (shift-with-mask rldicl but only immediate version). however bitmask-invert is not, and set/clr are not covered, although they can use the same Shift ALU. -bmext (RB) version is not the same as rldicl because bmext is a right shift by RC, where rldicl is a left rotate. for the immediate version this does not matter. +bmext (RB) version is not the same as rldicl because bmext is a right shift by RC, where rldicl is a left rotate. for the immediate version this does not matter, so a bmexti is not required. +bmrev however there is no direct equivalent and consequently a bmrevi is required. | 0.5|6.10|11.15|16.20|21.25| 26..30 |31| name | | -- | -- | --- | --- | --- | ------- |--| ----- |