From: Bernd Schmidt <bernds@codesourcery.com>
Date: Tue, 21 Sep 2010 13:11:03 +0000 (+0000)
Subject: iterators.md (qhs_extenddi_op): New mode_attr.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c9cdcaa5905985e8c97e3cbb0d9c6db3ab707910;p=gcc.git

iterators.md (qhs_extenddi_op): New mode_attr.

	* config/arm/iterators.md (qhs_extenddi_op): New mode_attr.
	(qhs_extenddi_cstr): Likewise.
	* config/arm/arm.md (zero_extend<mode>di2, extend<mode>di2): Use
	them for the source operand.

From-SVN: r164477
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 97f25e73322..8edc8004c91 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2010-09-21  Bernd Schmidt  <bernds@codesourcery.com>
+
+	* config/arm/iterators.md (qhs_extenddi_op): New mode_attr.
+	(qhs_extenddi_cstr): Likewise.
+	* config/arm/arm.md (zero_extend<mode>di2, extend<mode>di2): Use
+	them for the source operand.
+
 2010-09-21  Uros Bizjak  <ubizjak@gmail.com>
 
 	* config/i386/i386.c (ix86_split_ashl): Rename single_width variable
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 47be462bb1e..c54bb2a1f37 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -4042,7 +4042,8 @@
 
 (define_insn "zero_extend<mode>di2"
   [(set (match_operand:DI 0 "s_register_operand" "=r")
-        (zero_extend:DI (match_operand:QHSI 1 "nonimmediate_operand" "rm")))]
+        (zero_extend:DI (match_operand:QHSI 1 "<qhs_extenddi_op>"
+					    "<qhs_extenddi_cstr>")))]
   "TARGET_32BIT <qhs_zextenddi_cond>"
   "#"
   [(set_attr "length" "8")
@@ -4052,7 +4053,8 @@
 
 (define_insn "extend<mode>di2"
   [(set (match_operand:DI 0 "s_register_operand" "=r")
-        (sign_extend:DI (match_operand:QHSI 1 "nonimmediate_operand" "rm")))]
+        (sign_extend:DI (match_operand:QHSI 1 "<qhs_extenddi_op>"
+					    "<qhs_extenddi_cstr>")))]
   "TARGET_32BIT <qhs_sextenddi_cond>"
   "#"
   [(set_attr "length" "8")
diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md
index 8e9f1001aba..887c962baeb 100644
--- a/gcc/config/arm/iterators.md
+++ b/gcc/config/arm/iterators.md
@@ -381,6 +381,10 @@
 (define_mode_attr qhs_zextenddi_cond [(SI "") (HI "&& arm_arch6") (QI "")])
 (define_mode_attr qhs_sextenddi_cond [(SI "") (HI "&& arm_arch6")
 				      (QI "&& arm_arch6")])
+(define_mode_attr qhs_extenddi_op [(SI "s_register_operand")
+				   (HI "nonimmediate_operand")
+				   (QI "nonimmediate_operand")])
+(define_mode_attr qhs_extenddi_cstr [(SI "r") (HI "rm") (QI "rm")])
 
 ;;----------------------------------------------------------------------------
 ;; Code attributes