From: Ali Saidi <Ali.Saidi@ARM.com>
Date: Mon, 22 Apr 2013 17:20:31 +0000 (-0400)
Subject: cpu: fix a switching issue with the o3 cpu.
X-Git-Tag: stable_2013_06_16
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c9e4678c16164ca12de951ea6faffc9ab9600b0b;p=gem5.git

cpu: fix a switching issue with the o3 cpu.

This change fixes the switcheroo test that broke earlier this month. The code
that was checking for the pipeline being blocked wasn't checking for a pending
translation, only for a icache access.
---

diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh
index 249111f3d..43effa9d7 100644
--- a/src/cpu/o3/fetch_impl.hh
+++ b/src/cpu/o3/fetch_impl.hh
@@ -1049,7 +1049,8 @@ DefaultFetch<Impl>::checkSignalsAndUpdate(ThreadID tid)
     if (checkStall(tid) &&
         fetchStatus[tid] != IcacheWaitResponse &&
         fetchStatus[tid] != IcacheWaitRetry &&
-        fetchStatus[tid] != ItlbWait) {
+        fetchStatus[tid] != ItlbWait &&
+        fetchStatus[tid] != QuiescePending) {
         DPRINTF(Fetch, "[tid:%i]: Setting to blocked\n",tid);
 
         fetchStatus[tid] = Blocked;