From: lkcl Date: Sat, 4 Jun 2022 23:39:09 +0000 (+0100) Subject: (no commit message) X-Git-Tag: opf_rfc_ls005_v1~1959 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c9e7d78cfd65d7e8649aaf9094ad4616ca596b49;p=libreriscv.git --- diff --git a/openpower/sv/fclass.mdwn b/openpower/sv/fclass.mdwn index aad1974b8..1e26bc5cd 100644 --- a/openpower/sv/fclass.mdwn +++ b/openpower/sv/fclass.mdwn @@ -7,13 +7,13 @@ based on xvtstdcsp v3.0B p768 the instruction performs analysis of the FP number unlike xvtstdcsp the result is stored in a Condition Register specified by BF. this allows it to be used as a predicate mask. setb may be used to create the equivalent of xvtstdcsp if desired. -| 0.5| 6.8 |9.10|11.15| 16.20 | 21...30 |31| name | Form | -| -- | --- | -- | --- | ----- | ------- |--| ------- | ------ | -| PO | BF | dx | FRA | dc | XO |dm| fptstsp | XX2-Form| +| 0.5| 6.8 |9..15 | 16.20 | 21...30 |31| name | Form | +| -- | --- | -- | ----- | ------- |--| ------- | ------ | +| PO | BF | DCMX | FRB | XO |dm| fptstsp | XX2-Form| ``` -DCMX <- dc || dm || dx -src <- (FRA)[32:63] +dcmx <- DCMX || dm +src <- (FRB)[32:63] sign <- src[0] exponent <- src[1:8] fraction <- src[9:31] @@ -21,21 +21,22 @@ class.Infinity <- (exponent = 0xFF) & (fraction = 0) class.NaN <- (exponent = 0xFF) & (fraction != 0) class.Zero <- (exponent = 0x00) & (fraction = 0) class.Denormal <- (exponent = 0x00) & (fraction != 0) -CR{BF} <- ((DCMX[0] & class.NaN & !sign) | - (DCMX[1] & class.NaN & sign)) || - ((DCMX[6] & class.Denormal & !sign) | - (DCMX[7] & class.Denormal & sign)) || - ((DCMX[2] & class.Infinity & !sign) | +CR{BF} <- ((dcmx[0] & class.NaN & !sign) | + (dcmx[1] & class.NaN & sign)) || + ((dcmx[6] & class.Denormal & !sign) | + (dcmx[7] & class.Denormal & sign)) || + ((dcmx[2] & class.Infinity & !sign) | (DCMX[3] & class.Infinity & sign)) || - ((DCMX[4] & class.Zero & !sign) | - (DCMX[5] & class.Zero & sign)) + ((dcmx[4] & class.Zero & !sign) | + (dcmx[5] & class.Zero & sign)) ``` 64 bit variant fptstdp is as follows: ``` -sign <- src.bit[0] -exponent <- src.bit[1:11] -fraction <- src.bit[12:63] +src <- (FRB) +sign <- src[0] +exponent <- src[1:11] +fraction <- src[12:63] exponent & 7FF ```