From: Dmitry Selyutin Date: Sun, 18 Sep 2022 09:07:57 +0000 (+0300) Subject: test_pysvp64dis: test mrr/svm specifiers X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=c9ee9529d80cc8790266eb298d2b6c736a4c75f1;p=openpower-isa.git test_pysvp64dis: test mrr/svm specifiers --- diff --git a/src/openpower/sv/trans/test_pysvp64dis.py b/src/openpower/sv/trans/test_pysvp64dis.py index a373ecb8..2c290b05 100644 --- a/src/openpower/sv/trans/test_pysvp64dis.py +++ b/src/openpower/sv/trans/test_pysvp64dis.py @@ -204,6 +204,13 @@ class SVSTATETestCase(unittest.TestCase): ] self._do_tst(expected) + def test_12_smr_svmr(self): + expected = [ + "sv.add./mrr/vec2 *3,*7,*11", + "sv.add./svm/vec4 *3,*7,*11", + ] + self._do_tst(expected) + if __name__ == "__main__": unittest.main()