From: Dmitry Selyutin
Date: Wed, 20 Sep 2023 17:12:24 +0000 (+0300)
Subject: cavatools: initialize repository
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ca1065570e41c63e48b970a57296f835d9f90aa1;p=cavatools.git
cavatools: initialize repository
This repository contains unmodified cavatools source code obtained from BCS:
https://www.bsc.es/research-and-development/software-and-apps/software-list/cavatools
---
ca1065570e41c63e48b970a57296f835d9f90aa1
diff --git a/LICENSE b/LICENSE
new file mode 100644
index 0000000..261eeb9
--- /dev/null
+++ b/LICENSE
@@ -0,0 +1,201 @@
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+ whether in tort (including negligence), contract, or otherwise,
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diff --git a/Makefile b/Makefile
new file mode 100644
index 0000000..b40b6a0
--- /dev/null
+++ b/Makefile
@@ -0,0 +1,35 @@
+.PHONY: nothing clean install
+nothing:
+ echo "clean, tarball, install?"
+
+clean:
+ rm -f $(HOME)/lib/libcava.a $(HOME)/lib/softfloat.a *~ ./#*#
+ ( cd softfloat/build/Linux-x86_64-GCC; rm -f softfloat.a *.o )
+ make -C caveat clean
+ make -C cachesim clean
+ make -C pipesim clean
+ make -C traceinfo clean
+ make -C erised clean
+
+# (cd $(HOME)/bin; rm -f caveat cachesim pipesim traceinfo )
+
+
+
+tarball: clean
+ ( cd ..; tar -czvf cavatools.tgz cavatools )
+
+
+install:
+ ( cd softfloat/build/Linux-x86_64-GCC; make; cp softfloat.a $(HOME)/lib )
+ cp -rp softfloat/source/include $(HOME)/include/softfloat
+ make -C caveat install
+ make -C cachesim install
+ make -C pipesim install
+ make -C traceinfo install
+ make -C erised install
+ make -C utilities/softpipe install
+
+
+
+
+
diff --git a/README.md b/README.md
new file mode 100644
index 0000000..b63220a
--- /dev/null
+++ b/README.md
@@ -0,0 +1,83 @@
+# cavatools
+RISC-V instruction set simulator and performance analysis tools
+===============================================================
+
+An instruction-set interpretator that produces execution trace in shared memory,
+and an example collection of simulators and analysis programs for pipeline and cache
+performance evaluation. You can write your own simulation/analysis programs.
+Cavatools can also be retargetted to other RISC-like architectures.
+
+
+### Getting the sources
+
+The repository is on GitHub:
+ $ git clone https://github.com/pete2222/cavatools
+
+
+
+### Prerequisites
+
+The Berkeley Softfloat-3e package has been included in this repository.
+Make install expects ~/bin, ~/lib, ~/include to exit.
+
+
+
+### Installation
+
+To build Cavatools:
+```
+ $ cd cavatools
+ $ make install
+```
+
+will create the following files:
+```
+ ~/bin/caveat - instruction set interpreter
+ ~/bin/traceinfo - prints and summarizes trace from caveat
+ ~/bin/pipesim - very simple pipelined machine simulator
+ ~/bin/cachesim - general cache simulator, can be L1, L2, I, D, I+D...
+```
+
+In addition, header files are installed in
+```
+ ~/include/cava/
+```
+and the caveat trace handling library in
+```
+ ~/lib/libcava.a
+```
+
+
+### Running Cavatools
+
+Programs should be compiled -static using riscv-gnu-toolchain Linux libc:
+```
+ $ riscv64-unknown-linux-gnu-gcc -static ... testpgm.c -o testpgm
+```
+
+To run without tracing:
+```
+ $ caveat testpgm
+```
+
+To see instruction trace run this in one window:
+```
+ $ caveat --out=bufname testpgm
+```
+and this in another window:
+```
+ $ traceinfo --in=bufname --list testpgm
+```
+The shared memory buffer 'bufname' appears in /dev/shm while processes are running.
+
+There is a pipeline simulator and a cache simulator. Run the following command lines in separate windows for more clarity:
+```
+ $ caveat --trace=b1 testpgm &
+ $ pipesim --in=b1 --out=b2 --visible testpgm &
+ $ cachesim --in=b2 --out=b3 --filter=rw &
+ $ traceinfo --in=b3 --paraver=10000 --cutoff=3 testgpm > trace.prv
+```
+produces a BSC Paraver trace of 10000 cycles with instruction stall events of 3 or more cycles, plus all cache misses. In this simulation pipesim has a built-in L1 data cache, and cachesim is modeling an L2 cache, all with default parameters.
+
+In the future there will be a presentation slide deck and a brief paper describing
+how to use the example analysis tools.
diff --git a/cachesim/Makefile b/cachesim/Makefile
new file mode 100644
index 0000000..ac879e7
--- /dev/null
+++ b/cachesim/Makefile
@@ -0,0 +1,38 @@
+# Path where things should be installed
+R = $(HOME)
+B = build
+
+_dummy := $(shell mkdir -p $B)
+
+# Dependent headers
+hdrs := opcodes.h insn.h shmfifo.h caveat.h
+
+# Text substitutions
+hdrs := $(addprefix $R/include/cava/,$(hdrs))
+
+aobj := tagonlycache.o container.o queues.o utilities.o
+cobj := cachesim.o
+
+# Text substitutions
+aobj := $(addprefix $B/,$(aobj))
+cobj := $(addprefix $B/,$(cobj))
+
+CFLAGS = -I$R/include/cava -g -Ofast
+LIBS = $R/lib/libcava.a -lrt -lpthread
+
+$B/cachesim: $(cobj) $R/lib/libcava.a
+ $(CC) $(CFLAGS) -o $B/cachesim $^ $(LIBS)
+
+$R/lib/libcava.a: $(aobj)
+ ar rs $@ $^
+
+$B/cachesim.o: $(hdrs)
+
+$B/%.o: %.c
+ $(CC) $(CFLAGS) -o $@ -c $<
+
+install: $B/cachesim
+ cp $B/cachesim $R/bin/
+
+clean:
+ rm -rf $B *~
diff --git a/cachesim/cachesim.c b/cachesim/cachesim.c
new file mode 100644
index 0000000..77990a9
--- /dev/null
+++ b/cachesim/cachesim.c
@@ -0,0 +1,174 @@
+/*
+ Copyright (c) 2020 Peter Hsu. All Rights Reserved. See LICENCE file for details.
+*/
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "caveat.h"
+#include "opcodes.h"
+#include "insn.h"
+#include "shmfifo.h"
+
+#include "types.h"
+#include "tagonlycache.h"
+
+
+#define REPORT_FREQUENCY 10
+
+#define RT_READ 0b0000000000000010L
+#define RT_WRITE 0b0000000000000100L
+#define RT_GETPUT 0b0000000000010000L
+#define RT_LEVEL_SHIFT 5
+#define RT_L0_CACHE 0b0000000000100000L
+#define RT_L1_CACHE 0b0000000001000000L
+#define RT_L2_CACHE 0b0000000010000000L
+#define RT_L3_CACHE 0b0000000100000000L
+#define RT_INSN_CACHE 0b0000001000000000L
+#define RT_DATA_CACHE 0b0000010000000000L
+
+
+
+struct fifo_t* fifo;
+struct fifo_t* outbuf;
+long report_frequency;
+
+void allocError(uint64 n, char * thing, char * filename, int32 linenumber)
+{
+ printf("\nmemory allocation failed trying to allocate %lld bytes for a '%s' on line %d in file %s",
+ n, thing, linenumber, filename);
+}
+
+int strchrs(const char* str, const char* keys)
+{
+ for (char k=*keys++; k; k=*keys++)
+ if (strchr(str, k))
+ return 1;
+ return 0;
+}
+
+static const char* in_path;
+static const char* out_path;
+static const char* flags;
+static long lgline, ways, lgsets;
+static long report, quiet;
+
+const struct options_t opt[] =
+ { { "--in=s", .s=&in_path, .ds=0, .h="Trace file =name (from caveat, pipesim, or cachesim)" },
+ { "--line=i", .i=&lgline, .di=6, .h="Cache line size is 2^ =n bytes" },
+ { "--ways=i", .i=&ways, .di=8, .h="Cache is =w ways set associativity" },
+ { "--sets=i", .i=&lgsets, .di=11, .h="Cache has 2^ =n sets per way" },
+ { "--sim=s", .s=&flags, .ds=0, .h="Simulate all access =types [iIdD0123rRwW] default all" },
+ { "--out=s", .s=&out_path, .ds=0, .h="Output next-level misses to trace =name" },
+ { "--report=i", .i=&report, .di=10, .h="Progress report every =number million instructions" },
+ { "--quiet", .b=&quiet, .bv=1, .h="Don't report progress to stderr" },
+ { "-q", .b=&quiet, .bv=1, .h="short for --quiet" },
+ { 0 }
+ };
+const char* usage = "cachesim --in=trace [cachesim-options]";
+
+int main(int argc, const char** argv)
+{
+ int numopts = parse_options(argv+1);
+ if (argc == numopts+1 || !in_path)
+ help_exit();
+ cacheData* cache = (cacheData*)newCacheData();
+ configureCache(cache, (char*)"Wilson's cache", ways, lgline, lgsets);
+ long insns=0, now=0, refs=0, misses=0;
+ report_frequency = (report ? report : REPORT_FREQUENCY) * 1000000;
+ long next_report = report_frequency;
+ long filter = 0L;
+ if (flags) {
+ if (strchrs(flags, "rR") && !strchrs(flags, "wW"))
+ filter |= RT_READ;
+ else if (strchrs(flags, "wW") && !strchrs(flags, "rR"))
+ filter |= RT_WRITE;
+ else
+ filter |= RT_READ | RT_WRITE;
+
+ if (strchrs(flags, "iI") && !strchrs(flags, "dD"))
+ filter |= RT_INSN_CACHE;
+ else if (strchrs(flags, "dD") && !strchrs(flags, "iI"))
+ filter |= RT_DATA_CACHE;
+ else
+ filter |= RT_INSN_CACHE | RT_DATA_CACHE;
+
+ filter |= RT_L0_CACHE;
+ if (!strchrs(flags, "0")) {
+ filter |= RT_L1_CACHE;
+ if (!strchrs(flags, "1")) {
+ filter |= RT_L2_CACHE;
+ if (!strchrs(flags, "2"))
+ filter |= RT_L3_CACHE;
+ }
+ }
+ }
+ else
+ filter = ~0L; /* default simulate all references */
+
+ fifo = fifo_open(in_path);
+ if (out_path)
+ outbuf = fifo_create(out_path, 0);
+ clock_t start_tick = clock();
+
+ for (uint64_t tr=fifo_get(fifo); tr_code(tr)!=tr_eof; tr=fifo_get(fifo)) {
+
+ if (is_mem(tr)) {
+ long reftype;
+ if (is_ldst(tr))
+ reftype = is_write(tr) ? RT_WRITE : RT_READ;
+ else {
+ reftype = RT_GETPUT;
+ reftype |= (1L<= next_report && !quiet) {
+ double elapse = (clock() - start_tick) / CLOCKS_PER_SEC;
+ fprintf(stderr, "\r%3.1fB insns %3.1fB cycles %3.1fB refs %3.1f misses/Kinsns in %3.1fs for %3.1f MIPS ", insns/1e9, now/1e9, refs/1e9, misses/(insns/1e3), elapse, insns/1e6/elapse);
+ next_report += REPORT_FREQUENCY;
+ }
+ }
+ else if (out_path) /* pass to next stage */
+ fifo_put(outbuf, tr);
+ continue;
+ }
+ if (tr_code(tr) == tr_cycles) {
+ now = tr_value(tr);
+ if (out_path)
+ fifo_put(outbuf, tr);
+ continue;
+ }
+ if (tr_code(tr) == tr_icount) {
+ insns = tr_value(tr);
+ if (out_path)
+ fifo_put(outbuf, tr);
+ continue;
+ }
+ if (is_frame(tr) && out_path) {
+ fifo_put(outbuf, tr);
+ continue;
+ }
+ }
+ fprintf(stderr, "\n\n");
+ reportCacheStats(cache);
+ printf("\n");
+ if (out_path) {
+ fifo_put(outbuf, trM(tr_eof, 0));
+ fifo_finish(outbuf);
+ }
+ fifo_close(fifo);
+ return 0;
+}
diff --git a/cachesim/container.c b/cachesim/container.c
new file mode 100644
index 0000000..28a2c76
--- /dev/null
+++ b/cachesim/container.c
@@ -0,0 +1,377 @@
+//
+// container.c
+// teq
+//
+// Created by Pete Wilson on 6/6/17.
+// Copyright © 2017-2020 Kiva Design Groupe LLC. All rights reserved.
+//
+
+#include
+#include
+#include
+
+#define EXTERN extern
+
+#include "types.h"
+#include "container.h"
+
+extern void allocError(uint64 n, char * thing, char * filename, int32 linenumber);
+
+static char * name_and_version = "containers 0.1v8 [October 8 2018]";
+
+/*
+ provides a uniform way of creating an array which can grow in size.
+ generally used for pointers
+
+ Versions
+
+ - containers 0.1v8 [October 8 2018]
+ - added get and add Float64 and Int64 from/to container
+
+ 0.1v7 [October 8 2018]
+ - changed ContainerCount() to containerCount()
+ 0.1v6 [September 28 2018]
+ - all Containers now hold just pointers. No 'ptrContainers'. Errors remain..
+ 0.1v5 [April 16 2018]
+ - changed API for int pullValFromContainer(). returns 1 if there was something in the container, and writes the value removed to a pointer's variable
+ 0.1v4 [November 2017]
+ - added pointer only containers (type Container)
+ 0.1v3 August 14 2017
+ - added a set of functions to more efficiently push and pull 'word-sized' (64 bit) values to and from a Container
+
+ */
+
+// ------------------------- contNameAndVersion --------------
+
+char * contNameAndVersion(void) {
+ return name_and_version;
+}
+
+// ------------------ fprintContainer --------------
+
+void fprintContainer(FILE * f, Container * c) {
+ fprintf(f, "\n\nContainer '%s':", c -> name);
+ fprintf(f, "\n\tcapacity = %d", c -> max);
+ fprintf(f, "\n\tcount = %d", c -> count);
+ // print the pointers
+ for (int i = 0; i < c -> count; i++) {
+ char * p = getPtrFromContainer(c, i);
+ fprintf(f, "\n\t\tptr %d: %p", i, p);
+ }
+}
+
+// -------------- printContainer ----------
+
+void printContainer(Container * c) {
+ fprintContainer(stdout, c);
+}
+
+// ----------------- zeroContainer ----------
+
+void zeroContainer(Container * c) {
+ c -> count = 0;
+}
+
+// ------------------ containerCount -----------------
+
+uint32 containerCount(Container * c) {
+ return c -> count;
+}
+
+// ----------- allocateInContainer ------------
+
+uint32 allocateInContainer(Container * c) {
+ // allocate space for one more pointer in the container, and return the index to it
+// printf("\nallocate in container '%s':", c -> name);
+ if (c -> count >= c -> max) {
+ // we need to grow the container - we use 50%
+ uint32 newmax = (c -> max + (c -> max/2));
+ //reallocate the data
+// printf("\n\t-- growing container from %d to %d pointers", c -> max, newmax);
+ void * newdata = realloc(c -> data.ptrs, newmax * sizeof(char *));
+ if (newdata) {
+// printf("..succeeded.");
+ c -> data.ptrs = newdata;
+ c -> max = newmax;
+ }
+ else {
+ allocError(newmax * sizeof(char *), "reallocation of a container's data", __FILE__, __LINE__);
+ }
+ }
+ // return the index to the current slot
+ uint32 index = c -> count;
+
+ // and increment the slot
+ c -> count++;
+// printf("\n\tcount incremented to %d", c -> count);
+ return index;
+}
+
+// -------------- getPtrFromContainer ---------
+
+void * getPtrFromContainer(Container * c, uint64 n) {
+ // Read the n'th pointer
+ if (n >= c -> count) {
+ printf("\n=== container error - asking for item %llu in container '%s' when count is %u", n, c -> name, c -> count);
+ return NULL; // safety - a NULL pointer should cause havoc fairly quickly
+ }
+ char * ptr = c -> data.ptrs[n];
+ // printf("\nget ptr[%lld] %p from %s", n, ptr, c -> name);
+ return ptr;
+}
+
+// -------------- getFloat64FromContainer ---------
+
+float64 getFloat64FromContainer(Container * c, uint64 n) {
+ // Read the n'th pointer
+ if (n >= c -> count) {
+ printf("\n=== container error - asking for item %llu in container '%s' when count is %u", n, c -> name, c -> count);
+ return 0.0; // safety - a NULL pointer should cause havoc fairly quickly
+ }
+ float64 v = c -> data.fvals[n];
+ return v;
+}
+
+// -------------- getInt64FromContainer ---------
+
+int64 getInt64FromContainer(Container * c, uint64 n) {
+ // Read the n'th val
+ if (n >= c -> count) {
+ printf("\n=== container error - asking for item %llu in container '%s' when count is %u", n, c -> name, c -> count);
+ return 0.0; // safety - a NULL pointer should cause havoc fairly quickly
+ }
+ int64 v = c -> data.ivals[n];
+ return v;
+}
+
+// -------------- addPtrToContainer ---------
+
+void addPtrToContainer(Container * c, void * p) {
+ // Add the pointer p to the container
+ uint32 n = allocateInContainer(c); // find index at which to store our pointer
+ c -> data.ptrs[n] = p; // and store it
+}
+
+// ------------ addFloat64ToContainer -----------
+
+void addFloat64ToContainer(Container * c, float64 v) {
+ // Add the pointer p to the container
+ uint32 n = allocateInContainer(c); // find index at which to store our float64
+ c -> data.fvals[n] = v; // and store it
+}
+
+// ------------ addInt64ToContainer -----------
+
+void addInt64ToContainer(Container * c, int64 v) {
+ // Add the pointer p to the container
+ uint32 n = allocateInContainer(c); // find index at which to store our int64
+ c -> data.ivals[n] = v; // and store it
+}
+
+// ------------ newContainer --------------
+
+Container * newContainer(uint32 count, char * name) {
+ // create a new pointer container capable of holding up to 'count' pointers
+ uint64 s = sizeof(Container) + 21;
+ Container * c = malloc(s);
+ if (c) {
+ c -> name = strdup(name);
+ c -> data.ptrs = malloc((count + 8) * sizeof(void *));
+ c -> max = count;
+ c -> count = 0;
+ if (c -> data.ptrs == NULL) {
+ allocError(count * sizeof(char *), "pointer container's data array", __FILE__, __LINE__);
+ free(c);
+ c = NULL;
+ }
+ }
+ else {
+ allocError(s, "GP container", __FILE__, __LINE__);
+ }
+ return c;
+}
+
+// ------------ pushPtrToContainer --------------
+
+void pushPtrToContainer(Container * c, void * ptr) {
+ // push a pointer into a container. Same as add.
+ addPtrToContainer(c, ptr);
+}
+
+// ------------ pullPtrFromContainer --------------
+
+void * pullPtrFromContainer(Container * c) {
+ // pull a pointer from a container into ptr; return 1. If none, return 0
+ if (c -> count > 0) {
+ char * p = getPtrFromContainer(c, c -> count - 1);
+ c -> count--;
+ return p;
+ }
+ return NULL;
+}
+
+// ------------ getTopPtrInContainer --------------
+
+void * getTopPtrInContainer(Container * c) {
+ // if there is a pointer, copies top value into ptr and returns 1; else returns 0
+ uint64 n = c -> count;
+ if (n == 0) {
+ return NULL;
+ }
+ char * p = getPtrFromContainer(c, n - 1);
+ return p;
+}
+
+
+// -------------- searchInContainer -----------
+
+int searchInContainer(Container * c, void * p) {
+ // see if we've already got the pointer p in this container; if so, return its index
+ // if not, return -1
+ for (int i = 0; i < containerCount(c); i++) {
+ void * ptr = getPtrFromContainer(c, i);
+ if (ptr == p) return i;
+ }
+ return -1;
+}
+
+// -------------- searchStringInContainer -----------
+
+int searchStringInContainer(Container * c, char * p) {
+ // see if we've already got the string indicated by p in this container; if so, return its index
+ // if not, return -1
+ for (int i = 0; i < containerCount(c); i++) {
+ void * ptr = getPtrFromContainer(c, i);
+ if (strcmp(p, ptr) == 0) return i;
+ }
+ return -1;
+}
+
+// ================== character containers =====================
+
+// ------------------ fprintCharContainer --------------
+
+void fprintCharContainer(FILE * f, charContainer * c) {
+ fprintf(f, "\n\nContainer '%s':", c -> name);
+ fprintf(f, "\n\tcapacity = %d", c -> max);
+ fprintf(f, "\n\tcount = %d", c -> count);
+ fprintf(f, "\n\ttext = '");
+ // print the characters
+ for (int i = 0; i < c -> count; i++) {
+ char ch = getCharFromContainer(c, i);
+ fprintf(f, "%c", ch);
+ fprintf(f, "'");
+ }
+}
+
+// -------------- printCharContainer ----------
+
+void printCharContainer(charContainer * c) {
+ fprintCharContainer(stdout, c);
+}
+
+// ----------------- zeroCharContainer ----------
+
+void zeroCharContainer(Container * c) {
+ c -> count = 0;
+}
+
+// ------------------ charContainerCount -----------------
+
+uint32 charContainerCount(charContainer * c) {
+ return c -> count;
+}
+
+// ----------- allocateInCharContainer ------------
+
+uint32 allocateInCharContainer(charContainer * c) {
+ // allocate space for one more character in the container, and return the index to it
+ if (c -> count >= c -> max) {
+ // we need to grow the container - we use 50%
+ uint32 newmax = (c -> max + (c -> max/2));
+ //reallocate the data
+ //printf("\n-- growing container %p from %lld to %lld pointers", c, c -> max, newmax);
+ void * newtext = realloc(c -> text, newmax * sizeof(char));
+ if (newtext) {
+ c -> text = newtext;
+ c -> max = newmax;
+ }
+ else {
+ allocError(newmax * sizeof(char *), "reallocation of a character container's text", __FILE__, __LINE__);
+ }
+ }
+ // return the index to the current slot
+ uint32 index = c -> count;
+
+ // and increment the slot
+ c -> count++;
+ return index;
+}
+
+// -------------- getCharFromContainer ---------
+
+char getCharFromContainer(charContainer * c, uint64 n) {
+ // Read the n'th character
+ if (n >= c -> count) {
+ printf("\n=== char container error - asking for item %llu in container '%s' when count is %u", n, c -> name, c -> count);
+ return '\0';
+ }
+ char ch = c -> text[n];
+ // printf("\nget ptr[%lld] %p from %s", n, ptr, c -> name);
+ return ch;
+}
+
+// -------------- addCharToContainer ---------
+
+void addCharToContainer(charContainer * c, char ch) {
+ // Add the character ch to the container
+ uint32 n = allocateInCharContainer(c); // find index at which to store our character
+ // printf("\nadd '%c'' to %s[%lld]", ch, c -> name, n);
+ c -> text[n] = ch; // and store it
+}
+
+// ------------ addStringToContainer ----------
+
+void addStringToContainer(charContainer * c, char * string) {
+ // initially, we'll do this the easy way
+ while (*string) {
+ addCharToContainer(c, *string++);
+ }
+}
+
+// ----------- getContainerAsString -----------
+
+char * getContainerAsString(charContainer * c) {
+ uint32 len = c -> count;
+ char * string = malloc(len + 1);
+ if (string) {
+ for (int i = 0; i < len; i++) {
+ string[i] = getCharFromContainer(c, i);
+ }
+ }
+ return string;
+}
+
+// ------------ newCharContainer --------------
+
+charContainer * newCharContainer(uint32 count, char * name) {
+ // create a new character container capable of holding up to 'count' characters
+ uint64 s = sizeof(charContainer);
+ charContainer * c = malloc(s);
+ if (c) {
+ c -> name = strdup(name);
+ c -> text = malloc((count + 1) * sizeof(char));
+ c -> max = count;
+ c -> count = 0;
+ if (c -> text == NULL) {
+ allocError(count * sizeof(char), "char container's data array", __FILE__, __LINE__);
+ free(c);
+ c = NULL;
+ }
+ }
+ else {
+ allocError(s, "char container", __FILE__, __LINE__);
+ }
+ return c;
+}
+
diff --git a/cachesim/container.h b/cachesim/container.h
new file mode 100644
index 0000000..2dd75ce
--- /dev/null
+++ b/cachesim/container.h
@@ -0,0 +1,79 @@
+//
+// container.h
+// teq
+//
+// Created by Pete Wilson on 6/6/17.
+// Copyright © 2017-2020 Kiva Design Groupe LLC. All rights reserved.
+//
+
+#ifndef container_h
+#define container_h
+
+#include
+#include "types.h"
+
+// a standard Container holds a dynamically-variable array of pointers
+typedef struct {
+ char * name;
+ int32 max; // max number of elements
+ int32 count; // how many elements we have
+ union {
+ char **ptrs; // array of pointers
+ float64 *fvals; // array of big floats
+ int64 *ivals; // array og ints
+ } data;
+} Container;
+
+// a charContainer holds a dynamically-variable array of characters
+typedef struct {
+ char * name;
+ int32 max; // max number of elements
+ int32 count; // how many elements we have
+ char * text; // array of characters
+} charContainer;
+
+char * contNameAndVersion(void);
+
+// ---------------- pointer containers
+
+uint32 containerCount(Container * c);
+uint32 allocateInContainer(Container * c);
+
+Container * newContainer(uint32 count, char * name);
+void zeroContainer(Container * c);
+void fprintContainer(FILE * f, Container * c) ;
+void printContainer(Container * c);
+
+void * getPtrFromContainer(Container * c, uint64 n); // get the n'th pointer; don't change the container
+void addPtrToContainer(Container * c, void * p); // add a pointer to the container
+void pushPtrToContainer(Container * c, void * ptr); // push a pointer into a container (same as add)
+void * pullPtrFromContainer(Container * c); // pull a pointer from a container into ptr; return 1. If none, return 0
+
+void * getTopPtrInContainer(Container * c); // if there is a pointer, copies top value into ptr and returns 1; else returns 0
+
+// ----------- character containers
+
+void fprintCharContainer(FILE * f, charContainer * c);
+void printCharContainer(charContainer * c);
+void zeroCharContainer(Container * c);
+uint32 charContainerCount(charContainer * c);
+uint32 allocateInCharContainer(charContainer * c) ;
+char getCharFromContainer(charContainer * c, uint64 n) ;
+void addCharToContainer(charContainer * c, char ch);
+void addStringToContainer(charContainer * c, char * string);
+char * getContainerAsString(charContainer * c);
+charContainer * newCharContainer(uint32 count, char * name);
+
+// -------------- 64 bit value containers -------------
+
+float64 getFloat64FromContainer(Container * c, uint64 n);
+int64 getInt64FromContainer(Container * c, uint64 n);
+void addInt64ToContainer(Container * c, int64 v);
+void addFloat64ToContainer(Container * c, float64 v);
+
+
+int searchInContainer(Container * c, void * p);
+int searchStringInContainer(Container * c, char * p);
+
+#endif /* container_h */
+
diff --git a/cachesim/queues.c b/cachesim/queues.c
new file mode 100644
index 0000000..633483c
--- /dev/null
+++ b/cachesim/queues.c
@@ -0,0 +1,586 @@
+
+//
+// queues.c
+//
+// Created by pete on 1/29/16.
+// Copyright © 2016-2020 Pete. All rights reserved.
+//
+
+
+#include
+#include
+#define EXTERN extern
+
+#include "types.h"
+#include "queues.h"
+
+
+/*
+simpleQueues 1.0v4 [May 3 2020]
+ - changed the qBlock header to include an int64 key
+ - added an insert blcok in order function
+
+
+ // older:
+
+ 1.0v0 January 16 2017
+ - rebuild of old code with old testing harness and new names for the API
+ - we no longer try to keep count of the elements in a queue
+
+ 1.0v1
+ - now #include types.h from the utilities project
+ - now include utilities.c and .h to provide timenow()
+
+ 1.0v2 [May 8 2017]
+ - changed qAppendQTail and qAppendQHead to NOT free the Queue structure that's supplying the list
+
+ 1.0v3 [April 7 2018]
+ - changed Queue * qNewQs(uint64 count, char * name) to check for the existence of the malloc'd queues before initialising them
+ */
+
+
+static char * name_and_version = "simpleQueues 1.0v4 [May 3 2020]";
+
+// ---------------------- qNameAndVersion --------------
+
+char * qNameAndVersion(void) {
+ return name_and_version;
+}
+
+// ------------------ qError ---------------
+
+void qError(char * msg, char * s1, char * s2) {
+ printf("\n\n==qERROR: %s %s %s\n", msg, s1 ? s1 : "", s2? s2: "");
+}
+
+// ------------------ qCheckQ ------------------
+
+uint32 qCheckQ(Queue * q) {
+ // checks the specified queue for consistency
+ uint32 errors = qCheckSlice("queue", q -> head, q -> tail);
+ return errors;
+}
+
+
+// ------------------ qCheckSlice ------------------
+
+uint32 qCheckSlice(char * msg, qBlock * b0, qBlock * b1) {
+ // checks the specified slice of blocks for consistency
+ // check forward
+ qBlock * front, * back;
+ uint32 fwd = 0, bwd = 0;
+ uint32 errors = 0;
+ front = b0;
+ back = b1;
+ // check going from front arrives at back
+ while (b0 && (b0 != back)) {
+ b0 = b0 -> next;
+ fwd++;
+ }
+ if (b0 != back) {
+ printf("\n\terror in traversing %s forward from %p..%p", msg, front, back);
+ errors++;
+ }
+
+ // check going from back to front arrives at front
+ b0 = back;
+ while (b0 && (b0 != front)) {
+ b0 = b0 -> prev;
+ bwd++;
+ }
+
+ if (b0 != front) {
+ printf("\n\terror in traversing %s backward from %p..%p", msg, front, back);
+ errors++;
+ }
+
+ if (fwd != bwd) {
+ printf("\n\tcount error in traversing %s from %p..%p; fwdcount=%d, bwdcount=%d", msg, front, back, fwd, bwd);
+ errors++;
+ }
+ return errors;
+}
+
+// ------------------ qCountQ ----------------------
+
+uint64 qCountQ(Queue * q) {
+ uint64 n = 0;
+ qBlock * b, * t;
+ b = q -> head;
+ t = q -> tail;
+ if (b && t) {
+ while (b) {
+ n++;
+ b = b -> next;
+ }
+ return n;
+ }
+ else {
+ return 0;
+ }
+}
+
+// ------------------ qSetQEmpty ----------------
+
+void qSetQEmpty(Queue * q) {
+ q -> head = NULL;
+ q -> tail = NULL;
+}
+
+// -------------------------- qInitQ --------------------------
+
+void qInitQ(Queue * q, char * name, uint64 n) {
+ // initialise created queue
+ if (name) {
+ int l = (int)strlen(name);
+ q -> qname = malloc(l + 16);
+ sprintf(q -> qname, "%s[%llu]", name, n);
+ }
+ else q -> qname = NULL;
+
+ qSetQEmpty(q);
+
+// q -> bt = btAny;
+}
+
+//// --------------- qSetQType -------------
+//
+//void qSetQType(Queue * q, blockType bt) {
+// q -> bt = bt;
+// uint64 size = strlen(q -> qname) + strlen(btName(bt)) + 16;
+// char * n = malloc(size);
+// strcpy(n, q -> qname);
+// strcat(n, "-'");
+// strcat(n, btName(bt));
+// strcat(n, "'");
+// //printf("\nqSetQType: freeing '%s' and setting '%s'", q -> qname, n);
+// free(q -> qname);
+// q -> qname = n;
+//}
+//
+// -------------------------- qNewQ ---------------------------
+
+Queue * qNewQ(char * name) {
+ // create and initialise just one queue
+ return qNewQs(1, name);
+}
+
+// -------------------------- qNewQs -------------------------
+
+Queue * qNewQs(uint64 count, char * name) {
+ // creates and initialises an array of 'count' queues
+ Queue * q;
+ uint64 i;
+ q = malloc(count * sizeof(Queue));
+ if (q) {
+ for (i = 0; i < count; i++) {
+ qInitQ(&q[i], name, i);
+ }
+ }
+ return q;
+}
+
+// -------------------------- qKillQs ------------------------
+
+void qKillQs(Queue * qs, uint64 count) {
+ // kills the array of count queues at q
+ free(qs);
+}
+
+// ------------------------- qKillQEntries --------------------------
+
+void qKillQEntries(Queue * q) {
+ // removes and frees all entries on the specified queue
+ // must ONLY be used when the blocks were malloc()'d
+ // does not free any memory associated with the blocks
+ qBlock * ptr;
+ ptr = qGetBlock(q);
+ while (ptr) {
+ free(ptr);
+ ptr = qGetBlock(q);
+ }
+}
+
+// --------------------------- AddQHead ---------------------------
+
+void qAddQHead(Queue * q, qBlock * start, qBlock * end) {
+ // adds the list of blocks to the head of q
+ if (start && end) {
+ start -> prev = NULL;
+ end -> next = q -> head;
+ if (q -> head) {
+ // the queue is non-empty
+ q -> head -> prev = end;
+ q -> head = start;
+ }
+ else {
+ // queue is empty
+ q -> head = start;
+ q -> tail = end;
+ }
+ }
+}
+
+// ---------------------------- qAddQTail -------------------------
+
+void qAddQTail(Queue * q, qBlock * start, qBlock * end) {
+ // adds the list of blocks to the tail of q
+ if (start && end) {
+ end -> next = NULL;
+ start -> prev = q -> tail;
+ if (q -> head) {
+ // the queue is non-empty
+ q -> tail -> next = start;
+ q -> tail = end;
+ }
+ else {
+ // the queue is empty
+ q -> head = start;
+ q -> tail = end;
+ }
+
+ }
+}
+
+// --------------------------- qAppendQTail --------------------
+
+void qAppendQTail(Queue * qd, Queue * qs) {
+ // places all the elements of qs on the tail of qd
+ qBlock * start, *end;
+ start = qFirstBlock(qs);
+ end = qLastBlock(qs);
+
+ qCutQ(qs, start, end);
+ qAddQTail(qd, start, end);
+}
+
+// --------------------------- qAppendQHead --------------------
+
+void qAppendQHead(Queue * qd, Queue * qs) {
+ // places all the elements of qs at the head of qd
+ qBlock * start, *end;
+ start = qFirstBlock(qs);
+ end = qLastBlock(qs);
+
+ qCutQ(qs, start, end);
+ qAddQHead(qd, start, end);
+}
+
+// --------------------------- qCutQ -------------------------
+
+void qCutQ(Queue * q, qBlock * start, qBlock * end) {
+ // cuts the blocks start..end out of queue q
+ if ((start == NULL) || (end == NULL)) {
+ return; // no action if no slice
+ }
+ if ((q -> head == start) && (q -> tail == end)) {
+ // whole queue
+ q -> head = NULL;
+ q -> tail = NULL;
+ }
+ else if (q -> head == start) {
+ // cut from start to some way down
+ q -> head = end -> next;
+ end -> next -> prev = NULL;
+ }
+ else if (q -> tail == end) {
+ // cut from middle to end
+ q -> tail = start -> prev;
+ start -> prev -> next = NULL;
+ }
+ else {
+ // cut from middle
+ start -> prev -> next = end -> next;
+ end -> next -> prev = start -> prev;
+ }
+}
+
+// --------------------------- qCutBlock -------------------------
+
+void qCutBlock(Queue * q, qBlock * block) {
+ // cuts the block 'block' out of queue q,
+ if (block == NULL) return;
+
+ if ((q -> head == block) && (q -> tail == block)) {
+ // whole queue
+ q -> head = NULL;
+ q -> tail = NULL;
+ }
+ else if (q -> head == block) {
+ // remove first block
+ q -> head = block -> next;
+ block -> next -> prev = NULL;
+ }
+ else if (q -> tail == block) {
+ // cut last block
+ q -> tail = block -> prev;
+ block -> prev -> next = NULL;
+ }
+ else {
+ // cut from middle
+ block -> prev -> next = block -> next;
+ block -> next -> prev = block -> prev;
+ }
+}
+
+// --------------------------- qAddBlock -------------------------
+
+void qAddBlock(Queue * q, qBlock * block) {
+ // add block to tail of queue
+
+// if (q -> bt != btAny) {
+// if (q -> bt != block -> bt) {
+// qError("mismatched queue and block type", btName(q -> bt), btName(block -> bt));
+// }
+// }
+ if (block) {
+ block -> next = NULL;
+ block -> prev = q -> tail;
+ if (q -> head ) {
+ // non-empty queue
+ q -> tail -> next = block;
+ q -> tail = block;
+ }
+ else {
+ // empty queue
+ q -> head = block;
+ q -> tail = block;
+ }
+ }
+}
+
+// --------------------------- qAddBlockBefore -------------------------
+
+void qAddBlockBefore(Queue * q, qBlock * block, qBlock * here) {
+ // add 'block' to queue immediately before block 'here'
+ // if q is empty, make block the q
+ // if 'here' is NULL, add to end
+
+ if (block == NULL) return;
+ if (qFirstBlock(q) == NULL) {
+ qAddBlock(q, block);
+ }
+ else if (here == NULL) {
+ // didn't find anywhere; just add to tail
+ qAddBlock(q, block);
+ }
+ else if (here -> prev == NULL) {
+ // add to front
+ qAddBlockHead(q, block);
+ }
+ else {
+ // it's in the middle; chain in block after here->prev
+ qAddBlockAfter(q, block, here->prev);
+ }
+}
+
+// --------------------------- qAddBlockBeforeHead -------------------------
+
+void qAddBlockBeforeHead(Queue * q, qBlock * block, qBlock * here) {
+ // add 'block' to queue immediately before block 'here'
+ // if q is empty, make block the q
+ // if 'here' is NULL, add to head
+
+ if (block == NULL) return;
+ if (qFirstBlock(q) == NULL) {
+ qAddBlock(q, block);
+ }
+ else if ((here == NULL) || (here -> prev == NULL)) {
+ // add to front
+ qAddBlockHead(q, block);
+ }
+ else {
+ // it's in the middle; chain in block after here->prev
+ qAddBlockAfter(q, block, here->prev);
+ }
+}
+
+// --------------------------- AddBlockAfter -------------------------
+
+void qAddBlockAfter(Queue * q, qBlock * block, qBlock * here) {
+ // add block to queue immediately after block here
+
+ if (block == NULL) return;
+ if (qFirstBlock(q) == NULL) {
+ // no queue: add to head
+ qAddBlockHead(q, block);
+ }
+ else if ((here == NULL) || (here -> next == NULL)) {
+ // no place to add, or 'here' is the tail of the queue, so add to tail
+ qAddBlock(q, block);
+ }
+ else {
+ // 'here' is in the middle; chain in block after here
+ qBlock * next;
+
+ next = here -> next;
+ block -> next = next;
+ block -> prev = here;
+ here -> next = block;
+ next -> prev = block;
+ }
+}
+
+// --------------------------- qAddBlockAfterHead -------------------------
+
+void qAddBlockAfterHead(Queue * q, qBlock * block, qBlock * here) {
+ // add block to queue immediately after block here
+ // add to front of queue if 'here' is NULL
+
+ if (block == NULL) return;
+ if ((qFirstBlock(q) == NULL) || (here == NULL)) {
+ // no queue: add to head
+ qAddBlockHead(q, block);
+ }
+ else if (here == q -> tail) {
+ // add to tail in normal manner
+ qAddBlock(q, block);
+ }
+ else {
+ // 'here' is in the middle; chain in block after here
+ qBlock * next;
+
+ next = here -> next;
+ block -> next = next;
+ block -> prev = here;
+ here -> next = block;
+ next -> prev = block;
+ }
+}
+
+void printSymQ(char * msg, void * st, Queue * q);
+
+// --------------------------- qAddBlockHead -------------------------
+
+void qAddBlockHead(Queue * q, qBlock * block) {
+
+ // there's something wrong with this
+
+ // add block to FRONT of queue
+ if (block == NULL) return;
+
+ qBlock * head = qFirst(q);
+
+ if (head) {
+ // non-empty queue. point old head at new block. don't touch tail.
+ head -> prev = block;
+ // point new block at old head
+ block -> next = head;
+ // make it have no prevs
+ block -> prev = NULL;
+ // set block as the head.
+ q -> head = block;
+ }
+ else {
+ // empty queue
+ q -> head = block;
+ q -> tail = block;
+ }
+}
+
+// ----------------------- qGetBlockTail ----------------
+
+qBlock * qGetBlockTail(Queue * q) {
+ // gets the tail of the queue
+ qBlock * block = q -> tail;
+ qCutBlock(q, block);
+ return block;
+}
+// ---------------------------- qGetBlock ----------------------
+
+qBlock * qGetBlock(Queue * q) {
+ // removes the first block on 'q' and returns it
+ qBlock * block;
+
+ block = q -> head;
+
+ if (block) {
+ // non-empty queue
+ if (q -> tail == block) {
+ // just one in queue; empty the queue
+ qSetQEmpty(q); // empty the queue
+ }
+ else {
+ q -> head = block -> next; // move head
+ block -> next -> prev = NULL; // mark new head
+ }
+ }
+ return block;
+}
+
+// -------------------------- qPushBlock ----------------------
+
+void qPushBlock(Queue * q,qBlock * block) {
+ // push and pop run a queue as a stack; push puts block on front of queue
+ qAddBlockHead(q, block);
+}
+
+// -------------------------- qPushBlock ----------------------
+
+qBlock * qPopBlock(Queue * q) {
+ // push and pop run a queue as a stack; pop gets block from front of queue
+ return qGetBlock(q);
+}
+
+// --------------------------- qInitBlock ---------------------
+
+void qInitBlock(qBlock * block) {
+ // initialise block pointers to values which will surely trap if used
+ block -> next = NULL;
+ block -> prev = NULL;
+// block -> bt = btAny;
+}
+
+
+//// ----------------- qSetBlockType ---------------
+//
+//void qSetBlockType(qBlock * b, blockType bt) {
+// b -> bt = bt;
+//}
+//
+// --------------------------- qNewBlock -----------------------
+
+void * qNewBlock(uint32 size) {
+ // creates and initialises a new block of the desired size
+ qBlock * block = malloc(size);
+ if (block) qInitBlock(block);
+ return block;
+}
+
+// ------------- qInsertKeyBlockInOrder --------------
+
+void qInsertBlockInOrder(Queue * q, qBlock * block) {
+ // q is a key-ordered queue of qKeyBlocks
+ // it is not in any queue (pointers are NULL)
+ // run down the queue looking for the insertion point, which is
+ // in front of the first block with the same or later time
+
+// if (block -> key < 300) printf("\n--qInsertKeyBlockInOrder: block %p time %lld", block, block -> key);
+ qBlock * here = qFirst(q);
+ while (here) {
+// if (block -> key < 300) printf("\n\tchecking block %p at time %lld", here, here -> key);
+ if (here -> key >= block -> key) break;
+ here = qNext(here);
+ }
+
+ if (here) {
+ // insert before here
+// if (block -> key < 300) printf("\n\t.. insert before block %p key %lld", here, here -> key);
+ qAddBlockBefore(q, block, here);
+ }
+ else {
+ qAddBlock(q, block);
+// if (block -> key < 300) printf("\t.. add to tail");
+ }
+}
+
+// ------------- qPrintKeyQ ---------------
+
+void qPrintKeyQ(Queue * q) {
+ printf("\nKey Queue %p '%s'", q, q -> qname);
+ qBlock * b = qFirst(q);
+ while (b) {
+ printf("\n\tblock %p has key %lld", b, b -> key);
+ b = qNext(b);
+ }
+}
diff --git a/cachesim/queues.h b/cachesim/queues.h
new file mode 100644
index 0000000..27788d4
--- /dev/null
+++ b/cachesim/queues.h
@@ -0,0 +1,104 @@
+//
+// queues.h
+//
+// Created by pete on 1/29/16.
+// Copyright © 2016-2020 Pete. All rights reserved.
+//
+
+
+#ifndef queues_h
+#define queues_h
+
+#include
+#include
+#include "types.h"
+
+// ==================== queue manipulation declarations ========================
+
+// the Block structure. this must be the first item in a queueable structure
+// (so the address of the structure is, conveniently, the address of the
+// block)
+// queues are doubly-linked for safety and for insertion/deletion speed & simplicity
+
+// the header block for inclusion in each list element
+typedef struct block qBlock;
+
+struct block {
+ qBlock * next; // next block
+ qBlock * prev; // previous block
+ int64 key;
+};
+
+
+// the queue structure, pointing at head and tail of the queue
+typedef struct queue {
+ char * qname;
+ qBlock * head;
+ qBlock * tail;
+// blockType bt;
+} Queue;
+
+// Queue procedures
+
+char * qNameAndVersion(void);
+qBlock * qGetQHead(Queue * q);
+Queue * qGetQSlice(qBlock * front, qBlock * back);
+void qInitQ(Queue * q, char * name, uint64 n);
+void qSetQEmpty(Queue * q);
+Queue * qNewQ(char * name);
+uint64 qCountQ(Queue * q);
+Queue * qNewQs(uint64 count, char * name);
+void qKillQs(Queue * q, uint64 count);
+void qAppendQHead(Queue * qd, Queue * qs);
+void qAppendQTail(Queue * qd, Queue * qs);
+void qAddQHead(Queue * q, qBlock * start, qBlock * end);
+void qAddQTail(Queue * q, qBlock * start, qBlock * end);
+void qCutQ(Queue * q, qBlock * start, qBlock * end);
+void qAddBlock(Queue * q, qBlock * block);
+void qAddBlockHead(Queue * q, qBlock * block);
+void qAddBlockBefore(Queue * q, qBlock * block, qBlock * here);
+void qAddBlockAfter(Queue * q, qBlock * block, qBlock * here);
+void qAddBlockBeforeHead(Queue * q, qBlock * block, qBlock * here);
+void qAddBlockAfterHead(Queue * q, qBlock * block, qBlock * here);
+qBlock * qGetBlock(Queue* q);
+qBlock * qGetBlockTail(Queue * q);
+void qCutBlock(Queue * q, qBlock * block);
+void * qNewBlock(uint32 size);
+
+void qInitBlock(qBlock * block);
+void qInsertBlockInOrder(Queue * q, qBlock * block);
+void qPrintKeyQ(Queue * q);
+
+int qSetQChecking(int check);
+void qKillQEntries(Queue * q); // removes and frees all entries in q
+ // assumes all blocks allocated with malloc()
+
+// checking queues
+uint32 qCheckQ(Queue * q);
+uint32 qCheckSlice(char * msg, qBlock * b0, qBlock * b1);
+uint64 qCountQ(Queue * q);
+//void qSetBlockType(qBlock * b, blockType bt);
+//void qSetQType(Queue * q, blockType bt);
+
+// queues as stacks
+void qPushBlock(Queue * q, qBlock * block);
+qBlock * qPopBlock(Queue * q);
+
+// errors
+void qError(char * msg, char * s1, char * s2) ;
+
+// walk queues efficiently..
+
+#define qNextBlock(p) ((p) -> header.next)
+#define qPrevBlock(p) ((p) -> header.prev)
+#define qFirstBlock(q) ((q) -> head)
+#define qLastBlock(q) ((q) -> tail)
+#define qEmpty(q) ((q -> head == NULL) && (q -> tail == NULL))
+
+// untyped
+#define qLast(q) ((void *)(qLastBlock((Queue *)q)))
+#define qFirst(q) ((void *)(qFirstBlock((Queue *)q)))
+#define qNext(b) ((void *)(((qBlock*)b) -> next))
+#define qPrev(b) ((void *)(((qBlock*)b) -> prev))
+
+#endif /* queues_h */
diff --git a/cachesim/tagonlycache.c b/cachesim/tagonlycache.c
new file mode 100644
index 0000000..9894386
--- /dev/null
+++ b/cachesim/tagonlycache.c
@@ -0,0 +1,352 @@
+//
+// cache.c
+// engines
+//
+// Created by Pete Wilson on 4/18/20.
+// Copyright © 2020 Kiva Design Groupe LLC. All rights reserved.
+//
+
+#define EXTERN extern
+
+#define gTraceAll (0)
+#define gReport (0)
+
+#include
+#include "tagonlycache.h"
+
+char * title = "tagonlycache 0.1v2 [Sept 17 2020]";
+
+/*
+ Versions
+=========
+
+ - tagonlycache 0.1v2 [Sept 17 2020]
+ - serious error in the computation of the index in the cache from tag corrcted.
+
+ 0.1v1 - not committed; basic code from the standard cache source
+ */
+
+
+// ----------- addrMaskForCache ------------
+
+int64 addrMaskForCache(cacheData * cd) {
+ if (gTraceAll && gReport) printf("\n--addrMaskForCache %s: l2l = %d linelength=%d; ", cd->name, cd -> log2LineLength, 1 << (cd -> log2LineLength));
+ int64 mask = (1 << (cd -> log2Lines)) - 1;
+ if (gTraceAll && gReport) printf(": mask = 0x%08llx", mask);
+ return mask;
+}
+
+// ------------ addrToLineStartAddr -------------
+
+int64 addrToLineStartAddr(cacheData * cd, int64 address) {
+ if (gTraceAll && gReport) printf("\n--addrToLineStartAddr %s: l2l = %d - address = 0x%08llx %lld; ", cd->name, cd -> log2Lines, address, address);
+ int64 mask = addrMaskForCache(cd);
+ if (gTraceAll && gReport) printf("\t notmask = 0x%08llx", ~mask);
+ int64 start = address & (~mask);
+ if (gTraceAll && gReport) printf("\t start = 0x%08llx", start);
+ return start;
+}
+
+// ------------- addrToTag ---------------------
+
+int64 addrToTag(cacheData * cd, int64 address) {
+ if (gTraceAll && gReport) printf("\n\taddrToTag: addr is %lld 0x%llx", address, address);
+ int64 tag = address >> (cd -> log2LineLength);
+ return tag;
+}
+
+// ------------- tagToAddr ---------------------
+
+int64 tagToAddr(cacheData * cd, int64 tag) {
+ int64 addr = tag << (cd -> log2LineLength);
+ return addr;
+}
+
+// -------------- getIndexAndTag --------------------
+
+void getIndexAndTag(int64 address, cacheData * d, int64 * index_ptr, int64 * tag_ptr) {
+ // we have a byte address coming in
+ // compute the tag
+ int64 temp = addrToTag(d, address);
+ // given a tag, decide which line that should go to. mask the tag with a mask based on number of lines
+ int64 mask = addrMaskForCache(d);
+ int64 index = temp & mask;
+ int64 tag = temp;
+ *index_ptr = index;
+ *tag_ptr = tag;
+ if (gTraceAll && gReport) printf("\ngetIndexAndTag 0x%08llx (%lld) : linelength = %d bytes:: index = %d temp = 0x%08x mask = 0x%08x tagval = 0x%08x\n",
+ address, address, d -> length, (int)index, (int)temp, (int)mask, (int)tag);
+}
+
+// -------------- int64LineLength --------------
+
+int int64LineLength(cacheData * cd) {
+ int len = cd -> length;
+ len = len >> 3;
+ return len;
+}
+
+// -------------- fastcachelookup -------------------
+
+int fastcachelookup(int64 address, cacheData * d) {
+ // read the address for lookup
+ // compute index into the cache, and the matching value for the tag
+// return 1;
+ // see if the address is set in the hitvector
+ d -> reads++;
+ if (d -> hitvector[address]) {
+ d -> hits++;
+ d -> fasthits++;
+ return 1;
+ }
+ else {
+ // gotta do a real cache lookup
+ if (gTraceAll && gReport) printf("\nlookup address 0x%08llx ", address);
+
+ // look up the address in the cache's hi
+ int64 index, tag;
+ getIndexAndTag(address, d, &index, &tag);
+
+ if (gTraceAll && gReport) printf("\n\t\tindex = %lld; tag = 0x%08llx", index, tag);
+
+ for (int way = 0; way < d -> numways; way++) {
+ cacheWay * cw = d -> ways[way];
+ if ((cw -> tags[index] == tag) && (cw -> valid[index])) {
+ // hit!
+ if (gTraceAll && gReport) printf("\t- hit!");
+ return 1;
+ }
+ }
+
+ if (gTraceAll && gReport) printf("\t- MISS!");
+ d -> misses++;
+ // we missed. choose a way at random, eject the incumbent if any and install the new
+ int way = uniform(0, 0, d -> numways);
+ cacheWay * cw = d -> ways[way];
+
+ if (cw -> valid[index] == 0) {
+ // empty
+ cw -> tags[index] = tag;
+ cw -> valid[index] = 1;
+ // mark the hitvector. first, get the address corresponding to the start of the cache line
+ // we have computed the tag before
+ int64 addr = tagToAddr(d, tag);
+ int n = d -> length;
+ for (int i = 0; i < n; i++) {
+ d -> hitvector[addr++] = 1;
+ }
+ }
+ else {
+ // find the address for the line we're ejecting
+ int64 addr = tagToAddr(d, cw -> tags[index]);
+ int n = d -> length;
+ for (int i = 0; i < n; i++) {
+ d -> hitvector[addr++] = 0;
+ }
+ // eject the line
+ d -> ejections++;
+ cw -> tags[index] = tag;
+ cw -> valid[index] = 1;
+
+ // set up the hitvector
+ addr = tagToAddr(d, tag);
+ n = d -> length;
+ for (int i = 0; i < n; i++) {
+ d -> hitvector[addr++] = 1;
+ }
+
+ }
+ return 0;
+ }
+}
+
+// -------------- lookup -------------------
+
+int lookup(char access, int64 address, cacheData * cache, cacheWay ** cway) {
+ // read the address for lookup
+ // compute index into the cache, and the matching value for the tag
+
+ // look up the address in the cache's hi
+ int64 index, tag;
+ getIndexAndTag(address, cache, &index, &tag);
+ if (access == 'r') cache -> reads++;
+ else if (access == 'w') cache -> writes++;
+
+ for (int way = 0; way < cache -> numways; way++) {
+ cacheWay * cw = cache -> ways[way];
+ if ((cw -> tags[index] == tag) && (cw -> valid[index])) {
+ // hit!
+ // note the hit
+ cache -> hits++;
+ // if it's a write, make it dirty
+ if (access == 'w') cw -> dirty[index] = 1;
+ *cway = cw;
+ return 1;
+ }
+ }
+
+ cache -> misses++;
+ // we missed. choose a way at random, eject the incumbent if any and install the new
+ int way = uniform(0, 0, cache -> numways);
+ cacheWay * cw = cache -> ways[way];
+ if (cw -> valid[index] == 0) {
+ // a cacheline without validity
+ cw -> tags[index] = tag;
+ cw -> valid[index] = 1;
+ cw -> dirty[index] = 0;
+ }
+ else {
+ // we already have a cacheline here, so eject the line
+ if (cw -> dirty[index]) {
+ cache -> ejections++;
+ }
+ cw -> tags[index] = tag;
+ cw -> valid[index] = 1;
+ cw -> dirty[index] = 0;
+ }
+ *cway = cw;
+ return 0;
+}
+
+// -------------- newCacheData -----------
+
+void * newCacheData(void) {
+ cacheData * cd = malloc(sizeof(cacheData));
+ if (cd) {
+ cd -> isACache = 0xcace;
+ cd -> counter = 0;
+ cd -> requests = 0;
+ cd -> owner = NULL;
+ }
+ return cd;
+}
+
+// -------------- configureCache -------------
+
+void configureCache(cacheData * cd, char * name, int32 numways, int32 log2LineLength, int32 log2Lines) {
+ // sets up the specified cacheData
+ cd -> name = strdup(name);
+
+ cd -> hits = 0;
+ cd -> fasthits = 0;
+ cd -> misses = 0;
+ cd -> ejections = 0;
+
+ cd -> reads = 0;
+ cd -> writes = 0;
+
+ cd -> lines = 1 << log2Lines;
+ cd -> length = 1 << log2LineLength; // BYTES
+
+ cd -> log2Lines = log2Lines;
+ cd -> log2LineLength = log2LineLength;
+
+ cd -> numways = numways;
+
+ cd -> ejections = 0;
+ cd -> writebacks = 0;
+
+ cd -> outstanding = qNewQ("outstanding misses");
+
+ if (gTraceAll && gReport) {
+ printf("\nConfiguring cache %s:", name);
+ printf("\n\tways = %d", numways);
+ printf("\n\tline length = %d bytes", cd -> length);
+ printf("\n\tlines per way= %d", cd -> lines);
+ }
+
+ cd -> ways = malloc(numways * sizeof(cacheWay *));
+
+ // initialise all the cache ways
+ for (int32 way = 0; way < numways; way++) {
+ cacheWay * cw = malloc(sizeof(cacheWay));
+ char * wayname = malloc(64);
+ sprintf(wayname, "way[%d]", way);
+ cw -> name = wayname;
+ cd -> ways[way] = cw;
+ cw -> tags = malloc(cd -> lines * sizeof(int64));
+ cw -> valid = malloc(cd -> lines * sizeof(int8));
+ cw -> dirty = malloc(cd -> lines * sizeof(int8));
+ cw -> timetag = malloc(cd -> lines * sizeof(int64));
+
+ for (int line = 0; line < cd -> lines; line++) {
+ cw -> tags[line] = 0;
+ cw -> dirty[line] = 0;
+ cw -> valid[line] = 0;
+ cw -> timetag[line] = 0;
+ }
+ }
+}
+
+// ------------- intHitRate --------------------
+
+int intHitRate(int width, cacheData * cd) {
+ int v;
+// printf("\nintHitRate: for cache '%s'. Reads = %lld writes = %lld", cd -> name, cd -> reads, cd -> writes);
+ if ((cd -> reads + cd -> writes) > 0) {
+ float hits = ((float)cd -> hits/(float)(cd -> reads + cd -> writes)) * (float) width;
+ v = (int) hits;
+ if (v > 100) {
+ printf("\n--%d--", v);
+ }
+ }
+ else {
+ v = 0;
+ }
+ return v;
+}
+
+// -------------- reportCacheStats ----------------
+
+void reportCacheStats(cacheData * cache) {
+// if ((cpu -> currtime != 0) && (final == 1)) {
+ printf("\n\nConfiguration for cache '%s':", cache -> name);
+ printf("\n======================================================");
+ for (int i = 0; i < strlen(cache -> name); i++) {
+ putchar('=');
+ }
+ printf("\n\tways = %d", cache -> numways);
+ printf("\n\tline length = %d bytes", cache -> length);
+ printf("\n\tlines per way = %d", cache -> lines);
+ int capacity =((cache -> numways) * cache -> lines) * (cache -> length);
+ if (capacity > 1024) {
+ printf("\n\tCapacity = %dKB", capacity / 1024);
+ }
+ else {
+ printf("\n\tCapacity = %dB", capacity);
+ }
+ printf("\n\nStatistics:");
+ printf("\n\treads = %lld", cache -> reads);
+ printf("\n\twrites = %lld", cache -> writes);
+ printf("\n\tejections = %lld", cache -> ejections);
+ printf("\n\tfasthits = %lld", cache -> fasthits);
+ printf("\n\thits = %lld", cache -> hits);
+ printf("\n\tmisses = %lld", cache -> misses);
+ printf("\n\thit rate = %.1f%%",((float)cache -> hits/(float)(cache -> reads + cache -> writes)) * 100.0);
+ }
+
+
+// ------------------- printWay -------------------
+
+void printWay(cacheData * cd, cacheWay * way) {
+ // prints out the cacheway
+ int lines = cd -> lines;
+ for (int i = 0; i < lines; i++) {
+ printf("\n\t");
+ if (way -> dirty[i]) printf("d"); else printf("-");
+ if (way -> valid[i]) printf("V"); else printf("-");
+ printf("\t0x%08llx\t", way -> tags[i]);
+ }
+}
+
+// ------------------- printCache -------------------
+
+void printCache(cacheData * cache) {
+ // prints out the complete contents of the specified cache
+ printf("\nState of cache: %s", cache -> name);
+ cacheWay ** cw = cache -> ways;
+ for (int i = 0; i < cache -> numways; i++) {
+ printf("\n\nWay[%d]", i);
+ printWay(cache, cw[i]);
+ }
+}
diff --git a/cachesim/tagonlycache.h b/cachesim/tagonlycache.h
new file mode 100644
index 0000000..407bbfa
--- /dev/null
+++ b/cachesim/tagonlycache.h
@@ -0,0 +1,152 @@
+//
+// tagonlycache.c
+// engines
+//
+// Created by Pete Wilson on 4/18/20.
+// Copyright © 2020 Kiva Design Groupe LLC. All rights reserved.
+//
+
+#ifndef cache_h
+#define cache_h
+
+#include
+#include
+#include "types.h"
+#include "utilities.h"
+#include "container.h"
+#include "queues.h"
+
+typedef struct cachedata cacheData;
+
+// ----------------- cacheWay -----------------
+
+typedef struct {
+ char * name;
+ int64 * tags;
+ int8 * dirty;
+ int8 * valid;
+ int64 * timetag;
+} cacheWay;
+
+// a miss Request is something internal to the processor.
+// a miss is discovered either when trying to fetch an instruction, or when executing a load or store - all at the middle portion of phi0
+// at the back end of phi0, the miss is discovered and a Request sent to the appopriate processor output port
+// and the missReq returned to the pool
+// meanwhile, a LdStore is created in parallel with the memReq.
+
+// there's some duplication of work in this cycle...
+
+typedef struct {
+ qBlock header;
+ int64 item_address;
+} missReq;
+
+// ------------- cacheLookup 'commands'----
+
+typedef enum {read_a_value, read_a_line, read_nothing } cacheLookup;
+
+typedef struct cachedata cacheData;
+
+// -------------- cacheData ----------------
+
+struct cachedata {
+ char * name;
+ void * owner; // I'm a cache to what engine?
+ int32 isACache;
+ int64 counter;
+ int64 requests;
+ int64 ejections;
+ int64 writebacks;
+
+ void * memorySystem;
+
+ cacheData * up; // the cache above me
+
+ int64 fasthits; // how many hits we got with the hitvector
+ uint8 * hitvector; //an array of bytes (for an icache only) mapping the code segment
+ // for pc N, if byte N is set the instruction is cached
+
+ // managing dcache misses
+ Queue * outstanding; // queue of outstanding Misses (see above)
+ Queue * missPool;
+ Queue * triggerPool;
+
+ int64 reads;
+ int64 writes;
+
+ int64 hits;
+ int64 misses;
+ int64 result;
+
+ int req_tag; // tag used for outgoing requests
+
+ // Geometry
+ int32 log2Lines;
+ int32 log2LineLength;
+ int32 lines;
+ int32 length; // in BYTES
+
+ int32 numways;
+ cacheWay ** ways;
+};
+
+typedef struct {
+ int64 timetag;
+ int open; // if negative, not open
+} memPage;
+
+typedef struct {
+ char * name;
+ int64 timetag;
+ int64 reads;
+ int64 writes;
+ uint32 numpages;
+ uint32 curropen;
+ uint32 maxopen;
+ memPage ** pages;
+ uint32 dt_open;
+ uint32 dt_closed;
+} memoryBank;
+
+typedef struct {
+ char * name;
+ cacheData * cache;
+ uint32 numBanks;
+ uint32 maxopen;
+ memoryBank ** mbank;
+} memorySystem;
+
+
+typedef struct processordata processorData;
+
+// ------------------ cacheEngine ---------------
+
+//int cacheEngine(Engine * e, int phi);
+void * newCacheData(void);
+void configureCache(cacheData * cd, char * name, int32 numways, int32 log2LineLength, int32 log2Lines);
+
+void getIndexAndTag(int64 address, cacheData * d, int64 * index_ptr, int64 * tag_ptr);
+
+void printCacheLine(cacheData * cd, int way, int index);
+int64 addrToTag(cacheData * cd, int64 address);
+int64 tagToAddr(cacheData * cd, int64 tag);
+int int64LineLength(cacheData * cd);
+
+int64 addrMaskForCache(cacheData * cd);
+int64 addrToLineStartAddr(cacheData * cd, int64 address);
+
+int lookup(char access, int64 address, cacheData * d, cacheWay ** cway);
+int fastcachelookup(int64 address, cacheData * d);
+
+void reportCacheStats(cacheData * cache);
+
+void printWay(cacheData * cd, cacheWay * way);
+void printCache(cacheData * cache);
+
+int intHitRate(int width, cacheData * cd);
+
+
+memoryBank * newMemoryBank(int banknum, char * name, int numpages, int maxopen, int dtopen, int dtclosed);
+memorySystem * newMemorySystem(char * name, int numbanks, cacheData * cache);
+
+#endif /* tagonlycache_h */
diff --git a/cachesim/types.h b/cachesim/types.h
new file mode 100644
index 0000000..b004744
--- /dev/null
+++ b/cachesim/types.h
@@ -0,0 +1,34 @@
+//
+// types.h
+// standard pete types
+//
+// Created by pete on 1/29/16.
+// Copyright � 2016 Pete. All rights reserved.
+//
+// edited or touched Nov 6 2018
+
+#ifndef types_h
+#define types_h
+
+// useful types
+typedef unsigned char uint8;
+typedef unsigned short uint16;
+typedef unsigned int uint32;
+typedef unsigned long long uint64;
+
+typedef char int8;
+typedef short int16;
+typedef int int32;
+typedef long long int64;
+
+typedef float float32;
+typedef double float64;
+
+typedef enum {blockTriple = 1023, btAny, blockStatement, blockStatementBlock, blockElement, blockInstruc, btMax } blockType;
+
+#define TRUE (1)
+#define FALSE (0)
+
+char * btName(blockType bt);
+
+#endif /* types_h */
diff --git a/cachesim/utilities.c b/cachesim/utilities.c
new file mode 100644
index 0000000..053c660
--- /dev/null
+++ b/cachesim/utilities.c
@@ -0,0 +1,237 @@
+//
+// utilities.c
+// simpleADL
+//
+// Created by pete on 1/17/17.
+// Copyright © 2017 Kiva Design. All rights reserved.
+//
+// edited or touched Nov 6 2018
+
+#include
+#include
+#include
+
+#define EXTERN extern
+#include "utilities.h"
+#include "types.h"
+
+static char * title = "kiva utility functions 1.0v6 [June 10 2019]";
+
+/*
+ 1.0v6 [June 10 2019]
+ - added btName() to give names to the types of blocks and queues
+ 1.0v5 [April 7 2018]
+ - added isqrt() [validated elsewhere]
+ 1.0v4 [May 2017]
+ - added teqFree()
+ 1.0v3
+ - added teqAlloc()
+ - by default utilityReport now set to 0
+ 1.0v2 May 2017
+ - added char * utGetNameFromPath(char * p)
+ 1.0v1
+ - initial version
+ */
+
+
+
+// ---------------- utilityTitleAndVersion ------------------
+
+char * utilityTitleAndVersion(void) {
+ return title;
+}
+
+// -------------- findent -----------------
+
+void findent(FILE * f, int depth) {
+ // outputs 'indent' tabs after a newline
+ fprintf(f, "\n");
+ while (depth >= 0) {
+ fprintf(f, "\t");
+ depth--;
+ }
+}
+
+// ---------------- timenow ------------------
+
+uint64 timenow(void) {
+ // returns the current time in microseconds
+ struct timeval tv;
+ struct timezone tz;
+ uint64 thetime;
+ gettimeofday(&tv, &tz);
+ thetime = ((uint64)tv.tv_sec * 1000000) + (uint64)tv.tv_usec;
+ return thetime;
+}
+
+
+// -------------------- utGetNameFromPath ------------------
+
+char * utGetNameFromPath(char * p) {
+ char * path = strdup(p);
+ // extract the last slice of the path to give the name
+ uint32 len = (uint32)strlen(path);
+ char * ptr = &path[len];
+ *ptr = '\0';
+ // walk backwards till we find a '/'
+ while (*ptr != '/') ptr--;
+ char * name = strdup(ptr + 1);
+ free(path);
+ return name;
+}
+
+// ---------------- comments on rn creation ----------------
+
+/*
+
+ https://fr.mathworks.com/matlabcentral/fileexchange/8054-triangular-distributed-random-variable-generator?requestedDomain=true
+
+ %Script by Dr.Mongkut Piantanakulchai
+ %To simulate the triangular distribution
+ %Return a vector of random variable
+ %The range of the value is between (a,b)
+ %The mode is c (most probable value)
+ %n is to total number of values generated
+ %Example of using
+ %X = trirnd(1,5,10,100000);
+ % this will generate 100000 random numbers between 1 and 10 (where most probable
+ % value is 5)
+ % To visualize the result use the command
+ % hist(X,50);
+
+ function X=trirnd(a,c,b,n)
+ X=zeros(n,1);
+ for i=1:n
+ %Assume a= 0
+ limit MUST be > base
+ these are NOT checked in the runtime
+ */
+
+ // ********* NOTE: warnings about integer overflow in expressions in this function should be ignored.
+
+ result = RandomStreams[stream];
+ result = (rvd * (result % rvquotient)) -
+ (rvremainder * (result / rvquotient));
+ if (result == 0) {
+ // kill any zero values
+ result = rvd;
+ }
+
+ RandomStreams[stream] = result;
+
+ //printf("\n\t\tRAW rv= %d 0x%08lx", result, result);
+
+ // reduce the range of the value to base..limit
+ result %= (limit - base);
+ return (base + result);
+}
+
+// ----------------- isqrt -----------------------
+
+uint32 isqrt(uint32 n) {
+ uint32 rem = 0;
+ uint32 root = 0;
+ uint32 i;
+ // validated with simple tests
+ for (i = 0; i < 16; i++) {
+ root <<= 1;
+ rem <<= 2;
+ rem += n >> 30;
+ n <<= 2;
+
+ if (root < rem) {
+ root++;
+ rem -= root;
+ root++;
+ }
+ }
+ return root >> 1;
+}
+
+
+// ----------------- triangular -------------------
+
+uint32 triangular(uint32 stream, uint32 base, uint32 limit, uint32 mode) {
+ // creates a triangularly-distributed RN in the range base, limit with peak at mode
+ // only works for values in 0..1 as fractions...
+
+ uint32 z = uniform(stream, base, limit);
+ uint32 s = isqrt(z*(limit - base)*(mode - base)) + base;
+
+ if (s < mode) {
+ return s;
+ }
+ else {
+ return limit-isqrt((1-z)*(limit-base)*(limit-mode));
+ }
+
+}
+/* ---------------------- initUniform --------------------------------- */
+
+void initUniform(void) {
+ // initialise the seeds - must call before calling uniform
+
+ int32 i;
+ for (i = 0; i < maxUniformStream; i++) {
+ RandomStreams[i] = i + 1;
+ }
+}
+
+// ------------- sext ---------------------
+
+int64 sext(uint32 n, uint64 v) {
+ // sign extends v assuming it has n bits of data
+ int64 r;
+// printf("\nsign extend '%lld' which comprises %d bits", v, n);
+ int64 mask = -1LL;
+ uint64 bit = (1LL << (n - 1));
+// printf("\n\tbit = %lld", bit);
+ if (v & bit) {
+ // need to sign extend
+ mask = mask << n;
+// printf("\n\tmask = 0x%08llx", mask);
+ r = mask | v;
+// printf("\n\tr = 0x%08llx %lld", r, r);
+ }
+ else {
+ // nope
+ r = v;
+ }
+ return r;
+}
+
+
diff --git a/cachesim/utilities.h b/cachesim/utilities.h
new file mode 100644
index 0000000..554a6e2
--- /dev/null
+++ b/cachesim/utilities.h
@@ -0,0 +1,34 @@
+
+// utilities.h
+// simpleADL
+//
+// Created by pete on 1/17/17.
+// Copyright © 2017 Kiva Design. All rights reserved.
+//
+// edited or touched Nov 6 2018
+
+#ifndef utilities_h
+#define utilities_h
+
+#include
+#include "types.h"
+
+char * utilityTitleAndVersion(void);
+
+uint64 timenow(void);
+void findent(FILE * f, int depth) ;
+
+void * teqAlloc(char * msg, uint64 size);
+void teqFree(char * msg, void * ptr);
+
+char * utGetNameFromPath(char * p);
+uint32 isqrt(uint32 n);
+uint32 uniform(uint32 stream, uint32 base, uint32 limit);
+uint32 triangular(uint32 stream, uint32 base, uint32 limit, uint32 mode);
+void initUniform(void);
+void findent(FILE * f, int depth);
+
+int64 sext(uint32 n, uint64 v);
+void allocError(uint64 n, char * thing, char * filename, int32 linenumber);
+
+#endif /* utilities_h */
diff --git a/caveat/FPoperations.def b/caveat/FPoperations.def
new file mode 100644
index 0000000..4d7ffdc
--- /dev/null
+++ b/caveat/FPoperations.def
@@ -0,0 +1,61 @@
+# Macro Definition RM? FPX? Softfloat Expression Type C++ Expression (Host Hardware FP Arithmetic)
+
+@FMADD32( rm, rd, rs1, rs2, rs3) RM FPX FR(rd).f32 = f32_mulAdd( F32(rs1), F32(rs2), F32(rs3)) n FR(rd).f = (FR(rs1).f * FR(rs2).f) + FR(rs3).f; box(rd)
+@FMSUB32( rm, rd, rs1, rs2, rs3) RM FPX FR(rd).f32 = f32_mulAdd( F32(rs1), F32(rs2), NF32(rs3)) n FR(rd).f = (FR(rs1).f * FR(rs2).f) - FR(rs3).f; box(rd)
+@FNMADD32(rm, rd, rs1, rs2, rs3) RM FPX FR(rd).f32 = f32_mulAdd(NF32(rs1), F32(rs2), NF32(rs3)) n FR(rd).f = -(FR(rs1).f * FR(rs2).f) - FR(rs3).f; box(rd)
+@FNMSUB32(rm, rd, rs1, rs2, rs3) RM FPX FR(rd).f32 = f32_mulAdd(NF32(rs1), F32(rs2), F32(rs3)) n FR(rd).f = -(FR(rs1).f * FR(rs2).f) + FR(rs3).f; box(rd)
+
+@FMADD64( rm, rd, rs1, rs2, rs3) RM FPX FR(rd).f64 = f64_mulAdd( F64(rs1), F64(rs2), F64(rs3)) n FR(rd).d = (FR(rs1).d * FR(rs2).d) + FR(rs3).d
+@FMSUB64( rm, rd, rs1, rs2, rs3) RM FPX FR(rd).f64 = f64_mulAdd( F64(rs1), F64(rs2), NF64(rs3)) n FR(rd).d = (FR(rs1).d * FR(rs2).d) - FR(rs3).d
+@FNMADD64(rm, rd, rs1, rs2, rs3) RM FPX FR(rd).f64 = f64_mulAdd(NF64(rs1), F64(rs2), NF64(rs3)) n FR(rd).d = -(FR(rs1).d * FR(rs2).d) - FR(rs3).d
+@FNMSUB64(rm, rd, rs1, rs2, rs3) RM FPX FR(rd).f64 = f64_mulAdd(NF64(rs1), F64(rs2), F64(rs3)) n FR(rd).d = -(FR(rs1).d * FR(rs2).d) + FR(rs3).d
+
+@FADD32(rm, rd, rs1, rs2) RM FPX FR(rd).f32 = f32_add(F32(rs1), F32(rs2)) n FR(rd).f = FR(rs1).f + FR(rs2).f; box(rd)
+@FSUB32(rm, rd, rs1, rs2) RM FPX FR(rd).f32 = f32_sub(F32(rs1), F32(rs2)) n FR(rd).f = FR(rs1).f - FR(rs2).f; box(rd)
+@FMUL32(rm, rd, rs1, rs2) RM FPX FR(rd).f32 = f32_mul(F32(rs1), F32(rs2)) n FR(rd).f = FR(rs1).f * FR(rs2).f; box(rd)
+@FDIV32(rm, rd, rs1, rs2) RM FPX FR(rd).f32 = f32_div(F32(rs1), F32(rs2)) n FR(rd).f = FR(rs1).f / FR(rs2).f; box(rd)
+
+@FADD64(rm, rd, rs1, rs2) RM FPX FR(rd).f64 = f64_add(F64(rs1), F64(rs2)) n FR(rd).d = FR(rs1).d + FR(rs2).d
+@FSUB64(rm, rd, rs1, rs2) RM FPX FR(rd).f64 = f64_sub(F64(rs1), F64(rs2)) n FR(rd).d = FR(rs1).d - FR(rs2).d
+@FMUL64(rm, rd, rs1, rs2) RM FPX FR(rd).f64 = f64_mul(F64(rs1), F64(rs2)) n FR(rd).d = FR(rs1).d * FR(rs2).d
+@FDIV64(rm, rd, rs1, rs2) RM FPX FR(rd).f64 = f64_div(F64(rs1), F64(rs2)) n FR(rd).d = FR(rs1).d / FR(rs2).d
+
+@FSQRT32(rm, rd, rs1) RM FPX FR(rd).f32 = f32_sqrt(F32(rs1)) n FR(rd).f = sqrtf(FR(rs1).f); box(rd)
+@FSQRT64(rm, rd, rs1) RM FPX FR(rd).f64 = f64_sqrt(F64(rs1)) n FR(rd).d = sqrt (FR(rs1).d)
+
+@FCVTWS( rm, rd, rs1) RM FPX IR(rd).l = (long)f32_to_i32( F32(rs1), RM, true) n IR(rd).l = (long)( int)FR(rs1).f
+@FCVTWUS(rm, rd, rs1) RM FPX IR(rd).l = (long)f32_to_ui32(F32(rs1), RM, true) n IR(rd).l = (long)(unsigned int)FR(rs1).f
+@FCVTLS( rm, rd, rs1) RM FPX IR(rd).l = f32_to_i64( F32(rs1), RM, true) n IR(rd).l = ( long)FR(rs1).f
+@FCVTLUS(rm, rd, rs1) RM FPX IR(rd).ul = f32_to_ui64(F32(rs1), RM, true) n IR(rd).ul = (unsigned long)FR(rs1).f
+
+@FCVTWD( rm, rd, rs1) RM FPX IR(rd).l = (long)f64_to_i64( F64(rs1), RM, true) n IR(rd).l = (long)( int)FR(rs1).d
+@FCVTWUD(rm, rd, rs1) RM FPX IR(rd).l = (long)f64_to_ui64(F64(rs1), RM, true) n IR(rd).l = (long)(unsigned int)FR(rs1).d
+@FCVTLD( rm, rd, rs1) RM FPX IR(rd).l = f64_to_i64( F64(rs1), RM, true) n IR(rd).l = ( long)FR(rs1).d
+@FCVTLUD(rm, rd, rs1) RM FPX IR(rd).ul = f64_to_ui64(F64(rs1), RM, true) n IR(rd).ul = (unsigned long)FR(rs1).d
+
+@FCVTSW( rm, rd, rs1) RM FPX FR(rd).f32 = i32_to_f32(IR(rs1).i ) n FR(rd).f = (float)IR(rs1).i; box(rd)
+@FCVTSWU(rm, rd, rs1) RM FPX FR(rd).f32 = ui32_to_f32(IR(rs1).ui) n FR(rd).f = (float)IR(rs1).ui; box(rd)
+@FCVTSL( rm, rd, rs1) RM FPX FR(rd).f32 = i64_to_f32(IR(rs1).l ) n FR(rd).f = (float)IR(rs1).l; box(rd)
+@FCVTSLU(rm, rd, rs1) RM FPX FR(rd).f32 = ui64_to_f32(IR(rs1).ul) n FR(rd).f = (float)IR(rs1).ul; box(rd)
+
+@FCVTDW( rm, rd, rs1) RM FPX FR(rd).f64 = i32_to_f64(IR(rs1).i ) n FR(rd).d = (double)IR(rs1).i
+@FCVTDWU(rm, rd, rs1) RM FPX FR(rd).f64 = ui32_to_f64(IR(rs1).ui) n FR(rd).d = (double)IR(rs1).ui
+@FCVTDL( rm, rd, rs1) RM FPX FR(rd).f64 = i64_to_f64(IR(rs1).l ) n FR(rd).d = (double)IR(rs1).l
+@FCVTDLU(rm, rd, rs1) RM FPX FR(rd).f64 = ui64_to_f64(IR(rs1).ul) n FR(rd).d = (double)IR(rs1).ul
+
+@FCVTSD(rm, rd, rs1) RM FPX FR(rd).f32 = f64_to_f32(F64(rs1)) n FR(rd).f = (float )FR(rs1).d; box(rd)
+@FCVTDS(rm, rd, rs1) RM FPX FR(rd).f64 = f32_to_f64(F32(rs1)) n FR(rd).d = (double)FR(rs1).f
+
+@FEQS(rd, rs1, rs2) - FPX IR(rd).l = f32_eq(F32(rs1), F32(rs2)) n IR(rd).l = (FR(rs1).f == FR(rs2).f) ? 1:0
+@FLTS(rd, rs1, rs2) - FPX IR(rd).l = f32_lt(F32(rs1), F32(rs2)) n IR(rd).l = (FR(rs1).f < FR(rs2).f) ? 1:0
+@FLES(rd, rs1, rs2) - FPX IR(rd).l = f32_le(F32(rs1), F32(rs2)) n IR(rd).l = (FR(rs1).f <= FR(rs2).f) ? 1:0
+
+@FEQD(rd, rs1, rs2) - FPX IR(rd).l = f64_eq(F64(rs1), F64(rs2)) n IR(rd).l = (FR(rs1).d == FR(rs2).d) ? 1:0
+@FLTD(rd, rs1, rs2) - FPX IR(rd).l = f64_lt(F64(rs1), F64(rs2)) n IR(rd).l = (FR(rs1).d < FR(rs2).d) ? 1:0
+@FLED(rd, rs1, rs2) - FPX IR(rd).l = f64_le(F64(rs1), F64(rs2)) n IR(rd).l = (FR(rs1).d <= FR(rs2).d) ? 1:0
+
+@FMINS(rd, rs1, rs2) - FPX FR(rd).f32 = f32_min(F32(rs1), F32(rs2)) n FR(rd).f = (FR(rs1).f < FR(rs2).f) ? FR(rs1).f : FR(rs2).f; box(rd)
+@FMAXS(rd, rs1, rs2) - FPX FR(rd).f32 = f32_max(F32(rs1), F32(rs2)) n FR(rd).f = (FR(rs1).f > FR(rs2).f) ? FR(rs1).f : FR(rs2).f; box(rd)
+
+@FMIND(rd, rs1, rs2) - FPX FR(rd).f64 = f64_min(F64(rs1), F64(rs2)) n FR(rd).d = (FR(rs1).d < FR(rs2).d) ? FR(rs1).d : FR(rs2).d
+@FMAXD(rd, rs1, rs2) - FPX FR(rd).f64 = f64_max(F64(rs1), F64(rs2)) n FR(rd).d = (FR(rs1).d > FR(rs2).d) ? FR(rs1).d : FR(rs2).d
diff --git a/caveat/Instructions.def b/caveat/Instructions.def
new file mode 100644
index 0000000..6f83246
--- /dev/null
+++ b/caveat/Instructions.def
@@ -0,0 +1,319 @@
+#
+# INTEGER/CONTROL UNIT FP/DATA UNIT
+# f = fused multiply-add
+# integer multiplier = n m = floating point multiplier
+# integer divider = e d = floating point divider
+# a = floating point adder
+# integer ALU = i j = integer ALU
+# shifter = s t = shifter
+# branch unit = b
+# load unit = r
+# store unit = w
+# special unit = x
+#
+# C = Compressed Instruction Set
+# F = Single Precision Floating Point
+# D = Double Precision Floating Point
+# A = Atomic Memory Operation
+#
+# Upper 16 Bits Lower 16 Bits Opcode Asm Parameters Flag,Operands Execution Statement
+#------------------------|----------------------------------| ------------ -------------------- -------------------- --------------------------------------
+
+# 16-Bit Instructions
+@ 000 {5:4|9:6|2|3} crd[3] 00 C.ADDI4SPN rd,rs1,immed iC,crd+8,SP IR(rd).l = IR(rs1).l + immed
+@ 001 {5:3} cs1[3] {7:6} cfd[3] 00 C.FLD fd,immed(rs1) rCD,cfd+8,cs1+8 FR(rd).d = LOAD_D(IR(rs1).l+immed, 2)
+@ 010 {5:3} cs1[3] {2|6} crd[3] 00 C.LW rd,immed(rs1) rC,crd+8,cs1+8 IR(rd).l = LOAD_W(IR(rs1).l+immed, 2)
+@ 011 {5:3} cs1[3] {7:6} crd[3] 00 C.LD rd,immed(rs1) rC,crd+8,cs1+8 IR(rd).l = LOAD_L(IR(rs1).l+immed, 2)
+@ 101 {5:3} cs1[3] {7:6} ds2[3] 00 C.FSD fs2,immed(rs1) wCD,-,cs1+8,ds2+8 STORE_D(IR(rs1).l+immed, 2, FR(rs2).d)
+@ 110 {5:3} cs1[3] {2|6} cs2[3] 00 C.SW rs2,immed(rs1) wC,-,cs1+8,cs2+8 STORE_W(IR(rs1).l+immed, 2, IR(rs2).i)
+@ 111 {5:3} cs1[3] {7:6} cs2[3] 00 C.SD rs2,immed(rs1) wC,-,cs1+8,cs2+8 STORE_L(IR(rs1).l+immed, 2, IR(rs2).l)
+
+@ 000 {-5} 00000 {4:0} 01 C.NOP - iC,- { }
+@ 000 {-5} rd[5] {4:0} 01 C.ADDI rd,immed iC,rd IR(rd).l = IR(rd).l + immed
+@ 001 {-5} rd[5] {4:0} 01 C.ADDIW rd,immed iC,rd IR(rd).l = (long)(IR(rd).i + immed)
+@ 010 {-5} rd[5] {4:0} 01 C.LI rd,immed iC,rd IR(rd).l = immed
+@ 011 {-9} 00010 {4|6|8:7|5} 01 C.ADDI16SP rd,immed iC,rd,SP IR(rd).l = IR(rd).l + immed
+@ 011 {-17} rd[5] {16:12} 01 C.LUI rd,constant iC,rd IR(rd).l = constant
+
+@ 100 {5} 00 cs1[3] {4:0} 01 C.SRLI rd,immed sC,cs1+8 IR(rd).ul = IR(rd).ul >> immed
+@ 100 {5} 01 cs1[3] {4:0} 01 C.SRAI rd,immed sC,cs1+8 IR(rd).l = IR(rd).l >> immed
+@ 100 {-5} 10 cs1[3] {4:0} 01 C.ANDI rd,immed iC,cs1+8 IR(rd).l = IR(rd).l & immed
+
+@ 100 0 11 cs1[3] 00 cs2[3] 01 C.SUB rd,rs2 iC,cs1+8,-,cs2+8 IR(rd).l = IR(rd).l - IR(rs2).l
+@ 100 0 11 cs1[3] 01 cs2[3] 01 C.XOR rd,rs2 iC,cs1+8,-,cs2+8 IR(rd).ul = IR(rd).ul ^ IR(rs2).ul
+@ 100 0 11 cs1[3] 10 cs2[3] 01 C.OR rd,rs2 iC,cs1+8,-,cs2+8 IR(rd).ul = IR(rd).ul | IR(rs2).ul
+@ 100 0 11 cs1[3] 11 cs2[3] 01 C.AND rd,rs2 iC,cs1+8,-,cs2+8 IR(rd).ul = IR(rd).ul & IR(rs2).ul
+@ 100 1 11 cs1[3] 00 cs2[3] 01 C.SUBW rd,rs2 iC,cs1+8,-,cs2+8 IR(rd).l = (long)(IR(rd).i - IR(rs2).i)
+@ 100 1 11 cs1[3] 01 cs2[3] 01 C.ADDW rd,rs2 iC,cs1+8,-,cs2+8 IR(rd).l = (long)(IR(rd).i + IR(rs2).i)
+
+@ 101 {-11|4|9:8|10|6|7|3:1|5} 01 C.J immed bC,- GOTO(PC+immed, 2)
+@ 110 {-8|4:3} cs1[3] {7:6|2:1|5} 01 C.BEQZ rs1,immed bC,-,cs1+8 if (IR(rs1).l == 0) GOTO(PC+immed, 2)
+@ 111 {-8|4:3} cs1[3] {7:6|2:1|5} 01 C.BNEZ rs1,immed bC,-,cs1+8 if (IR(rs1).l != 0) GOTO(PC+immed, 2)
+
+@ 000 {5} rd[5] {4:0} 10 C.SLLI rd,immed sC,rd IR(rd).ul = IR(rd).ul << immed
+@ 001 {5} fd[5] {4:3|8:6} 10 C.FLDSP fd,immed(sp) rDC,fd,SP FR(rd).d = LOAD_D(IR(rs1).l+immed, 2)
+@ 010 {5} rd[5] {4:2|7:6} 10 C.LWSP rd,immed(sp) rC,rd,SP IR(rd).l = LOAD_W(IR(rs1).l+immed, 2)
+@ 011 {5} rd[5] {4:3|8:6} 10 C.LDSP rd,immed(sp) rC,rd,SP IR(rd).l = LOAD_L(IR(rs1).l+immed, 2)
+
+@ 100 0 00001 00000 10 C.RET rd bC,RA RETURN(IR( rd).l, 2)
+@ 100 0 rd[5] 00000 10 C.JR rd bC,rd GOTO( IR( rd).l, 2)
+@ 100 1 00000 00000 10 C.EBREAK - bC,RA EBRK(0L, 2)
+@ 100 1 rd[5] 00000 10 C.JALR rd,rs1 bC,RA,rd CALL( IR(rs1).l, 2)
+
+@ 100 0 rd[5] crs2[5] 10 C.MV rd,rs2 iC,rd,-,crs2 IR(rd).l = IR(rs2).l
+@ 100 1 rd[5] crs2[5] 10 C.ADD rd,rs2 iC,rd,-,crs2 IR(rd).l = IR(rd).l + IR(rs2).l
+@ 101 {5:3|8:6} cfs2[5] 10 C.FSDSP fs2,immed(sp) wCD,-,SP,cfs2 STORE_D(IR(rs1).l+immed, 2, FR(rs2).d)
+@ 110 {5:2|7:6} crs2[5] 10 C.SWSP rs2,immed(sp) wC,-,SP,crs2 STORE_W(IR(rs1).l+immed, 2, IR(rs2).i)
+@ 111 {5:3|8:6} crs2[5] 10 C.SDSP rs2,immed(sp) wC,-,SP,crs2 STORE_L(IR(rs1).l+immed, 2, IR(rs2).l)
+
+
+# 32-Bit Instructions
+
+@ {-11:0} rs1[5] 000 rd[5] 00000 11 LB rd,immed(rs1) r,rd,rs1 IR(rd).l = (long)LOAD_B( IR(rs1).l+immed, 4)
+@ {-11:0} rs1[5] 001 rd[5] 00000 11 LH rd,immed(rs1) r,rd,rs1 IR(rd).l = (long)LOAD_H( IR(rs1).l+immed, 4)
+@ {-11:0} rs1[5] 010 rd[5] 00000 11 LW rd,immed(rs1) r,rd,rs1 IR(rd).l = LOAD_W( IR(rs1).l+immed, 4)
+@ {-11:0} rs1[5] 011 rd[5] 00000 11 LD rd,immed(rs1) r,rd,rs1 IR(rd).l = LOAD_L( IR(rs1).l+immed, 4)
+@ {-11:0} rs1[5] 100 rd[5] 00000 11 LBU rd,immed(rs1) r,rd,rs1 IR(rd).ul = (unsigned long)LOAD_UB(IR(rs1).l+immed, 4)
+@ {-11:0} rs1[5] 101 rd[5] 00000 11 LHU rd,immed(rs1) r,rd,rs1 IR(rd).ul = (unsigned long)LOAD_UH(IR(rs1).l+immed, 4)
+@ {-11:0} rs1[5] 110 rd[5] 00000 11 LWU rd,immed(rs1) r,rd,rs1 IR(rd).ul = LOAD_UW(IR(rs1).l+immed, 4)
+@ {-11:0} rs1[5] 010 fd[5] 00001 11 FLW fd,immed(rs1) rF,fd,rs1 FR(rd).f = LOAD_F( IR(rs1).l+immed, 4); box(rd)
+@ {-11:0} rs1[5] 011 fd[5] 00001 11 FLD fd,immed(rs1) rD,fd,rs1 FR(rd).d = LOAD_D( IR(rs1).l+immed, 4)
+
+@ {-11:5} rs2[5] rs1[5] 000 {4:0} 01000 11 SB rs2,immed(rs1) w,-,rs1,rs2 STORE_B(IR(rs1).l+immed, 4, IR(rs2).l)
+@ {-11:5} rs2[5] rs1[5] 001 {4:0} 01000 11 SH rs2,immed(rs1) w,-,rs1,rs2 STORE_H(IR(rs1).l+immed, 4, IR(rs2).l)
+@ {-11:5} rs2[5] rs1[5] 010 {4:0} 01000 11 SW rs2,immed(rs1) w,-,rs1,rs2 STORE_W(IR(rs1).l+immed, 4, IR(rs2).l)
+@ {-11:5} rs2[5] rs1[5] 011 {4:0} 01000 11 SD rs2,immed(rs1) w,-,rs1,rs2 STORE_L(IR(rs1).l+immed, 4, IR(rs2).l)
+@ {-11:5} fs2[5] rs1[5] 010 {4:0} 01001 11 FSW fs2,immed(rs1) wF,-,rs1,fs2 STORE_F(IR(rs1).l+immed, 4, FR(rs2).f)
+@ {-11:5} fs2[5] rs1[5] 011 {4:0} 01001 11 FSD fs2,immed(rs1) wD,-,rs1,fs2 STORE_D(IR(rs1).l+immed, 4, FR(rs2).d)
+
+@ {-12|10:5} rs2[5] rs1[5] 000 {4:1|11} 11000 11 BEQ rs1,rs2,immed b,-,rs1,rs2 if (IR(rs1).l == IR(rs2).l ) GOTO(PC+immed, 4)
+@ {-12|10:5} rs2[5] rs1[5] 001 {4:1|11} 11000 11 BNE rs1,rs2,immed b,-,rs1,rs2 if (IR(rs1).l != IR(rs2).l ) GOTO(PC+immed, 4)
+@ {-12|10:5} rs2[5] rs1[5] 100 {4:1|11} 11000 11 BLT rs1,rs2,immed b,-,rs1,rs2 if (IR(rs1).l < IR(rs2).l ) GOTO(PC+immed, 4)
+@ {-12|10:5} rs2[5] rs1[5] 101 {4:1|11} 11000 11 BGE rs1,rs2,immed b,-,rs1,rs2 if (IR(rs1).l >= IR(rs2).l ) GOTO(PC+immed, 4)
+@ {-12|10:5} rs2[5] rs1[5] 110 {4:1|11} 11000 11 BLTU rs1,rs2,immed b,-,rs1,rs2 if (IR(rs1).ul < IR(rs2).ul) GOTO(PC+immed, 4)
+@ {-12|10:5} rs2[5] rs1[5] 111 {4:1|11} 11000 11 BGEU rs1,rs2,immed b,-,rs1,rs2 if (IR(rs1).ul >= IR(rs2).ul) GOTO(PC+immed, 4)
+
+@ 000000000000 00001 000 00000 11001 11 RET rs1 b,-,RA RETURN(IR(rs1).l + immed & ~0x1L, 4)
+@ {-11:0} rs1[5] 000 00000 11001 11 JR rs1,immed b,-,rs1 GOTO(( IR(rs1).l + immed) & ~0x1L, 4)
+@ {-11:0} rs1[5] 000 rd[5] 11001 11 JALR rd,rs1,immed b,rd,rs1 CALL(( IR(rs1).l + immed) & ~0x1L, 4)
+@ {-20|10:1|11|19:12} 00000 11011 11 J constant b,- GOTO( PC + constant, 4)
+@ {-20|10:1|11|19:12} rd[5] 11011 11 JAL rd,constant b,rd CALL( PC + constant, 4)
+
+@ {-11:0} 00000 000 rd[5] 00100 11 LI rd,immed i,rd IR(rd).l = immed
+@ {-31:12} rd[5] 01101 11 LUI rd,constant i,rd IR(rd).l = constant
+@ {-31:12} rd[5] 00101 11 AUIPC rd,constant i,rd IR(rd).l = constant + PC
+
+@ {-11:0} rs1[5] 000 rd[5] 00100 11 ADDI rd,rs1,immed i,rd,rs1 IR(rd).l = IR(rs1).l + immed
+@ 000000 {5:0} rs1[5] 001 rd[5] 00100 11 SLLI rd,rs1,immed s,rd,rs1 IR(rd).ul = IR(rs1).ul << immed
+@ {-11:0} rs1[5] 010 rd[5] 00100 11 SLTI rd,rs1,immed i,rd,rs1 IR(rd).l = (IR(rs1).l < immed) ? 1:0
+@ {-11:0} rs1[5] 011 rd[5] 00100 11 SLTIU rd,rs1,immed i,rd,rs1 IR(rd).ul = (IR(rs1).ul < (unsigned long)immed) ? 1:0
+@ {-11:0} rs1[5] 100 rd[5] 00100 11 XORI rd,rs1,immed i,rd,rs1 IR(rd).l = IR(rs1).l ^ immed
+@ 000000 {5:0} rs1[5] 101 rd[5] 00100 11 SRLI rd,rs1,immed s,rd,rs1 IR(rd).ul = IR(rs1).ul >> immed
+@ 010000 {5:0} rs1[5] 101 rd[5] 00100 11 SRAI rd,rs1,immed s,rd,rs1 IR(rd).l = IR(rs1).l >> immed
+@ {-11:0} rs1[5] 110 rd[5] 00100 11 ORI rd,rs1,immed i,rd,rs1 IR(rd).l = IR(rs1).l | immed
+@ {-11:0} rs1[5] 111 rd[5] 00100 11 ANDI rd,rs1,immed i,rd,rs1 IR(rd).l = IR(rs1).l & immed
+
+@ {-11:0} rs1[5] 000 rd[5] 00110 11 ADDIW rd,rs1,immed i,rd,rs1 IR(rd).l = (long)(IR(rs1).i + immed)
+@ 0000000 {4:0} rs1[5] 001 rd[5] 00110 11 SLLIW rd,rs1,immed s,rd,rs1 IR(rd).l = (long)(IR(rs1).ui << immed)
+@ 0000000 {4:0} rs1[5] 101 rd[5] 00110 11 SRLIW rd,rs1,immed s,rd,rs1 IR(rd).l = (long)(IR(rs1).ui >> immed)
+@ 0100000 {4:0} rs1[5] 101 rd[5] 00110 11 SRAIW rd,rs1,immed s,rd,rs1 IR(rd).l = (long)(IR(rs1).i >> immed)
+
+@ 0000000 rs2[5] rs1[5] 000 rd[5] 01100 11 ADD rd,rs1,rs2 i,rd,rs1,rs2 IR(rd).l = IR(rs1).l + IR(rs2).l
+@ 0100000 rs2[5] rs1[5] 000 rd[5] 01100 11 SUB rd,rs1,rs2 i,rd,rs1,rs2 IR(rd).l = IR(rs1).l - IR(rs2).l
+@ 0000000 rs2[5] rs1[5] 001 rd[5] 01100 11 SLL rd,rs1,rs2 s,rd,rs1,rs2 IR(rd).ul = IR(rs1).ul << IR(rs2).ul
+@ 0000000 rs2[5] rs1[5] 010 rd[5] 01100 11 SLT rd,rs1,rs2 i,rd,rs1,rs2 IR(rd).l = (IR(rs1).l < IR(rs2).l ) ? 1:0;
+@ 0000000 rs2[5] rs1[5] 011 rd[5] 01100 11 SLTU rd,rs1,rs2 i,rd,rs1,rs2 IR(rd).l = (IR(rs1).ul < IR(rs2).ul) ? 1:0;
+@ 0000000 rs2[5] rs1[5] 100 rd[5] 01100 11 XOR rd,rs1,rs2 i,rd,rs1,rs2 IR(rd).ul = IR(rs1).ul ^ IR(rs2).ul
+@ 0000000 rs2[5] rs1[5] 101 rd[5] 01100 11 SRL rd,rs1,rs2 s,rd,rs1,rs2 IR(rd).ul = IR(rs1).ul >> IR(rs2).ul
+@ 0100000 rs2[5] rs1[5] 101 rd[5] 01100 11 SRA rd,rs1,rs2 s,rd,rs1,rs2 IR(rd).l = IR(rs1).l >> IR(rs2).l
+@ 0000000 rs2[5] rs1[5] 110 rd[5] 01100 11 OR rd,rs1,rs2 i,rd,rs1,rs2 IR(rd).ul = IR(rs1).ul | IR(rs2).ul
+@ 0000000 rs2[5] rs1[5] 111 rd[5] 01100 11 AND rd,rs1,rs2 i,rd,rs1,rs2 IR(rd).ul = IR(rs1).ul & IR(rs2).ul
+
+@ 0000000 rs2[5] rs1[5] 000 rd[5] 01110 11 ADDW rd,rs1,rs2 i,rd,rs1,rs2 IR(rd).l = (long)(IR(rs1).i + IR(rs2).i)
+@ 0100000 rs2[5] rs1[5] 000 rd[5] 01110 11 SUBW rd,rs1,rs2 i,rd,rs1,rs2 IR(rd).l = (long)(IR(rs1).i - IR(rs2).i)
+@ 0000000 rs2[5] rs1[5] 001 rd[5] 01110 11 SLLW rd,rs1,rs2 s,rd,rs1,rs2 IR(rd).l = (long)(IR(rs1).ui << IR(rs2).ui)
+@ 0000000 rs2[5] rs1[5] 101 rd[5] 01110 11 SRLW rd,rs1,rs2 s,rd,rs1,rs2 IR(rd).l = (long)(IR(rs1).ui >> IR(rs2).ui)
+@ 0100000 rs2[5] rs1[5] 101 rd[5] 01110 11 SRAW rd,rs1,rs2 s,rd,rs1,rs2 IR(rd).l = (long)(IR(rs1).i >> IR(rs2).i)
+
+@ 0000001 rs2[5] rs1[5] 000 rd[5] 01100 11 MUL rd,rs1,rs2 n,rd,rs1,rs2 IR(rd).l = IR(rs1).l * IR(rs2).l
+@ 0000001 rs2[5] rs1[5] 001 rd[5] 01100 11 MULH rd,rs1,rs2 n,rd,rs1,rs2 IR(rd).l = mulh (IR(rs1).l, IR(rs2).l )
+@ 0000001 rs2[5] rs1[5] 010 rd[5] 01100 11 MULHSU rd,rs1,rs2 n,rd,rs1,rs2 IR(rd).l = mulhsu(IR(rs1).l, IR(rs2).ul)
+@ 0000001 rs2[5] rs1[5] 011 rd[5] 01100 11 MULHU rd,rs1,rs2 n,rd,rs1,rs2 IR(rd).ul = mulhu (IR(rs1).ul, IR(rs2).ul)
+@ 0000001 rs2[5] rs1[5] 100 rd[5] 01100 11 DIV rd,rs1,rs2 t,rd,rs1,rs2 IR(rd).l = IR(rs1).l / IR(rs2).l
+@ 0000001 rs2[5] rs1[5] 101 rd[5] 01100 11 DIVU rd,rs1,rs2 t,rd,rs1,rs2 IR(rd).ul = IR(rs1).ul / IR(rs2).ul
+@ 0000001 rs2[5] rs1[5] 110 rd[5] 01100 11 REM rd,rs1,rs2 t,rd,rs1,rs2 IR(rd).l = IR(rs1).l % IR(rs2).l
+@ 0000001 rs2[5] rs1[5] 111 rd[5] 01100 11 REMU rd,rs1,rs2 t,rd,rs1,rs2 IR(rd).ul = IR(rs1).ul % IR(rs2).ul
+
+@ 0000001 rs2[5] rs1[5] 000 rd[5] 01110 11 MULW rd,rs1,rs2 n,rd,rs1,rs2 IR(rd).l = (long)(IR(rs1).i * IR(rs2).i)
+@ 0000001 rs2[5] rs1[5] 100 rd[5] 01110 11 DIVW rd,rs1,rs2 t,rd,rs1,rs2 IR(rd).l = (long)(IR(rs1).i / IR(rs2).i)
+@ 0000001 rs2[5] rs1[5] 101 rd[5] 01110 11 DIVUW rd,rs1,rs2 t,rd,rs1,rs2 IR(rd).l = (long)(IR(rs1).ui / IR(rs2).ui)
+@ 0000001 rs2[5] rs1[5] 110 rd[5] 01110 11 REMW rd,rs1,rs2 t,rd,rs1,rs2 IR(rd).l = (long)(IR(rs1).i % IR(rs2).i)
+@ 0000001 rs2[5] rs1[5] 111 rd[5] 01110 11 REMUW rd,rs1,rs2 t,rd,rs1,rs2 IR(rd).l = (long)(IR(rs1).ui % IR(rs2).ui)
+
+
+# Floating point
+
+
+@ fs3[5] 00 fs2[5] fs1[5] 111 fd[5] 10000 11 FMADD_dyn.S fd,fs1,fs2,fs3 fF,fd,fs1,fs2,fs3 FMADD32_dyn(rd, rs1, rs2, rs3)
+@ fs3[5] 00 fs2[5] fs1[5] 111 fd[5] 10001 11 FMSUB_dyn.S fd,fs1,fs2,fs3 fF,fd,fs1,fs2,fs3 FMSUB32_dyn(rd, rs1, rs2, rs3)
+@ fs3[5] 00 fs2[5] fs1[5] 111 fd[5] 10010 11 FNMSUB_dyn.S fd,fs1,fs2,fs3 fF,fd,fs1,fs2,fs3 FNMSUB32_dyn(rd, rs1, rs2, rs3)
+@ fs3[5] 00 fs2[5] fs1[5] 111 fd[5] 10011 11 FNMADD_dyn.S fd,fs1,fs2,rs3 fF,fd,fs1,fs2,fs3 FNMADD32_dyn(rd, rs1, rs2, rs3)
+@ 0000000 fs2[5] fs1[5] 111 fd[5] 10100 11 FADD_dyn.S fd,fs1,fs2 aF,fd,fs1,fs2 FADD32_dyn(rd, rs1, rs2)
+@ 0000100 fs2[5] fs1[5] 111 fd[5] 10100 11 FSUB_dyn.S fd,fs1,fs2 aF,fd,fs1,fs2 FSUB32_dyn(rd, rs1, rs2)
+@ 0001000 fs2[5] fs1[5] 111 fd[5] 10100 11 FMUL_dyn.S fd,fs1,fs2 mF,fd,fs1,fs2 FMUL32_dyn(rd, rs1, rs2)
+@ 0001100 fs2[5] fs1[5] 111 fd[5] 10100 11 FDIV_dyn.S fd,fs1,fs2 dF,fd,fs1,fs2 FDIV32_dyn(rd, rs1, rs2)
+@ 0101100 00000 fs1[5] 111 fd[5] 10100 11 FSQRT_dyn.S fd,fs1 dF,fd,fs1 FSQRT32_dyn(rd, rs1)
+
+@ 1100000 00000 fs1[5] 111 rd[5] 10100 11 FCVT_dyn.W.S rd,fs1 aF,rd,fs1 FCVTWS_dyn(rd, rs1)
+@ 1100000 00001 fs1[5] 111 rd[5] 10100 11 FCVT_dyn.WU.S rd,fs1 aF,rd,fs1 FCVTWUS_dyn(rd, rs1)
+@ 1100000 00010 fs1[5] 111 rd[5] 10100 11 FCVT_dyn.L.S rd,fs1 aF,rd,fs1 FCVTLS_dyn(rd, rs1)
+@ 1100000 00011 fs1[5] 111 rd[5] 10100 11 FCVT_dyn.LU.S rd,fs1 aF,rd,fs1 FCVTLUS_dyn(rd, rs1)
+@ 1101000 00000 rs1[5] 111 fd[5] 10100 11 FCVT_dyn.S.W fd,rs1 aF,fd,rs1 FCVTSW_dyn(rd, rs1)
+@ 1101000 00001 rs1[5] 111 fd[5] 10100 11 FCVT_dyn.S.WU fd,rs1 aF,fd,rs1 FCVTSWU_dyn(rd, rs1)
+@ 1101000 00010 rs1[5] 111 fd[5] 10100 11 FCVT_dyn.S.L fd,rs1 aF,fd,rs1 FCVTSL_dyn(rd, rs1)
+@ 1101000 00011 rs1[5] 111 fd[5] 10100 11 FCVT_dyn.S.LU fd,rs1 aF,fd,rs1 FCVTSLU_dyn(rd, rs1)
+
+@ fs3[5] 01 fs2[5] fs1[5] 111 fd[5] 10000 11 FMADD_dyn.D fd,fs1,fs2,fs3 fD,fd,fs1,fs2,fs3 FMADD64_dyn(rd, rs1, rs2, rs3)
+@ fs3[5] 01 fs2[5] fs1[5] 111 fd[5] 10001 11 FMSUB_dyn.D fd,fs1,fs2,fs3 fD,fd,fs1,fs2,fs3 FMSUB64_dyn(rd, rs1, rs2, rs3)
+@ fs3[5] 01 fs2[5] fs1[5] 111 fd[5] 10010 11 FNMSUB_dyn.D fd,fs1,fs2,fs3 fD,fd,fs1,fs2,fs3 FNMSUB64_dyn(rd, rs1, rs2, rs3)
+@ fs3[5] 01 fs2[5] fs1[5] 111 fd[5] 10011 11 FNMADD_dyn.D fd,fs1,fs2,fs3 fD,fd,fs1,fs2,fs3 FNMADD64_dyn(rd, rs1, rs2, rs3)
+@ 0000001 fs2[5] fs1[5] 111 fd[5] 10100 11 FADD_dyn.D fd,fs1,fs2 aD,fd,fs1,fs2 FADD64_dyn(rd, rs1, rs2)
+@ 0000101 fs2[5] fs1[5] 111 fd[5] 10100 11 FSUB_dyn.D fd,fs1,fs2 aD,fd,fs1,fs2 FSUB64_dyn(rd, rs1, rs2)
+@ 0001001 fs2[5] fs1[5] 111 fd[5] 10100 11 FMUL_dyn.D fd,fs1,fs2 mD,fd,fs1,fs2 FMUL64_dyn(rd, rs1, rs2)
+@ 0001101 fs2[5] fs1[5] 111 fd[5] 10100 11 FDIV_dyn.D fd,fs1,fs2 dD,fd,fs1,fs2 FDIV64_dyn(rd, rs1, rs2)
+@ 0101101 00000 fs1[5] 111 fd[5] 10100 11 FSQRT_dyn.D fd,fs1 dD,fd,fs1 FSQRT64_dyn(rd, rs1)
+
+@ 1100001 00000 fs1[5] 111 rd[5] 10100 11 FCVT_dyn.W.D rd,fs1 aD,rd,fs1 FCVTWD_dyn(rd, rs1)
+@ 1100001 00001 fs1[5] 111 rd[5] 10100 11 FCVT_dyn.WU.D rd,fs1 aD,rd,fs1 FCVTWUD_dyn(rd, rs1)
+@ 1100001 00010 fs1[5] 111 rd[5] 10100 11 FCVT_dyn.L.D rd,fs1 aD,rd,fs1 FCVTLD_dyn(rd, rs1)
+@ 1100001 00011 fs1[5] 111 rd[5] 10100 11 FCVT_dyn.LU.D rd,fs1 aD,rd,fs1 FCVTLUD_dyn(rd, rs1)
+@ 1101001 00000 rs1[5] 111 fd[5] 10100 11 FCVT_dyn.D.W fd,rs1 aD,fd,rs1 FCVTDW_dyn(rd, rs1)
+@ 1101001 00001 rs1[5] 111 fd[5] 10100 11 FCVT_dyn.D.WU fd,rs1 aD,fd,rs1 FCVTDWU_dyn(rd, rs1)
+@ 1101001 00010 rs1[5] 111 fd[5] 10100 11 FCVT_dyn.D.L fd,rs1 aD,fd,rs1 FCVTDL_dyn(rd, rs1)
+@ 1101001 00011 rs1[5] 111 fd[5] 10100 11 FCVT_dyn.D.LU fd,rs1 aD,fd,rs1 FCVTDLU_dyn(rd, rs1)
+
+@ 0100000 00001 fs1[5] 111 rd[5] 10100 11 FCVT_dyn.S.D fd,fs1 aD,rd,fs1 FCVTSD_dyn(rd, rs1)
+@ 0100001 00000 fs1[5] 111 rd[5] 10100 11 FCVT_dyn.D.S fd,fs1 aD,rd,fs1 FCVTDS_dyn(rd, rs1)
+
+
+
+
+
+
+
+
+@ fs3[5] 00 fs2[5] fs1[5] {2:0} fd[5] 10000 11 FMADD_rm.S fd,fs1,fs2,fs3 fF,fd,fs1,fs2,fs3 FMADD32(immed, rd, rs1, rs2, rs3)
+@ fs3[5] 00 fs2[5] fs1[5] {2:0} fd[5] 10001 11 FMSUB_rm.S fd,fs1,fs2,fs3 fF,fd,fs1,fs2,fs3 FMSUB32(immed, rd, rs1, rs2, rs3)
+@ fs3[5] 00 fs2[5] fs1[5] {2:0} fd[5] 10010 11 FNMSUB_rm.S fd,fs1,fs2,fs3 fF,fd,fs1,fs2,fs3 FNMSUB32(immed, rd, rs1, rs2, rs3)
+@ fs3[5] 00 fs2[5] fs1[5] {2:0} fd[5] 10011 11 FNMADD_rm.S fd,fs1,fs2,rs3 fF,fd,fs1,fs2,fs3 FNMADD32(immed, rd, rs1, rs2, rs3)
+@ 0000000 fs2[5] fs1[5] {2:0} fd[5] 10100 11 FADD_rm.S fd,fs1,fs2 aF,fd,fs1,fs2 FADD32(immed, rd, rs1, rs2)
+@ 0000100 fs2[5] fs1[5] {2:0} fd[5] 10100 11 FSUB_rm.S fd,fs1,fs2 aF,fd,fs1,fs2 FSUB32(immed, rd, rs1, rs2)
+@ 0001000 fs2[5] fs1[5] {2:0} fd[5] 10100 11 FMUL_rm.S fd,fs1,fs2 mF,fd,fs1,fs2 FMUL32(immed, rd, rs1, rs2)
+@ 0001100 fs2[5] fs1[5] {2:0} fd[5] 10100 11 FDIV_rm.S fd,fs1,fs2 dF,fd,fs1,fs2 FDIV32(immed, rd, rs1, rs2)
+@ 0101100 00000 fs1[5] {2:0} fd[5] 10100 11 FSQRT_rm.S fd,fs1 dF,fd,fs1 FSQRT32(immed, rd, rs1)
+
+@ 1100000 00000 fs1[5] {2:0} rd[5] 10100 11 FCVT_rm.W.S rd,fs1 aF,rd,fs1 FCVTWS(immed, rd, rs1)
+@ 1100000 00001 fs1[5] {2:0} rd[5] 10100 11 FCVT_rm.WU.S rd,fs1 aF,rd,fs1 FCVTWUS(immed, rd, rs1)
+@ 1100000 00010 fs1[5] {2:0} rd[5] 10100 11 FCVT_rm.L.S rd,fs1 aF,rd,fs1 FCVTLS(immed, rd, rs1)
+@ 1100000 00011 fs1[5] {2:0} rd[5] 10100 11 FCVT_rm.LU.S rd,fs1 aF,rd,fs1 FCVTLUS(immed, rd, rs1)
+@ 1101000 00000 rs1[5] {2:0} fd[5] 10100 11 FCVT_rm.S.W fd,rs1 aF,fd,rs1 FCVTSW(immed, rd, rs1)
+@ 1101000 00001 rs1[5] {2:0} fd[5] 10100 11 FCVT_rm.S.WU fd,rs1 aF,fd,rs1 FCVTSWU(immed, rd, rs1)
+@ 1101000 00010 rs1[5] {2:0} fd[5] 10100 11 FCVT_rm.S.L fd,rs1 aF,fd,rs1 FCVTSL(immed, rd, rs1)
+@ 1101000 00011 rs1[5] {2:0} fd[5] 10100 11 FCVT_rm.S.LU fd,rs1 aF,fd,rs1 FCVTSLU(immed, rd, rs1)
+
+@ fs3[5] 01 fs2[5] fs1[5] {2:0} fd[5] 10000 11 FMADD_rm.D fd,fs1,fs2,fs3 fD,fd,fs1,fs2,fs3 FMADD64(immed, rd, rs1, rs2, rs3)
+@ fs3[5] 01 fs2[5] fs1[5] {2:0} fd[5] 10001 11 FMSUB_rm.D fd,fs1,fs2,fs3 fD,fd,fs1,fs2,fs3 FMSUB64(immed, rd, rs1, rs2, rs3)
+@ fs3[5] 01 fs2[5] fs1[5] {2:0} fd[5] 10010 11 FNMSUB_rm.D fd,fs1,fs2,fs3 fD,fd,fs1,fs2,fs3 FNMSUB64(immed, rd, rs1, rs2, rs3)
+@ fs3[5] 01 fs2[5] fs1[5] {2:0} fd[5] 10011 11 FNMADD_rm.D fd,fs1,fs2,fs3 fD,fd,fs1,fs2,fs3 FNMADD64(immed, rd, rs1, rs2, rs3)
+@ 0000001 fs2[5] fs1[5] {2:0} fd[5] 10100 11 FADD_rm.D fd,fs1,fs2 aD,fd,fs1,fs2 FADD64(immed, rd, rs1, rs2)
+@ 0000101 fs2[5] fs1[5] {2:0} fd[5] 10100 11 FSUB_rm.D fd,fs1,fs2 aD,fd,fs1,fs2 FSUB64(immed, rd, rs1, rs2)
+@ 0001001 fs2[5] fs1[5] {2:0} fd[5] 10100 11 FMUL_rm.D fd,fs1,fs2 mD,fd,fs1,fs2 FMUL64(immed, rd, rs1, rs2)
+@ 0001101 fs2[5] fs1[5] {2:0} fd[5] 10100 11 FDIV_rm.D fd,fs1,fs2 dD,fd,fs1,fs2 FDIV64(immed, rd, rs1, rs2)
+@ 0101101 00000 fs1[5] {2:0} fd[5] 10100 11 FSQRT_rm.D fd,fs1 dD,fd,fs1 FSQRT64(immed, rd, rs1)
+
+@ 1100001 00000 fs1[5] {2:0} rd[5] 10100 11 FCVT_rm.W.D rd,fs1 aD,rd,fs1 FCVTWD(immed, rd, rs1)
+@ 1100001 00001 fs1[5] {2:0} rd[5] 10100 11 FCVT_rm.WU.D rd,fs1 aD,rd,fs1 FCVTWUD(immed, rd, rs1)
+@ 1100001 00010 fs1[5] {2:0} rd[5] 10100 11 FCVT_rm.L.D rd,fs1 aD,rd,fs1 FCVTLD(immed, rd, rs1)
+@ 1100001 00011 fs1[5] {2:0} rd[5] 10100 11 FCVT_rm.LU.D rd,fs1 aD,rd,fs1 FCVTLUD(immed, rd, rs1)
+@ 1101001 00000 rs1[5] {2:0} fd[5] 10100 11 FCVT_rm.D.W fd,rs1 aD,fd,rs1 FCVTDW(immed, rd, rs1)
+@ 1101001 00001 rs1[5] {2:0} fd[5] 10100 11 FCVT_rm.D.WU fd,rs1 aD,fd,rs1 FCVTDWU(immed, rd, rs1)
+@ 1101001 00010 rs1[5] {2:0} fd[5] 10100 11 FCVT_rm.D.L fd,rs1 aD,fd,rs1 FCVTDL(immed, rd, rs1)
+@ 1101001 00011 rs1[5] {2:0} fd[5] 10100 11 FCVT_rm.D.LU fd,rs1 aD,fd,rs1 FCVTDLU(immed, rd, rs1)
+
+@ 0100000 00001 fs1[5] {2:0} rd[5] 10100 11 FCVT_rm.S.D fd,fs1 aD,rd,fs1 FCVTSD(immed, rd, rs1)
+@ 0100001 00000 fs1[5] {2:0} rd[5] 10100 11 FCVT_rm.D.S fd,fs1 aD,rd,fs1 FCVTDS(immed, rd, rs1)
+
+
+
+
+
+
+@ 1010000 fs2[5] fs1[5] 010 rd[5] 10100 11 FEQ.S rd,fs1,fs2 jF,rd,fs1,fs2 FEQS(rd, rs1, rs2)
+@ 1010000 fs2[5] fs1[5] 001 rd[5] 10100 11 FLT.S rd,fs1,fs2 jF,rd,fs1,fs2 FLTS(rd, rs1, rs2)
+@ 1010000 fs2[5] fs1[5] 000 rd[5] 10100 11 FLE.S rd,fs1,fs2 jF,rd,fs1,fs2 FLES(rd, rs1, rs2)
+@ 0010100 fs2[5] fs1[5] 000 fd[5] 10100 11 FMIN.S fd,fs1,fs2 jF,fd,fs1,fs2 FMINS(rd, rs1, rs2)
+@ 0010100 fs2[5] fs1[5] 001 fd[5] 10100 11 FMAX.S fd,fs1,fs2 jF,fd,fs1,fs2 FMAXS(rd, rs1, rs2)
+
+@ 1010001 fs2[5] fs1[5] 010 rd[5] 10100 11 FEQ.D rd,fs1,fs2 jD,rd,fs1,fs2 FEQD(rd, rs1, rs2)
+@ 1010001 fs2[5] fs1[5] 001 rd[5] 10100 11 FLT.D rd,fs1,fs2 jD,rd,fs1,fs2 FLTD(rd, rs1, rs2)
+@ 1010001 fs2[5] fs1[5] 000 rd[5] 10100 11 FLE.D rd,fs1,fs2 jD,rd,fs1,fs2 FLED(rd, rs1, rs2)
+@ 0010101 fs2[5] fs1[5] 000 fd[5] 10100 11 FMIN.D fd,fs1,fs2 jD,fd,fs1,fs2 FMIND(rd, rs1, rs2)
+@ 0010101 fs2[5] fs1[5] 001 fd[5] 10100 11 FMAX.D fd,fs1,fs2 jD,fd,fs1,fs2 FMAXD(rd, rs1, rs2)
+
+@ 0010000 fs2[5] fs1[5] 000 fd[5] 10100 11 FSGNJ.S fd,fs1,fs2 jF,fd,fs1,fs2 FR(rd).ui = sgnj32(rs1, rs2, 0,0); box(rd)
+@ 0010000 fs2[5] fs1[5] 001 fd[5] 10100 11 FSGNJN.S fd,fs1,fs2 jF,fd,fs1,fs2 FR(rd).ui = sgnj32(rs1, rs2, 1,0); box(rd)
+@ 0010000 fs2[5] fs1[5] 010 fd[5] 10100 11 FSGNJX.S fd,fs1,fs2 jF,fd,fs1,fs2 FR(rd).ui = sgnj32(rs1, rs2, 0,1); box(rd)
+
+@ 0010001 fs2[5] fs1[5] 000 fd[5] 10100 11 FSGNJ.D fd,fs1,fs2 jD,fd,fs1,fs2 FR(rd).ul = sgnj64(rs1, rs2, 0,0)
+@ 0010001 fs2[5] fs1[5] 001 fd[5] 10100 11 FSGNJN.D fd,fs1,fs2 jD,fd,fs1,fs2 FR(rd).ul = sgnj64(rs1, rs2, 1,0)
+@ 0010001 fs2[5] fs1[5] 010 fd[5] 10100 11 FSGNJX.D fd,fs1,fs2 jD,fd,fs1,fs2 FR(rd).ul = sgnj64(rs1, rs2, 0,1)
+
+@ 1110000 00000 fs1[5] 000 rd[5] 10100 11 FMV.X.W rd,fs1 jF,rd,fs1 IR(rd).ul = FR(rs1).ul
+@ 1111000 00000 rs1[5] 000 fd[5] 10100 11 FMV.W.X fd,rs1 jF,fd,rs1 FR(rd).ul = IR(rs1).ul
+
+@ 1110001 00000 fs1[5] 000 rd[5] 10100 11 FMV.X.D rd,fs1 jD,rd,fs1 IR(rd).ul = FR(rs1).ul
+@ 1111001 00000 rs1[5] 000 fd[5] 10100 11 FMV.D.X fd,rs1 jD,fd,rs1 FR(rd).ul = IR(rs1).ul
+
+
+# Special Instructions
+
+@ 00000000000 0 00000 000 00000 11100 11 ECALL - x,- ECALL(4)
+@ {10:0} 1 00000 000 00000 11100 11 EBREAK constant x,- EBRK(constant, 4)
+
+@ {11:0} rs1[5] 001 rd[5] 11100 11 CSRRW rd,rs1,constant x,rd,rs1 DOCSR(constant, 4)
+@ {11:0} rs1[5] 010 rd[5] 11100 11 CSRRS rd,rs1,constant x,rd,rs1 DOCSR(constant,4)
+@ {11:0} rs1[5] 011 rd[5] 11100 11 CSRRC rd,rs1,constant x,rd,rs1 DOCSR(constant, 4)
+
+@ {11:0} {16:12} 101 rd[5] 11100 11 CSRRWI rd,constant x,rd DOCSR(constant & 0xfff, 4)
+@ {11:0} {16:12} 110 rd[5] 11100 11 CSRRSI rd,constant x,rd DOCSR(constant & 0xfff, 4)
+@ {11:0} {16:12} 111 rd[5] 11100 11 CSRRCI rd,constant x,rd DOCSR(constant & 0xfff, 4)
+
+@ 00010 {1:0} 00000 rs1[5] 010 rd[5] 01011 11 LR.W rd,rs1 rA,rd,rs1 LR_W(rd, rs1)
+@ 00010 {1:0} 00000 rs1[5] 011 rd[5] 01011 11 LR.D rd,rs1 rA,rd,rs1 LR_L(rd, rs1)
+@ 00011 {1:0} rs2[5] rs1[5] 010 rd[5] 01011 11 SC.W rd,rs1,rs2 wA,rd,rs1,rs2 SC_W(rd, rs1, rs2)
+@ 00011 {1:0} rs2[5] rs1[5] 011 rd[5] 01011 11 SC.D rd,rs1,rs2 wA,rd,rs1,rs2 SC_L(rd, rs1, rs2)
+
+@ 00001 {1:0} rs2[5] rs1[5] 010 rd[5] 01011 11 AMOSWAP.W rd,rs1,rs2 wA,rd,rs1,rs2 AMOSWAP_W(rd, rs1, rs2)
+@ 00001 {1:0} rs2[5] rs1[5] 011 rd[5] 01011 11 AMOSWAP.D rd,rs1,rs2 wA,rd,rs1,rs2 AMOSWAP_L(rd, rs1, rs2)
+
+@ 00000 {1:0} rs2[5] rs1[5] 010 rd[5] 01011 11 AMOADD.W rd,rs1,rs2 wA,rd,rs1,rs2 AMOADD_W(rd, rs1, rs2)
+@ 00100 {1:0} rs2[5] rs1[5] 010 rd[5] 01011 11 AMOXOR.W rd,rs1,rs2 wA,rd,rs1,rs2 AMOXOR_W(rd, rs1, rs2)
+@ 01000 {1:0} rs2[5] rs1[5] 010 rd[5] 01011 11 AMOOR.W rd,rs1,rs2 wA,rd,rs1,rs2 AMOOR_W(rd, rs1, rs2)
+@ 01100 {1:0} rs2[5] rs1[5] 010 rd[5] 01011 11 AMOAND.W rd,rs1,rs2 wA,rd,rs1,rs2 AMOAND_W(rd, rs1, rs2)
+
+@ 10000 {1:0} rs2[5] rs1[5] 010 rd[5] 01011 11 AMOMIN.W rd,rs1,rs2 wA,rd,rs1,rs2 AMOMIN_W(rd, rs1, rs2)
+@ 10100 {1:0} rs2[5] rs1[5] 010 rd[5] 01011 11 AMOMAX.W rd,rs1,rs2 wA,rd,rs1,rs2 AMOMAX_W(rd, rs1, rs2)
+@ 11000 {1:0} rs2[5] rs1[5] 010 rd[5] 01011 11 AMOMINU.W rd,rs1,rs2 wA,rd,rs1,rs2 AMOMINU_W(rd, rs1, rs2)
+@ 11100 {1:0} rs2[5] rs1[5] 010 rd[5] 01011 11 AMOMAXU.W rd,rs1,rs2 wA,rd,rs1,rs2 AMOMAXU_W(rd, rs1, rs2)
+
+@ 00000 {1:0} rs2[5] rs1[5] 011 rd[5] 01011 11 AMOADD.D rd,rs1,rs2 wA,rd,rs1,rs2 AMOADD_L(rd, rs1, rs2)
+@ 00100 {1:0} rs2[5] rs1[5] 011 rd[5] 01011 11 AMOXOR.D rd,rs1,rs2 wA,rd,rs1,rs2 AMOXOR_L(rd, rs1, rs2)
+@ 01000 {1:0} rs2[5] rs1[5] 011 rd[5] 01011 11 AMOOR.D rd,rs1,rs2 wA,rd,rs1,rs2 AMOOR_L(rd, rs1, rs2)
+@ 01100 {1:0} rs2[5] rs1[5] 011 rd[5] 01011 11 AMOAND.D rd,rs1,rs2 wA,rd,rs1,rs2 AMOAND_L(rd, rs1, rs2)
+
+@ 10000 {1:0} rs2[5] rs1[5] 011 rd[5] 01011 11 AMOMIN.D rd,rs1,rs2 wA,rd,rs1,rs2 AMOMIN_L(rd, rs1, rs2)
+@ 10100 {1:0} rs2[5] rs1[5] 011 rd[5] 01011 11 AMOMAX.D rd,rs1,rs2 wA,rd,rs1,rs2 AMOMAX_L(rd, rs1, rs2)
+@ 11000 {1:0} rs2[5] rs1[5] 011 rd[5] 01011 11 AMOMINU.D rd,rs1,rs2 wA,rd,rs1,rs2 AMOMINU_L(rd, rs1, rs2)
+@ 11100 {1:0} rs2[5] rs1[5] 011 rd[5] 01011 11 AMOMAXU.D rd,rs1,rs2 wA,rd,rs1,rs2 AMOMAXU_L(rd, rs1, rs2)
+
+@ {-11:0} rs1[5] 000 rd[5] 00011 11 FENCE rd,rs1,immed xA,rd,rs1 FENCE(rd, rs1, immed)
diff --git a/caveat/Makefile b/caveat/Makefile
new file mode 100644
index 0000000..75f8cf9
--- /dev/null
+++ b/caveat/Makefile
@@ -0,0 +1,88 @@
+# Path where things should be installed
+R = $(HOME)
+B = build
+
+_dummy := $(shell mkdir -p $B)
+_dummy := $(shell mkdir -p $R/include/cava)
+
+# Object files for libcava.a
+aobj := elf_loader.o insn.o shmfifo.o
+aobj := $(addprefix $B/,$(aobj))
+
+# Object files for caveat not in libcava.a
+cobj := main.o core.o fast_sim.o slow_sim.o ecall.o
+cobj := $(addprefix $B/,$(cobj))
+
+# Include files for libcava.a
+incf := opcodes.h insn.h caveat.h shmfifo.h
+
+# Libraries
+libs := $R/lib/softfloat.a -lrt -lpthread -lm
+
+# Compiler flags
+CFLAGS := -I../include -I$R/include -I$R/include/softfloat -g -O3
+LDFLAGS := -Wl,-Ttext=70000000
+
+
+#$(info $$aobj is [${aobj}])
+#$(info $$cobj is [${cobj}])
+
+
+# Make targets
+
+all: $R/lib/libcava.a $B/caveat
+
+install: all
+ -cp $B/caveat $R/bin/caveat
+ -cp $(incf) $R/include/cava
+
+.PHONY: clean
+clean:
+ rm -f decode_insn.h disasm_insn.h execute_insn.h ecall_nums.h opcodes.h opcodes_attr.h *.o *~ ./#*#
+ rm -rf build
+
+
+# Emulator and library
+
+$B/caveat : $(cobj) $R/lib/libcava.a
+ $(CC) $(CFLAGS) $(LDFLAGS) -o $@ $^ $(libs)
+
+$R/lib/libcava.a : $(aobj)
+ ar rcs $@ $^
+
+# Dependencies
+
+$(aobj): $(incf)
+$(cobj): $(incf)
+
+$B/slow_sim.o $B/fast_sim.o: sim_body.h execute_insn.h caveat_fp.h core.h
+$B/ecall.o: core.h ecall_nums.h
+$B/insn.o: decode_insn.h disasm_insn.h
+$B/trace.o: fifo.h
+
+$B/fast_sim.o: fast_sim.c
+ $(CC) $(CFLAGS) -Ofast -o $@ -c $<
+
+$B/core.o: core.c core.h
+ $(CC) $(CFLAGS) -o $@ -c $<
+
+$B/elf_loader.o : elf_loader.c
+ $(CC) $(CFLAGS) -o $@ -c $<
+
+$B/ecall.o : ecall.c
+ $(CC) $(CFLAGS) -o $@ -c $<
+
+$B/%.o : %.c
+ $(CC) $(CFLAGS) -o $@ -c $<
+
+$B/%.o : %.cc
+ $(CC) $(CFLAGS) -o $@ -c $<
+
+
+opcodes.h opcodes_attr.h decode_insn.h execute_insn.h disasm_insn.h constants.c: crunch_isa.py Instructions.def
+ python3 crunch_isa.py
+
+ecall_nums.h: make_ecall_tbl.py
+ python3 make_ecall_tbl.py
+
+
diff --git a/caveat/arith.h b/caveat/arith.h
new file mode 100644
index 0000000..4757e84
--- /dev/null
+++ b/caveat/arith.h
@@ -0,0 +1,97 @@
+/*
+ Copyright (c) 2020 Peter Hsu. All Rights Reserved. See LICENCE file for details.
+*/
+
+
+#define F32_SIGN (0x1 << 31)
+#define F64_SIGN (0x1L << 63)
+
+#define sgnj32(a, b, n, x) ((FR(a).ui & ~F32_SIGN) | ((((x) ? FR(a).ui : (n) ? F32_SIGN : 0) ^ FR(b).ui) & F32_SIGN))
+#define sgnj64(a, b, n, x) ((FR(a).ul & ~F64_SIGN) | ((((x) ? FR(a).ul : (n) ? F64_SIGN : 0) ^ FR(b).ul) & F64_SIGN))
+
+
+
+#ifdef SOFT_FP
+
+
+#include "internals.h"
+#include "softfloat_types.h"
+#include "softfloat.h"
+
+#define RM cpu->state.fcsr.rmode
+#define SRM(m) softfloat_roundingMode=((m)==7?RM:(m))
+#define SET_FPX /* set_fp_exceptions() */
+
+static inline float32_t defaultNaNF32UI() { union ui32_f32 u; u.ui= 0x7FC00000; return u.f; }
+static inline float64_t defaultNaNF64UI() { union ui64_f64 u; u.ui=0x7FF8000000000000L; return u.f; }
+#define f32_less(a, b) (f32_lt_quiet(a, b) || (f32_eq(a, b) && (a.v & F32_SIGN)))
+#define f32_more(a, b) (f32_lt_quiet(b, a) || (f32_eq(b, a) && (b.v & F32_SIGN)))
+static inline float32_t f32_min(float32_t a, float32_t b) { return (isNaNF32UI(a.v) && isNaNF32UI(b.v)) ? defaultNaNF32UI() : (f32_more(a, b) || isNaNF32UI(b.v)) ? a : b; }
+static inline float32_t f32_max(float32_t a, float32_t b) { return (isNaNF32UI(a.v) && isNaNF32UI(b.v)) ? defaultNaNF32UI() : (f32_less(a, b) || isNaNF32UI(b.v)) ? a : b; }
+#define f64_less(a, b) (f64_lt_quiet(a, b) || (f64_eq(a, b) && (a.v & F64_SIGN)))
+#define f64_more(a, b) (f64_lt_quiet(b, a) || (f64_eq(b, a) && (b.v & F64_SIGN)))
+static inline float64_t f64_min(float64_t a, float64_t b) { return (isNaNF64UI(a.v) && isNaNF64UI(b.v)) ? defaultNaNF64UI() : (f64_more(a, b) || isNaNF64UI(b.v)) ? a : b; }
+static inline float64_t f64_max(float64_t a, float64_t b) { return (isNaNF64UI(a.v) && isNaNF64UI(b.v)) ? defaultNaNF64UI() : (f64_less(a, b) || isNaNF64UI(b.v)) ? a : b; }
+
+
+#else
+
+
+#include
+static long tmp_rm;
+#define SRM(rm) if (rm!=7) { tmp_rm=fegetround(); fesetround(riscv_to_c_rm(rm)); }
+#define RRM(rm) if(rm!=7) fesetround(tmp_rm);
+#define SET_FPX ;/* set_fp_exceptions() */
+
+static inline long riscv_to_c_rm(long rm)
+{
+ switch (rm) {
+ case /* RNE */ 0x0: return FE_TONEAREST;
+ case /* RTZ */ 0x1: return FE_TOWARDZERO;
+ case /* RDN */ 0x2: return FE_DOWNWARD;
+ case /* RUP */ 0x3: return FE_UPWARD;
+ default: abort();
+ }
+}
+
+
+#endif
+
+
+
+// Following copied from Spike
+
+static inline unsigned long mulhu(unsigned long a, unsigned long b)
+{
+ unsigned long t;
+ unsigned int y1, y2, y3;
+ unsigned long a0 = (unsigned int)a, a1 = a >> 32;
+ unsigned long b0 = (unsigned int)b, b1 = b >> 32;
+
+ t = a1*b0 + ((a0*b0) >> 32);
+ y1 = t;
+ y2 = t >> 32;
+
+ t = a0*b1 + y1;
+ y1 = t;
+
+ t = a1*b1 + y2 + (t >> 32);
+ y2 = t;
+ y3 = t >> 32;
+
+ return ((unsigned long)y3 << 32) | y2;
+}
+
+static inline long mulh(long a, long b)
+{
+ int negate = (a < 0) != (b < 0);
+ unsigned long res = mulhu(a < 0 ? -a : a, b < 0 ? -b : b);
+ return negate ? ~res + (a * b == 0) : res;
+}
+
+static inline long mulhsu(long a, unsigned long b)
+{
+ int negate = a < 0;
+ unsigned long res = mulhu(a < 0 ? -a : a, b);
+ return negate ? ~res + (a * b == 0) : res;
+}
diff --git a/caveat/caveat.h b/caveat/caveat.h
new file mode 100644
index 0000000..953d40b
--- /dev/null
+++ b/caveat/caveat.h
@@ -0,0 +1,181 @@
+/*
+ Copyright (c) 2020 Peter Hsu. All Rights Reserved. See LICENCE file for details.
+*/
+
+#ifndef CAVEAT_H
+#define CAVEAT_H
+
+/*
+ Caveat trace records are a kind of instruction set with a 7-bit 'opcode'.
+ There are two main instruction formats:
+ M (memory reference) has signed 54-bit value, usually a virtual address
+ P (program counter) has 47-bit PC (RISC-V instructions minimum 16-bytes)
+ plus a 10 bit number field, usually byte count since last P record.
+
+ 6 5 4 3 2 1 0 bit pos
+3210987654321098765432109876543210987654321098765432109876543210 --------
+v.......v.......v.......v.......v.......v.......v.......vccccccc M format
+nnnnnnnnnn......p.......p.......p.......p.......p.......pccccccc P format
+
+*/
+#define tr_max_number (1UL<<10) /* P-format number field */
+#define tr_memq_len (tr_max_number/2) /* number of instructions */
+
+#define tr_code(tr) ((uint64_t)(tr) & 0x000000000000007fL)
+#define tr_value(tr) ( ( int64_t)(tr) >> 7)
+#define tr_pc(tr) (((uint64_t)(tr) & 0x003fffffffffff80L) >> 6)
+#define tr_delta(tr) ( (uint64_t)(tr) >> 54)
+#define tr_number(tr) (((uint64_t)(tr) & 0x003fffffffffff80L) >> 7)
+
+/* Trace file is broken into frames. Each frame comes from a single HART.
+ Frame records are P-format with number=hart# and pc=begining value. */
+#define is_frame(tr) ((0b1110000L & tr_code(tr)) == \
+ (0b0000000L))
+#define tr_eof 0b0000000L
+#define tr_has_pc 0b0000001L /* taken branch targets */
+#define tr_has_mem 0b0000010L /* load/store addresses */
+#define tr_has_reg 0b0000100L /* register update values */
+#define tr_has_timing 0b0001000L /* pipeline timing information */
+
+/* The main trace file record types are memory and basic block records. */
+#define is_mem(tr) ((0b1000000L & tr_code(tr)) == \
+ (0b1000000L)) /* M-format */
+#define is_bbk(tr) ((0b1100000L & tr_code(tr)) == \
+ (0b0100000L)) /* P-format */
+
+/* Basic block records are P-format, describing a series sequential instructions.
+ The number tr_field gives the length of the instruction block in bytes.
+ If the block ends in a taken branch, the tr_pc field gives the target address.
+ Otherwise the tr_pc field is the next sequential basic block beginning address. */
+
+#define tr_jump 0b0100000L
+#define tr_branch 0b0100001L
+#define tr_call 0b0100010L
+#define tr_return 0b0100011L
+#define is_goto(tr) ((0b1111000L & tr_code(tr)) == \
+ (0b0100000L)) /* 4 spare opcodes */
+/* Below are basic block records not ending in taken branch. */
+#define tr_any 0b0101000L /* P-format */
+#define tr_fence 0b0101001L /* P-format */
+#define tr_ecall 0b0101010L /* M-format */
+#define tr_csr 0b0101011L /* M-format */
+
+/*
+ All memory records are M-format, have consistent bit for read/write, are
+ divided into is_ldst() load/store group with tr_size() 1, 2, 4 8 bytes,
+ and cache line is_getput() group for tr_level() 0, 1, 2, 3 caches.
+*/
+#define is_write(tr) ((0b1000100L & tr_code(tr)) == \
+ (0b1000100L))
+#define is_ldst(tr) ((0b1100000L & tr_code(tr)) == \
+ (0b1000000L))
+#define is_getput(tr) ((0b1100000L & tr_code(tr)) == \
+ (0b1100000L))
+
+#define is_amo(tr) ((0b1111100L & tr_code(tr)) == \
+ (0b1000000L))
+#define tr_amo4 0b1000110L
+#define tr_amo8 0b1000111L
+
+#define is_lrsc(tr) ((0b1111100L & tr_code(tr)) == \
+ (0b1001000L))
+#define tr_lr4 0b1001010L
+#define tr_lr8 0b1001011L
+#define tr_sc4 0b1001110L
+#define tr_sc8 0b1001111L
+
+#define is_load(tr) ((0b1111100L & tr_code(tr)) == \
+ (0b1010000L))
+#define tr_read1 0b1010000L
+#define tr_read2 0b1010001L
+#define tr_read4 0b1010010L
+#define tr_read8 0b1010011L
+#define is_store(tr) ((0b1111100L & tr_code(tr)) == \
+ (0b1010100L))
+#define tr_write1 0b1010100L
+#define tr_write2 0b1010101L
+#define tr_write4 0b1010110L
+#define tr_write8 0b1010111L
+#define tr_size(tr) (1L<<(tr_code(tr)&0x3L))
+
+#define tr_d1get 0b1100001L /* L1 data cache load from L2 */
+#define tr_d1put 0b1100101L /* L1 data cache write back to L2 */
+#define tr_d2get 0b1100010L /* L2 data cache load from L3 */
+#define tr_d2put 0b1100110L /* L2 data cache write back to L3 */
+#define is_dcache(tr) ((0b1111000L & tr_code(tr)) == \
+ (0b1100000L))
+#define tr_i0get 0b1110000L /* instruction buffer fetchfrom L1 */
+#define tr_i1get 0b1110001L /* L1 instruction cache load from L2 */
+#define tr_i2get 0b1110010L /* L2 instruction cache load from L3 */
+#define is_icache(tr) ((0b1111000L & tr_code(tr)) == \
+ (0b1110000L))
+#define tr_clevel(tr) (tr_code(tr)&0x3L)
+
+/* Out-Of-Band Records. These records can be inserted anytime between
+ mem and bbk records, but not in the register value section because
+ there the 64-bit values have no opcode field. */
+
+/* Tracing instruction issue cycle time */
+#define tr_stall 0b0010000L /* begin stall cycle time (M-fmt) */
+#define tr_issue 0b0010001L /* issue after number cycles (P-fmt) */
+
+/* Periodical counters to help synchronize simulator components (M-format). */
+#define tr_icount 0b0010010L /* instructions executed */
+#define tr_cycles 0b0010011L /* pipeline cycles simulated */
+
+
+
+/*
+ Macros to create trace records.
+*/
+#define trM(code, value) ( ((uint64_t)( value)<< 7) | ((uint64_t)(code)&0x7fL) )
+#define trP(code, number, pc) ( ((uint64_t)(number)<<54) | ((uint64_t)(pc)<<6) & 0x003fffffffffff80L | ((uint64_t)(code)&0x7fL) )
+
+
+
+#define quitif(bad, fmt, ...) if (bad) { fprintf(stderr, fmt, ##__VA_ARGS__); fprintf(stderr, "\n\n"); exit(0); }
+#define dieif(bad, fmt, ...) if (bad) { fprintf(stderr, fmt, ##__VA_ARGS__); fprintf(stderr, "\n\n"); abort(); }
+
+
+static inline uint64_t tr_print(uint64_t tr, FILE* f)
+{
+ if (is_mem(tr))
+ fprintf(f, "MemOp: code=%02lx, w=%d, sz=%ldB, addr=0x%lx\n", tr_code(tr), is_write(tr), tr_size(tr), tr_value(tr));
+ else if (is_goto(tr))
+ fprintf(f, "GotoOp: code=%02lx, delta=%ld, pc=0x%lx\n", tr_code(tr), tr_delta(tr), tr_pc(tr));
+ else if (is_bbk(tr))
+ fprintf(f, "BbkOp: code=%02lx, delta=%ld\n", tr_code(tr), tr_delta(tr));
+ else if (tr_code(tr) == tr_stall)
+ fprintf(f, "Stall: number=%ld\n", tr_number(tr));
+ else if (tr_code(tr) == tr_issue)
+ fprintf(f, "after=%ld, pc=0x%lx\n", tr_delta(tr), tr_pc(tr));
+ else
+ fprintf(f, "OtherOp=%016lx, code=%02lx, delta=%ld, pc=0x%lx\n", tr, tr_code(tr), tr_delta(tr), tr_pc(tr));
+ return tr;
+}
+
+
+struct options_t {
+ const char* name; /* name=type[si] or name, preceeded by - or -- */
+ union { /* pointer to option value location */
+ const char** s; /* name=s */
+ long* i; /* name=i */
+ long* b; /* name (no =) */
+ };
+ union { /* default value */
+ const char* ds; /* name=s */
+ long di; /* name=i */
+ long bv; /* value if flag given */
+ };
+ const char* h; /* help string */
+};
+
+extern const struct options_t opt[];
+extern const char* usage;
+
+void help_exit();
+int parse_options( const char** argv );
+
+
+
+#endif
diff --git a/caveat/caveat_fp.h b/caveat/caveat_fp.h
new file mode 100644
index 0000000..2141c0e
--- /dev/null
+++ b/caveat/caveat_fp.h
@@ -0,0 +1,85 @@
+#define SOFT_FP
+#ifndef NO_FP_MACROS
+#define FMADD32( rm, rd, rs1, rs2, rs3) SRM(rm); FR(rd).f32 = f32_mulAdd( F32(rs1), F32(rs2), F32(rs3)); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FMADD32_dyn(rd, rs1, rs2, rs3) FR(rd).f32 = f32_mulAdd( F32(rs1), F32(rs2), F32(rs3)); SET_FPX;
+#define FMSUB32( rm, rd, rs1, rs2, rs3) SRM(rm); FR(rd).f32 = f32_mulAdd( F32(rs1), F32(rs2), NF32(rs3)); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FMSUB32_dyn(rd, rs1, rs2, rs3) FR(rd).f32 = f32_mulAdd( F32(rs1), F32(rs2), NF32(rs3)); SET_FPX;
+#define FNMADD32(rm, rd, rs1, rs2, rs3) SRM(rm); FR(rd).f32 = f32_mulAdd(NF32(rs1), F32(rs2), NF32(rs3)); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FNMADD32_dyn(rd, rs1, rs2, rs3) FR(rd).f32 = f32_mulAdd(NF32(rs1), F32(rs2), NF32(rs3)); SET_FPX;
+#define FNMSUB32(rm, rd, rs1, rs2, rs3) SRM(rm); FR(rd).f32 = f32_mulAdd(NF32(rs1), F32(rs2), F32(rs3)); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FNMSUB32_dyn(rd, rs1, rs2, rs3) FR(rd).f32 = f32_mulAdd(NF32(rs1), F32(rs2), F32(rs3)); SET_FPX;
+#define FMADD64( rm, rd, rs1, rs2, rs3) SRM(rm); FR(rd).f64 = f64_mulAdd( F64(rs1), F64(rs2), F64(rs3)); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FMADD64_dyn(rd, rs1, rs2, rs3) FR(rd).f64 = f64_mulAdd( F64(rs1), F64(rs2), F64(rs3)); SET_FPX;
+#define FMSUB64( rm, rd, rs1, rs2, rs3) SRM(rm); FR(rd).f64 = f64_mulAdd( F64(rs1), F64(rs2), NF64(rs3)); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FMSUB64_dyn(rd, rs1, rs2, rs3) FR(rd).f64 = f64_mulAdd( F64(rs1), F64(rs2), NF64(rs3)); SET_FPX;
+#define FNMADD64(rm, rd, rs1, rs2, rs3) SRM(rm); FR(rd).f64 = f64_mulAdd(NF64(rs1), F64(rs2), NF64(rs3)); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FNMADD64_dyn(rd, rs1, rs2, rs3) FR(rd).f64 = f64_mulAdd(NF64(rs1), F64(rs2), NF64(rs3)); SET_FPX;
+#define FNMSUB64(rm, rd, rs1, rs2, rs3) SRM(rm); FR(rd).f64 = f64_mulAdd(NF64(rs1), F64(rs2), F64(rs3)); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FNMSUB64_dyn(rd, rs1, rs2, rs3) FR(rd).f64 = f64_mulAdd(NF64(rs1), F64(rs2), F64(rs3)); SET_FPX;
+#define FADD32(rm, rd, rs1, rs2) SRM(rm); FR(rd).f32 = f32_add(F32(rs1), F32(rs2)); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FADD32_dyn(rd, rs1, rs2) FR(rd).f32 = f32_add(F32(rs1), F32(rs2)); SET_FPX;
+#define FSUB32(rm, rd, rs1, rs2) SRM(rm); FR(rd).f32 = f32_sub(F32(rs1), F32(rs2)); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FSUB32_dyn(rd, rs1, rs2) FR(rd).f32 = f32_sub(F32(rs1), F32(rs2)); SET_FPX;
+#define FMUL32(rm, rd, rs1, rs2) SRM(rm); FR(rd).f32 = f32_mul(F32(rs1), F32(rs2)); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FMUL32_dyn(rd, rs1, rs2) FR(rd).f32 = f32_mul(F32(rs1), F32(rs2)); SET_FPX;
+#define FDIV32(rm, rd, rs1, rs2) SRM(rm); FR(rd).f32 = f32_div(F32(rs1), F32(rs2)); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FDIV32_dyn(rd, rs1, rs2) FR(rd).f32 = f32_div(F32(rs1), F32(rs2)); SET_FPX;
+#define FADD64(rm, rd, rs1, rs2) SRM(rm); FR(rd).f64 = f64_add(F64(rs1), F64(rs2)); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FADD64_dyn(rd, rs1, rs2) FR(rd).f64 = f64_add(F64(rs1), F64(rs2)); SET_FPX;
+#define FSUB64(rm, rd, rs1, rs2) SRM(rm); FR(rd).f64 = f64_sub(F64(rs1), F64(rs2)); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FSUB64_dyn(rd, rs1, rs2) FR(rd).f64 = f64_sub(F64(rs1), F64(rs2)); SET_FPX;
+#define FMUL64(rm, rd, rs1, rs2) SRM(rm); FR(rd).f64 = f64_mul(F64(rs1), F64(rs2)); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FMUL64_dyn(rd, rs1, rs2) FR(rd).f64 = f64_mul(F64(rs1), F64(rs2)); SET_FPX;
+#define FDIV64(rm, rd, rs1, rs2) SRM(rm); FR(rd).f64 = f64_div(F64(rs1), F64(rs2)); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FDIV64_dyn(rd, rs1, rs2) FR(rd).f64 = f64_div(F64(rs1), F64(rs2)); SET_FPX;
+#define FSQRT32(rm, rd, rs1) SRM(rm); FR(rd).f32 = f32_sqrt(F32(rs1)); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FSQRT32_dyn(rd, rs1) FR(rd).f32 = f32_sqrt(F32(rs1)); SET_FPX;
+#define FSQRT64(rm, rd, rs1) SRM(rm); FR(rd).f64 = f64_sqrt(F64(rs1)); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FSQRT64_dyn(rd, rs1) FR(rd).f64 = f64_sqrt(F64(rs1)); SET_FPX;
+#define FCVTWS( rm, rd, rs1) SRM(rm); IR(rd).l = (long)f32_to_i32( F32(rs1), RM, true); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FCVTWS_dyn(rd, rs1) IR(rd).l = (long)f32_to_i32( F32(rs1), RM, true); SET_FPX;
+#define FCVTWUS(rm, rd, rs1) SRM(rm); IR(rd).l = (long)f32_to_ui32(F32(rs1), RM, true); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FCVTWUS_dyn(rd, rs1) IR(rd).l = (long)f32_to_ui32(F32(rs1), RM, true); SET_FPX;
+#define FCVTLS( rm, rd, rs1) SRM(rm); IR(rd).l = f32_to_i64( F32(rs1), RM, true); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FCVTLS_dyn(rd, rs1) IR(rd).l = f32_to_i64( F32(rs1), RM, true); SET_FPX;
+#define FCVTLUS(rm, rd, rs1) SRM(rm); IR(rd).ul = f32_to_ui64(F32(rs1), RM, true); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FCVTLUS_dyn(rd, rs1) IR(rd).ul = f32_to_ui64(F32(rs1), RM, true); SET_FPX;
+#define FCVTWD( rm, rd, rs1) SRM(rm); IR(rd).l = (long)f64_to_i64( F64(rs1), RM, true); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FCVTWD_dyn(rd, rs1) IR(rd).l = (long)f64_to_i64( F64(rs1), RM, true); SET_FPX;
+#define FCVTWUD(rm, rd, rs1) SRM(rm); IR(rd).l = (long)f64_to_ui64(F64(rs1), RM, true); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FCVTWUD_dyn(rd, rs1) IR(rd).l = (long)f64_to_ui64(F64(rs1), RM, true); SET_FPX;
+#define FCVTLD( rm, rd, rs1) SRM(rm); IR(rd).l = f64_to_i64( F64(rs1), RM, true); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FCVTLD_dyn(rd, rs1) IR(rd).l = f64_to_i64( F64(rs1), RM, true); SET_FPX;
+#define FCVTLUD(rm, rd, rs1) SRM(rm); IR(rd).ul = f64_to_ui64(F64(rs1), RM, true); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FCVTLUD_dyn(rd, rs1) IR(rd).ul = f64_to_ui64(F64(rs1), RM, true); SET_FPX;
+#define FCVTSW( rm, rd, rs1) SRM(rm); FR(rd).f32 = i32_to_f32(IR(rs1).i ); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FCVTSW_dyn(rd, rs1) FR(rd).f32 = i32_to_f32(IR(rs1).i ); SET_FPX;
+#define FCVTSWU(rm, rd, rs1) SRM(rm); FR(rd).f32 = ui32_to_f32(IR(rs1).ui); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FCVTSWU_dyn(rd, rs1) FR(rd).f32 = ui32_to_f32(IR(rs1).ui); SET_FPX;
+#define FCVTSL( rm, rd, rs1) SRM(rm); FR(rd).f32 = i64_to_f32(IR(rs1).l ); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FCVTSL_dyn(rd, rs1) FR(rd).f32 = i64_to_f32(IR(rs1).l ); SET_FPX;
+#define FCVTSLU(rm, rd, rs1) SRM(rm); FR(rd).f32 = ui64_to_f32(IR(rs1).ul); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FCVTSLU_dyn(rd, rs1) FR(rd).f32 = ui64_to_f32(IR(rs1).ul); SET_FPX;
+#define FCVTDW( rm, rd, rs1) SRM(rm); FR(rd).f64 = i32_to_f64(IR(rs1).i ); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FCVTDW_dyn(rd, rs1) FR(rd).f64 = i32_to_f64(IR(rs1).i ); SET_FPX;
+#define FCVTDWU(rm, rd, rs1) SRM(rm); FR(rd).f64 = ui32_to_f64(IR(rs1).ui); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FCVTDWU_dyn(rd, rs1) FR(rd).f64 = ui32_to_f64(IR(rs1).ui); SET_FPX;
+#define FCVTDL( rm, rd, rs1) SRM(rm); FR(rd).f64 = i64_to_f64(IR(rs1).l ); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FCVTDL_dyn(rd, rs1) FR(rd).f64 = i64_to_f64(IR(rs1).l ); SET_FPX;
+#define FCVTDLU(rm, rd, rs1) SRM(rm); FR(rd).f64 = ui64_to_f64(IR(rs1).ul); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FCVTDLU_dyn(rd, rs1) FR(rd).f64 = ui64_to_f64(IR(rs1).ul); SET_FPX;
+#define FCVTSD(rm, rd, rs1) SRM(rm); FR(rd).f32 = f64_to_f32(F64(rs1)); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FCVTSD_dyn(rd, rs1) FR(rd).f32 = f64_to_f32(F64(rs1)); SET_FPX;
+#define FCVTDS(rm, rd, rs1) SRM(rm); FR(rd).f64 = f32_to_f64(F32(rs1)); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FCVTDS_dyn(rd, rs1) FR(rd).f64 = f32_to_f64(F32(rs1)); SET_FPX;
+#define FEQS(rd, rs1, rs2) IR(rd).l = f32_eq(F32(rs1), F32(rs2)); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FLTS(rd, rs1, rs2) IR(rd).l = f32_lt(F32(rs1), F32(rs2)); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FLES(rd, rs1, rs2) IR(rd).l = f32_le(F32(rs1), F32(rs2)); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FEQD(rd, rs1, rs2) IR(rd).l = f64_eq(F64(rs1), F64(rs2)); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FLTD(rd, rs1, rs2) IR(rd).l = f64_lt(F64(rs1), F64(rs2)); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FLED(rd, rs1, rs2) IR(rd).l = f64_le(F64(rs1), F64(rs2)); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FMINS(rd, rs1, rs2) FR(rd).f32 = f32_min(F32(rs1), F32(rs2)); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FMAXS(rd, rs1, rs2) FR(rd).f32 = f32_max(F32(rs1), F32(rs2)); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FMIND(rd, rs1, rs2) FR(rd).f64 = f64_min(F64(rs1), F64(rs2)); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#define FMAXD(rd, rs1, rs2) FR(rd).f64 = f64_max(F64(rs1), F64(rs2)); SET_FPX; SRM(cpu->state.fcsr.rmode);
+#endif
diff --git a/caveat/core.c b/caveat/core.c
new file mode 100644
index 0000000..77b18ee
--- /dev/null
+++ b/caveat/core.c
@@ -0,0 +1,147 @@
+/*
+ Copyright (c) 2020 Peter Hsu. All Rights Reserved. See LICENCE file for details.
+*/
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "caveat.h"
+#include "opcodes.h"
+#include "caveat_fp.h"
+#include "arith.h"
+#include "insn.h"
+#include "shmfifo.h"
+#include "core.h"
+
+
+unsigned long lrsc_set = 0; /* global atomic lock */
+long regval[tr_memq_len]; /* space for maximum number of instructions */
+
+void init_core( struct core_t* cpu, long start_tick, const struct timeval* start_timeval )
+{
+ memset(cpu, 0, sizeof(struct core_t));
+ for (int i=32; i<64; i++) /* initialize FP registers to boxed float 0 */
+ cpu->reg[i].ul = 0xffffffff00000000UL;
+ cpu->counter.start_tick = start_tick;
+ cpu->counter.start_timeval = *start_timeval;
+}
+
+
+int outer_loop( struct core_t* cpu )
+{
+ if (cpu->params.breakpoint)
+ insert_breakpoint(cpu->params.breakpoint);
+ int fast_mode = 1;
+ cpu->holding_pc = 0;
+ while (1) { // terminated by program making exit() ecall
+ long next_report = (cpu->counter.insn_executed+cpu->params.report) / cpu->params.report;
+ next_report = next_report*cpu->params.report - cpu->counter.insn_executed;
+ if (fast_mode)
+ fast_sim(cpu, next_report);
+ else
+ slow_sim(cpu, next_report);
+
+ switch (cpu->state.mcause) {
+ case 0: // max_count instructions executed
+ status_report(cpu, stderr);
+ continue; // do not emulate instruction
+
+ case 8: // Environment call from U-mode
+ if (proxy_ecall(cpu)) goto program_called_exit;
+ break;
+ case 14: // CSR action
+ proxy_csr(cpu, insn(cpu->pc), cpu->state.mtval);
+ break;
+
+ case 3: /* Breakpoint */
+ if (fast_mode) {
+ if (--cpu->params.after > 0 || /* not ready to trace yet */
+ --cpu->params.skip > 0) { /* only trace every n call */
+ cpu->holding_pc = 0L; /* do not include current pc */
+ cpu->params.skip = cpu->params.every;
+ /* put instruction back and single step */
+ decode_instruction(insn(cpu->pc), cpu->pc);
+ cpu->state.mcause = 0;
+ fast_sim(cpu, 1);
+ /* reinserting breakpoint at subroutine entry */
+ insert_breakpoint(cpu->params.breakpoint);
+ }
+ else { /* insert breakpoint at subroutine return */
+ if (cpu->reg[RA].a) /* _start called with RA==0 */
+ insert_breakpoint(cpu->reg[RA].a);
+ fast_mode = 0; /* start tracing */
+ fifo_put(cpu->tb, trP(cpu->params.flags, 0, cpu->pc));
+ }
+ }
+ else { /* reinserting breakpoint at subroutine entry */
+ insert_breakpoint(cpu->params.breakpoint);
+ fast_mode = 1; /* stop tracing */
+ cpu->holding_pc = 0L; /* do not include current pc */
+ }
+ cpu->state.mcause = 0;
+ decode_instruction(insn(cpu->pc), cpu->pc);
+ continue; // re-execute at same pc
+
+ // The following cases do not fall out
+ case 2: // Illegal instruction
+ fprintf(stderr, "Illegal instruction at 0x%08lx\n", cpu->pc);
+ GEN_SEGV;
+ case 10: // Unknown instruction
+ fprintf(stderr, "Unknown instruction at 0x%08lx\n", cpu->pc);
+ GEN_SEGV;
+ default: // Oh oh
+ abort();
+ }
+ cpu->state.mcause = 0;
+ cpu->pc += shortOp(insn(cpu->pc)->op_code) ? 2 : 4;
+ cpu->counter.insn_executed++;
+ }
+
+ program_called_exit:
+ cpu->counter.insn_executed++; // don't forget to count last ecall
+ if (!cpu->params.quiet) {
+ clock_t end_tick = clock();
+ double elapse_time = (end_tick - cpu->counter.start_tick)/CLOCKS_PER_SEC;
+ double mips = cpu->counter.insn_executed / (1e6*elapse_time);
+ fprintf(stderr, "\n\nExecuted %ld instructions in %3.1f seconds for %3.1f MIPS\n",
+ cpu->counter.insn_executed, elapse_time, mips);
+ }
+ return cpu->reg[10].i;
+}
+
+
+void status_report( struct core_t* cpu, FILE* f )
+{
+ if (cpu->params.quiet)
+ return;
+#if 0
+ clock_t end_tick = clock();
+ double elapse_time = (end_tick - cpu->counter.start_tick)/CLOCKS_PER_SEC;
+#endif
+ struct timeval *t1=&cpu->counter.start_timeval, t2;
+ gettimeofday(&t2, 0);
+
+ double msec = (t2.tv_sec - t1->tv_sec)*1000;
+ msec += (t2.tv_usec - t1->tv_usec)/1000.0;
+ double mips = cpu->counter.insn_executed / (1e3*msec);
+ if (cpu->counter.insn_executed < 1000000000)
+ fprintf(f, "\rExecuted %ld instructions in %3.1f milliseconds for %3.1f MIPS",
+ cpu->counter.insn_executed, msec, mips);
+ else {
+ double minutes = floor(msec/1e3 / 60.0);
+ double seconds = msec/1e3 - 60.0*minutes;
+ if (minutes > 0.0)
+ fprintf(f, "\rExecuted %3.1f billion instructions in %3.0f minutes %3.0f seconds for %3.1f MIPS",
+ cpu->counter.insn_executed/1e9, minutes, seconds, mips);
+ else
+ fprintf(f, "\rExecuted %3.1f billion instructions in %3.1f seconds for %3.1f MIPS",
+ cpu->counter.insn_executed/1e9, msec/1e3, mips);
+ }
+}
diff --git a/caveat/core.h b/caveat/core.h
new file mode 100644
index 0000000..4879c3e
--- /dev/null
+++ b/caveat/core.h
@@ -0,0 +1,64 @@
+/*
+ Copyright (c) 2020 Peter Hsu. All Rights Reserved. See LICENCE file for details.
+*/
+
+
+#define sex(rd) IR(rd).l = IR(rd).l << 32 >> 32
+#define zex(rd) IR(rd).ul = IR(rd).ul << 32 >> 32
+#define box(rd)
+
+extern unsigned long lrsc_set; // globally shared location for atomic lock
+extern long regval[];
+
+struct core_t {
+ struct fifo_t* tb;
+ struct reg_t reg[64]; // Register files, IR[0-31], FR[32-63]
+#define IR(rn) cpu->reg[rn]
+#define FR(rn) cpu->reg[rn]
+ Addr_t pc; // Next instruction to be executed
+ Addr_t holding_pc; // For verification tracing
+
+ struct {
+ long coreid;
+ long ustatus;
+ long mcause;
+ Addr_t mepc;
+ long mtval;
+ union {
+ struct {
+ unsigned flags : 5;
+ unsigned rmode : 3;
+ } fcsr;
+ unsigned long fcsr_v;
+ };
+ } state;
+
+ struct {
+ long insn_executed;
+ long start_tick;
+ struct timeval start_timeval;
+ } counter;
+
+ struct {
+ Addr_t breakpoint; /* entrypoint of traced function */
+ long after; /* countdown, negative=start tracing */
+ long every; /* but only trace once per n-1 calls */
+ long skip; /* skip until negative, reset to every */
+ long report;
+ long flags;
+ long quiet;
+ } params;
+};
+
+
+extern struct fifo_t verify;
+
+void init_core(struct core_t* cpu, long start_tick, const struct timeval* start_timeval);
+int run_program(struct core_t* cpu);
+int outer_loop(struct core_t* cpu);
+void fast_sim(struct core_t*, long max_count);
+void slow_sim(struct core_t*, long max_count);
+int proxy_ecall( struct core_t* cpu );
+void proxy_csr( struct core_t* cpu, const struct insn_t* p, int which );
+void status_report(struct core_t* cpu, FILE*);
+
diff --git a/caveat/crunch_isa.py b/caveat/crunch_isa.py
new file mode 100644
index 0000000..fd6b211
--- /dev/null
+++ b/caveat/crunch_isa.py
@@ -0,0 +1,365 @@
+import re
+BinaryPattern = re.compile(r'([01]+)')
+FieldPattern = re.compile(r'([a-zA-Z][a-zA-Z0-9]*)\[([0-9]+)\]')
+ImmedPattern = re.compile(r'\{(\-?[0-9:|]+)\}')
+RangePattern = re.compile(r'\|?([0-9]+):([0-9]+)')
+SinglePattern = re.compile(r'\|?([0-9]+)')
+ParamPattern = re.compile(r'([a-zA-Z][a-zA-Z0-9_]*)(.*)')
+
+InsnFile = open('Instructions.def', 'r')
+df = open('opcodes.h', 'w')
+rf = open('decode_insn.h', 'w')
+ef = open('execute_insn.h', 'w')
+af = open('disasm_insn.h', 'w')
+kf = open('opcodes_attr.h', 'w')
+
+Field = {}
+Opcode = {}
+Mnemonic = {}
+OriginalOrder = [ 'Op_zero' ]
+
+for line in InsnFile:
+ CodeBits = []
+ Param = {}
+ Immed = []
+ signed = False
+ line = line.rstrip('\r\n')
+ # print(line)
+ if line == "" or line[0] != "@":
+ continue
+ line = line[1:]
+ tuples = re.split('\t+', line)
+ if len(tuples) < 5:
+ print(line)
+ print('Bad Line')
+ exit(-1)
+ (bitpattern, mnemonic, assembly, regspecs, action) = tuples
+ # Create opcode bitmask
+ tuples = bitpattern.split()
+ InsnLen = 0
+ for token in tuples:
+ token.strip()
+ m = BinaryPattern.match(token)
+ if m:
+ bits, = m.groups()
+ InsnLen += m.end()
+ CodeBits.append([InsnLen, bits])
+ continue
+ m = FieldPattern.match(token)
+ if m:
+ name, width = m.groups()
+ width = int(width)
+ InsnLen += width
+ Param[name] = [InsnLen, width]
+ continue
+ m = ImmedPattern.match(token)
+ if m:
+ bits, = m.groups()
+ if bits[0] == '-':
+ signed = True
+ bits = bits[1:]
+ while (bits != ""):
+ m = RangePattern.match(bits)
+ if m:
+ high, low = m.groups()
+ high = int(high)
+ low = int(low)
+ bits = bits[m.end():]
+ InsnLen += high-low+1
+ Immed.append([InsnLen, high, low])
+# print "Range", high, low, bits
+ continue
+ m = SinglePattern.match(bits)
+ if m:
+ where, = m.groups()
+ where = int(where)
+ bits = bits[m.end():]
+ InsnLen += 1
+ Immed.append([InsnLen, where, where])
+# print "Single", where, bits
+ continue
+ print()
+ print('Bad Token')
+ if not (InsnLen == 16 or InsnLen == 32):
+ print(line)
+ print('Illegal instruction length', InsnLen)
+ exit(-1)
+
+ code = 0
+ mask = 0
+ for pos, bits in CodeBits:
+ pos = InsnLen - pos
+ code |= int(bits, 2) << pos
+ mask |= (2**len(bits)-1) << pos
+
+ for f in Param:
+ Param[f][0] = InsnLen - Param[f][0]
+ if f in Field:
+ if Param[f][0] != Field[f][0] or Param[f][1] != Field[f][1]:
+ print(line)
+ print('Redefinition of field', f)
+ exit(-1)
+ else:
+ Field[f] = Param[f]
+
+ for i in range(0, len(Immed)):
+ Immed[i][0] = InsnLen - Immed[i][0]
+ mnemonic = mnemonic.strip()
+ mnemonic = mnemonic.lower()
+ op = 'Op_' + mnemonic.replace('.', '_')
+ OriginalOrder.append(op)
+ Opcode[op] = [ code, mask, signed, int(InsnLen/8), regspecs.strip(), Immed, action.strip(), assembly.strip() ]
+ Mnemonic[op] = mnemonic
+InsnFile.close()
+
+OriginalOrder.append('Op_illegal')
+
+
+Opcode['Op_zero' ] = (0, 0, False, 0, '-,-,-', 0, '', 'UNKNOWN')
+Opcode['Op_illegal'] = (0, 0, False, 0, '-,-,-', 0, '', 'ILLEGAL')
+Mnemonic['Op_zero' ] = 'ZERO'
+Mnemonic['Op_illegal'] = 'ILLEGAL'
+
+for op in OriginalOrder:
+ code, mask, signed, len, regspecs, Immed, action, assembly = Opcode[op]
+ tokens = re.split('[,()]', assembly)
+ format = assembly
+ params = ''
+ have_immed = None
+ while tokens:
+ t = tokens.pop(0)
+ if t == '':
+ break
+ if t == 'immed' or t == 'constant':
+ format = format.replace(t, '%d')
+ if t == 'immed':
+ have_immed = ', p->op.immed'
+ else:
+ have_immed = ', p->op_constant'
+ params += have_immed
+ elif t[0] == 'r' or t[0] == 'f':
+ format = format.replace(t, '%s')
+ if t[0] == 'f':
+ t = t.replace('f', 'r')
+ regs = 'regName'
+ t = t.replace('rd', 'p->op_rd')
+ t = t.replace('rs1', 'p->op_rs1')
+ t = t.replace('rs2', 'p->op.rs2')
+ t = t.replace('rs3', 'p->op.rs3')
+ t = t.replace('immed', 'p->op.immed')
+ t = t.replace('constant', 'p->op_constant')
+ params += ', '+regs+'['+t+']'
+ if have_immed:
+ format += ' [0x%x]'
+ params += have_immed
+ af.write(' case {:s}: n += sprintf(buf, \"{:s}\"{:s}); break;\n'.format(op, format, params))
+
+
+def ExpandField(x):
+ mo = ParamPattern.match(x)
+ if not mo:
+ return x
+ param, expr = mo.groups()
+ if not param in Field:
+ return x
+ pos, width = Field[param]
+# extract = '((ir>>{:d})&0x{:x})'.format(32-pos-width, 32-width)
+ extract = '((ir>>{:d})&0x{:x})'.format(pos, (1<>{:d})<<{:d})'.format(32-pos-width, 32-width, lo)
+ for (pos, hi, lo) in Immed:
+ width = hi-lo+1
+ mask = (2**width)-1
+ imm += '|(((ir>>{:d})&0x{:x})<<{:d})'.format(pos, mask, lo)
+ if assembly.find('constant') != -1:
+ KonstOp[op] = 1
+ rf.write("*p=fmtC({:s}, {:s}, {:s}, {:s})".format(op, reg[0], reg[1], imm))
+ else:
+ rf.write("*p=fmtR({:s}, {:s}, {:s}, {:s}, {:s}, {:s})".format(op, reg[0], reg[1], reg[2], reg[3], imm))
+ if (Opcode[op][3] == 2):
+ ShortOp.append(op)
+ else:
+ LongOp.append(op)
+ Opcode[op][4] = regspecs;
+ rf.write("; return; }\n")
+
+
+
+InOrder = [ 'Op_zero' ]
+
+# 1 short ops with long constants (cannot be memory)
+for op in ShortOp:
+ if op in KonstOp and op not in ReadOp and op not in WriteOp:
+ if op in ReadOp or op in WriteOp:
+ print("Short op ", op, "in KonstOp and MemOp!")
+ exit(1)
+ InOrder.append(op)
+ lastShortKonstOp = op
+# 2 short ops not memory read or write operations
+for op in ShortOp:
+ if op not in ReadOp and op not in WriteOp and op not in KonstOp:
+ InOrder.append(op)
+# 3 short ops that are memory read operations
+firstShortMemOp = None
+for op in ShortOp:
+ if op in ReadOp and op not in WriteOp and op not in KonstOp:
+ InOrder.append(op)
+ if firstShortMemOp == None:
+ firstShortMemOp = op
+# 4 short ops that are memory write or read-modify-write operations
+firstWriteOp = None
+for op in ShortOp:
+ if op in WriteOp and op not in KonstOp:
+ InOrder.append(op)
+ lastShortOp = op
+ if firstWriteOp == None:
+ firstWriteOp = op
+
+# 5 long ops that are memory write or read-modify-write operations
+for op in LongOp:
+ if op in WriteOp and op not in KonstOp:
+ InOrder.append(op)
+ lastWriteOp = op
+
+# 6 long ops that are memory read operations
+for op in LongOp:
+ if op in ReadOp and op not in WriteOp and op not in KonstOp:
+ InOrder.append(op)
+ lastLongMemOp = op
+
+# 7 long ops without long constants that do not have three operands
+for op in LongOp:
+ if op not in ThreeOp and op not in ReadOp and op not in WriteOp and op not in KonstOp:
+ InOrder.append(op)
+
+# 8 long ops without long constants that do have three operands
+firstThreeOp = None
+for op in LongOp:
+ if op in ThreeOp and op not in ReadOp and op not in WriteOp and op not in KonstOp:
+ InOrder.append(op)
+ if firstThreeOp == None:
+ firstThreeOp = op
+
+# 9 long ops with long constants
+firstLongKonstOp = None
+for op in LongOp:
+ if op in KonstOp and op not in ReadOp and op not in WriteOp:
+ InOrder.append(op)
+ if firstLongKonstOp == None:
+ firstLongKonstOp = op
+
+InOrder.append('Op_illegal')
+
+
+df.write('enum Opcode_t {')
+j = 0
+for op in InOrder:
+ if j % 4 == 0:
+ df.write('\n ')
+ df.write('{:>20s},'.format(op))
+ j += 1
+df.write('{:>20s},'.format('Number_of_opcodes'))
+df.write('\n};\n\n')
+
+df.write('#define validOp(op) (Op_zero < op && op < Op_illegal)\n')
+df.write('#define shortOp(op) (op <= {:s})\n'.format(lastShortOp))
+df.write('#define konstOp(op) (op <= {:s} || op >= {:s})\n'.format(lastShortKonstOp, firstLongKonstOp))
+df.write('#define memOp(op) ({:s} <= op && op <= {:s})\n'.format(firstShortMemOp, lastLongMemOp))
+df.write('#define writeOp(op) ({:s} <= op && op <= {:s})\n'.format(firstWriteOp, lastWriteOp))
+df.write('#define threeOp(op) (op >= {:s})\n'.format(firstThreeOp))
+df.write('\n\n')
+
+FunctionalUnits = []
+df.write('enum units_t {')
+for u in sorted(Flags):
+ if f == '-' or not u.islower():
+ continue
+ unit = 'Unit_'+u
+ FunctionalUnits.append(unit)
+ df.write(' {:s},\n'.format(unit))
+df.write(' {:s},\n'.format('Number_of_units'))
+df.write('\n};\n\n')
+
+
+val = 1
+for f in sorted(Flags):
+ if f == '-' or f.islower():
+ continue
+ df.write('#define attr_{:s} 0x{:08x}\n'.format(f, val))
+ val = val << 1
+
+# write opcodes_attr.h
+for i, op in enumerate(InOrder):
+ init = '{:16s} 0'.format('"'+Mnemonic[op]+'",')
+ flags = Opcode[op][4]
+ flags = flags.split(',')
+ flags = flags[0]
+ for letter in flags:
+ if letter == '-' or letter.islower():
+ continue
+ init += ' | attr_' + letter
+ unit = ''
+ for letter in flags:
+ if letter == '-' or not letter.islower():
+ continue
+ unit += 'Unit_' + letter
+ kf.write(' {{ {:s}, {:s} }},\n'.format(init, unit))
+
+
+for op in InOrder:
+ if op == 'Op_zero' or op == 'Op_illegal':
+ continue
+ code, mask, signed, len, regspecs, Immed, action, assembly = Opcode[op]
+ action = action.replace('rd', 'p->op_rd')
+ action = action.replace('rs1', 'p->op_rs1')
+ action = action.replace('rs2', 'p->op.rs2')
+ action = action.replace('rs3', 'p->op.rs3')
+ action = action.replace('immed', 'p->op.immed')
+ action = action.replace('constant', 'p->op_constant')
+ ef.write('case {:>20s}: {:s}; INCPC({:d}); break;\n'.format(op, action, len))
+
+af.close()
+df.close()
+rf.close()
+ef.close()
diff --git a/caveat/ecall.c b/caveat/ecall.c
new file mode 100644
index 0000000..8eccfeb
--- /dev/null
+++ b/caveat/ecall.c
@@ -0,0 +1,208 @@
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+//#include "encoding.h"
+
+//#define NO_FP_MACROS
+#include "caveat_fp.h"
+#include "arith.h"
+
+#include "caveat.h"
+#include "opcodes.h"
+#include "insn.h"
+#include "shmfifo.h"
+#include "core.h"
+#include "riscv-opc.h"
+#include "ecall_nums.h"
+
+//#define DEBUG
+
+
+static Addr_t emulate_brk(Addr_t addr, struct pinfo_t* info)
+{
+ Addr_t newbrk = addr;
+ if (addr < info->brk_min)
+ newbrk = info->brk_min;
+ else if (addr > info->brk_max)
+ newbrk = info->brk_max;
+
+ if (info->brk == 0)
+ info->brk = ROUNDUP(info->brk_min, RISCV_PGSIZE);
+
+ uintptr_t newbrk_page = ROUNDUP(newbrk, RISCV_PGSIZE);
+ if (info->brk > newbrk_page)
+ munmap((void*)newbrk_page, info->brk - newbrk_page);
+ else if (info->brk < newbrk_page)
+ assert(mmap((void*)info->brk, newbrk_page - info->brk, -1, MAP_FIXED|MAP_PRIVATE|MAP_ANONYMOUS, 0, 0) == (void*)info->brk);
+ info->brk = newbrk_page;
+
+ return newbrk;
+}
+
+
+int proxy_ecall( struct core_t* cpu )
+{
+ static long previous =0;
+ assert(insn(cpu->pc)->op_code == Op_ecall);
+ long rvnum = cpu->reg[17].l;
+ if (rvnum < 0 || rvnum >= rv_syscall_entries) {
+ no_mapping:
+ fprintf(stderr, "RISC-V system call %ld has no mapping to host system\n", rvnum);
+ fprintf(stderr, "Arguments(0x%lx, 0x%lx, 0x%lx, 0x%lx, 0x%lx, 0x%lx)\n",
+ cpu->reg[10].l, cpu->reg[11].l, cpu->reg[12].l, cpu->reg[13].l, cpu->reg[14].l, cpu->reg[15].l);
+ abort();
+ }
+ long sysnum = rv_to_host[rvnum].sysnum;
+#ifdef DEBUG
+ fprintf(stderr, "%10ld: %s[%ld:%ld](%lx, %lx, %lx, %lx, %lx, %lx)", cpu->counter.insn_executed-previous,
+ rv_to_host[rvnum].name, rvnum, sysnum,
+ cpu->reg[10].l, cpu->reg[11].l, cpu->reg[12].l, cpu->reg[13].l, cpu->reg[14].l, cpu->reg[15].l);
+ previous = cpu->counter.insn_executed;
+#endif
+ switch (sysnum) {
+ case -1:
+ goto no_mapping;
+ case -2:
+ fprintf(stderr, "RISCV-V system call %s(#%ld) not supported on host system\n", rv_to_host[rvnum].name, sysnum);
+ abort();
+
+#if 0
+ case 12: /* sys_brk */
+ cpu->reg[10].l = emulate_brk(cpu->reg[10].l, ¤t);
+ break;
+#endif
+
+ case 60: /* sys_exit */
+ case 231: /* sys_exit_group */\
+ return 1;
+
+ case 13: /* sys_rt_sigaction */
+ fprintf(stderr, "Trying to call rt_sigaction, always succeed without error.\n");
+ cpu->reg[10].l = 0; // always succeed without error
+ break;
+
+ case 56: /* sys_clone */
+ abort();
+
+ case 96: /* gettimeofday */
+#define PRETEND_MIPS 1000
+#ifdef PRETEND_MIPS
+ {
+ struct timeval tv;
+ tv.tv_sec = (cpu->counter.insn_executed / PRETEND_MIPS) / 1000000;
+ tv.tv_usec = (cpu->counter.insn_executed / PRETEND_MIPS) % 1000000;
+ tv.tv_sec += cpu->counter.start_timeval.tv_sec;
+ tv.tv_usec += cpu->counter.start_timeval.tv_usec;
+ tv.tv_sec += tv.tv_usec / 1000000; // microseconds overflow
+ tv.tv_usec %= 1000000;
+ // fprintf(stderr, "gettimeofday(sec=%ld, usec=%4ld)\n", tv.tv_sec, tv.tv_usec);
+ memcpy(cpu->reg[10].p, &tv, sizeof tv);
+ cpu->reg[10].l = 0;
+ }
+ break;
+#else
+ goto default_case;
+#endif
+
+ case 3: /* sys_close */
+ if (cpu->reg[10].l <= 2) { // Don't close stdin, stdout, stderr
+ cpu->reg[10].l = 0;
+ break;
+ }
+ goto default_case;
+
+ default:
+ default_case:
+ cpu->reg[10].l = syscall(sysnum, cpu->reg[10].l, cpu->reg[11].l, cpu->reg[12].l, cpu->reg[13].l, cpu->reg[14].l, cpu->reg[15].l);
+ break;
+ }
+#ifdef DEBUG
+ fprintf(stderr, " return %lx\n", cpu->reg[10].l);
+#endif
+ return 0;
+}
+
+
+static void set_csr( struct core_t* cpu, int which, long val )
+{
+ switch (which) {
+ case CSR_USTATUS:
+ cpu->state.ustatus = val;
+ return;
+ case CSR_FFLAGS:
+ cpu->state.fcsr.flags = val;
+#ifdef SOFT_FP
+ softfloat_exceptionFlags = val;
+#else
+#endif
+ return;
+ case CSR_FRM:
+ cpu->state.fcsr.rmode = val;
+ break;
+ case CSR_FCSR:
+ cpu->state.fcsr_v = val;
+ break;
+ default:
+ fprintf(stderr, "Unsupported set_csr(%d, val=%lx)\n", which, val);
+ abort();
+ }
+#ifdef SOFT_FP
+ softfloat_roundingMode = cpu->state.fcsr.rmode;
+#else
+ fesetround(riscv_to_c_rm(cpu->state.fcsr.rmode));
+#endif
+}
+
+static long get_csr( struct core_t* cpu, int which )
+{
+ switch (which) {
+ case CSR_USTATUS:
+ return cpu->state.ustatus;
+ case CSR_FFLAGS:
+#ifdef SOFT_FP
+ cpu->state.fcsr.flags = softfloat_exceptionFlags;
+#else
+#endif
+ return cpu->state.fcsr.flags;
+ case CSR_FRM:
+ return cpu->state.fcsr.rmode;
+ case CSR_FCSR:
+ return cpu->state.fcsr_v;
+ default:
+ fprintf(stderr, "Unsupported get_csr(%d)\n", which);
+ abort();
+ }
+}
+
+void proxy_csr( struct core_t* cpu, const struct insn_t* p, int which )
+{
+ enum Opcode_t op = p->op_code;
+ int regop = op==Op_csrrw || op==Op_csrrs || op==Op_csrrc;
+ long old_val = 0;
+ long value = regop ? p->op_rs1 : p->op_constant>>12;
+ if (op==Op_csrrw || op==Op_csrrwi) {
+ if (p->op_rd != 0)
+ old_val = get_csr(cpu, which);
+ set_csr(cpu, which, value);
+ }
+ else {
+ old_val = get_csr(cpu, which);
+ if (regop || value != 0) {
+ if (op==Op_csrrs || op==Op_csrrsi)
+ value = old_val | value;
+ else
+ value = old_val & ~value;
+ set_csr(cpu, which, value);
+ }
+ }
+ cpu->reg[p->op_rd].l = old_val;
+}
diff --git a/caveat/elf_loader.c b/caveat/elf_loader.c
new file mode 100644
index 0000000..fe298e5
--- /dev/null
+++ b/caveat/elf_loader.c
@@ -0,0 +1,300 @@
+/*
+ Copyright (c) 2020 Peter Hsu. All Rights Reserved. See LICENCE file for details.
+*/
+
+//#include "config.h"
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+// BFD files pulled from riscv-gnu-toolchain
+//#include "bfd.h"
+//#include "ansidecl.h"
+//#include "elf.h"
+
+#include "caveat.h"
+#include "opcodes.h"
+#include "insn.h"
+
+
+
+#define MEM_END 0x60000000L
+#define STACK_SIZE 0x01000000L
+#define BRK_SIZE 0x01000000L
+
+struct pinfo_t current;
+
+
+static long phdrs[128];
+
+static char* strtbl;
+static Elf64_Sym* symtbl;
+static long num_syms;
+
+
+#define MAX(a, b) ((a) > (b) ? (a) : (b))
+#define MIN(a, b) ((a) < (b) ? (a) : (b))
+#define CLAMP(a, lo, hi) MIN(MAX(a, lo), hi)
+
+
+
+/**
+ * Get an annoymous memory segment using mmap() and load
+ * from file at offset. Return 0 if fail.
+ */
+static void* load_elf_section(int file, ssize_t offset, ssize_t size)
+{
+ void* where = mmap(0, size, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_ANONYMOUS, -1, 0);
+ if (where == 0)
+ return 0;
+ ssize_t ret = lseek(file, offset, SEEK_SET);
+ if (ret < 0)
+ return 0;
+ ret = read(file, where, size);
+ if (ret < size)
+ return 0;
+ return where;
+}
+
+/**
+ * The protection flags are in the p_flags section of the program header.
+ * But rather annoyingly, they are the reverse of what mmap expects.
+ */
+static inline int get_prot(uint32_t p_flags)
+{
+ int prot_x = (p_flags & PF_X) ? PROT_EXEC : PROT_NONE;
+ int prot_w = (p_flags & PF_W) ? PROT_WRITE : PROT_NONE;
+ int prot_r = (p_flags & PF_R) ? PROT_READ : PROT_NONE;
+ return (prot_x | prot_w | prot_r);
+}
+
+
+Addr_t load_elf_binary( const char* file_name, int include_data )
+/* file_name - name of ELF binary, must be statically linked for now
+ include_data - 1=load DATA and BSS segments, 0=load TEXT only
+ returns entry point address */
+{
+ current.phdr = (uint64_t)phdrs;
+ current.phdr_size = sizeof(phdrs);
+ struct pinfo_t* info = ¤t;
+ int flags = MAP_FIXED | MAP_PRIVATE;
+ ssize_t ehdr_size;
+ size_t phdr_size;
+ long number_of_insn;
+ Addr_t stack_lowest;
+ size_t tblsz;
+ char* shstrtbl;
+ ssize_t ret;
+
+ int file = open(file_name, O_RDONLY, 0);
+ quitif(file<0, "Unable to open binary file \"%s\"\n", file_name);
+
+ Elf64_Ehdr eh;
+ ehdr_size = read(file, &eh, sizeof(eh));
+ quitif(ehdr_size < (ssize_t)sizeof(eh) ||
+ !(eh.e_ident[0] == '\177' && eh.e_ident[1] == 'E' &&
+ eh.e_ident[2] == 'L' && eh.e_ident[3] == 'F'),
+ "Elf header not correct");
+ phdr_size = eh.e_phnum * sizeof(Elf64_Phdr);
+ quitif(phdr_size > info->phdr_size, "Phdr too big");
+
+ dieif(lseek(file, eh.e_shoff, SEEK_SET) < 0, "lseek failed");
+ dieif(read(file, (void*)info->phdr, phdr_size) != (ssize_t)phdr_size, "read(phdr) failed");
+ info->phnum = eh.e_phnum;
+ info->phent = sizeof(Elf64_Phdr);
+ Elf64_Phdr* ph = (Elf64_Phdr*)load_elf_section(file, eh.e_phoff, phdr_size);
+ dieif(ph==0, "cannot load phdr");
+ info->phdr = (size_t)ph;
+
+ // don't load dynamic linker at 0, else we can't catch NULL pointer derefs
+ uintptr_t bias = 0;
+ if (eh.e_type == ET_DYN)
+ bias = RISCV_PGSIZE;
+
+ info->entry = eh.e_entry + bias;
+ for (int i = eh.e_phnum - 1; i >= 0; i--) {
+ quitif(ph[i].p_type==PT_INTERP, "Not a statically linked ELF program");
+ if(ph[i].p_type == PT_LOAD && ph[i].p_memsz) {
+ uintptr_t prepad = ph[i].p_vaddr % RISCV_PGSIZE;
+ uintptr_t vaddr = ph[i].p_vaddr + bias;
+ if (vaddr + ph[i].p_memsz > info->brk_min)
+ info->brk_min = vaddr + ph[i].p_memsz;
+ int flags2 = flags | (prepad ? MAP_POPULATE : 0);
+ int prot = get_prot(ph[i].p_flags);
+ void* rc = mmap((void*)(vaddr-prepad), ph[i].p_filesz + prepad, prot | PROT_WRITE, flags2, file, ph[i].p_offset - prepad);
+ dieif(rc != (void*)(vaddr-prepad), "mmap(0x%ld) returned %p\n", (vaddr-prepad), rc);
+ memset((void*)(vaddr-prepad), 0, prepad);
+ if (!(prot & PROT_WRITE))
+ dieif(mprotect((void*)(vaddr-prepad), ph[i].p_filesz + prepad, prot), "Could not mprotect()\n");
+ size_t mapped = ROUNDUP(ph[i].p_filesz + prepad, RISCV_PGSIZE) - prepad;
+ if (ph[i].p_memsz > mapped)
+ dieif(mmap((void*)(vaddr+mapped), ph[i].p_memsz - mapped, prot, flags|MAP_ANONYMOUS, 0, 0) != (void*)(vaddr+mapped), "Could not mmap()\n");
+ }
+ info->brk_max = info->brk_min + BRK_SIZE;
+ }
+
+ /* Read section header string table. */
+ Elf64_Shdr header;
+ assert(lseek(file, eh.e_shoff + eh.e_shstrndx * sizeof(Elf64_Shdr), SEEK_SET) >= 0);
+ assert(read(file, &header, sizeof header) >= 0);
+ shstrtbl = (char*)load_elf_section(file, header.sh_offset, header.sh_size);
+ assert(shstrtbl);
+ /*
+ * Loop through section headers:
+ * 1. load string table and symbol table
+ * 2. zero out BSS and SBSS segments
+ * 3. find lower and upper bounds of executable instructions
+ */
+ uintptr_t low_bound = 0-1;
+ uintptr_t high_bound = 0;
+ for (int i=0; i= 0);
+ assert(read(file, &header, sizeof header) >= 0);
+ if (strcmp(shstrtbl+header.sh_name, ".bss") == 0 ||
+ strcmp(shstrtbl+header.sh_name, ".sbss") == 0) {
+ memset((void*)header.sh_addr, 0, header.sh_size);
+ }
+ if (strcmp(shstrtbl+header.sh_name, ".strtab") == 0) {
+ strtbl = (char*)load_elf_section(file, header.sh_offset, header.sh_size);
+ dieif(strtbl==0, "could not load string table");
+ }
+ if (strcmp(shstrtbl+header.sh_name, ".symtab") == 0) {
+ symtbl = (Elf64_Sym*)load_elf_section(file, header.sh_offset, header.sh_size);
+ dieif(symtbl==0, "could not read symbol table");
+ num_syms = header.sh_size / sizeof(Elf64_Sym);
+ }
+ /* find bounds of instruction segment */
+ if (header.sh_flags & SHF_EXECINSTR) {
+ if (header.sh_addr < low_bound)
+ low_bound = header.sh_addr;
+ if (header.sh_addr+header.sh_size > high_bound)
+ high_bound = header.sh_addr+header.sh_size;
+ }
+ }
+ insnSpace.base = low_bound;
+ insnSpace.bound = high_bound;
+ // fprintf(stderr, "Text segment [0x%lx, 0x%lx)\n", low_bound, high_bound);
+ //insnSpace_init(low_bound, high_bound);
+ close(file);
+
+ // info->stack_top = MEM_END + 0x1000;
+ info->stack_top = MEM_END;
+ stack_lowest = (Addr_t)mmap((void*)(info->stack_top-STACK_SIZE), STACK_SIZE, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_ANONYMOUS, -1, 0);
+ dieif(stack_lowest != info->stack_top-STACK_SIZE, "Could not allocate stack\n");
+
+ return current.entry;
+}
+
+
+Addr_t initialize_stack(int argc, const char** argv, const char** envp)
+{
+// fprintf(stderr, "current.stack_top=%lx, phdr_size=%lx\n", current.stack_top, current.phdr_size);
+
+ // copy phdrs to user stack
+ size_t stack_top = current.stack_top - current.phdr_size;
+ memcpy((void*)stack_top, (void*)current.phdr, current.phdr_size);
+ current.phdr = stack_top;
+
+ // copy argv to user stack
+ for (size_t i = 0; i < argc; i++) {
+ size_t len = strlen((char*)(uintptr_t)argv[i])+1;
+ stack_top -= len;
+ memcpy((void*)stack_top, (void*)(uintptr_t)argv[i], len);
+ argv[i] = (char*)stack_top;
+ }
+
+ // copy envp to user stack
+ size_t envc = sizeof(envp) / sizeof(envp[0]);
+ for (size_t i = 0; i < envc; i++) {
+ size_t len = strlen(envp[i]) + 1;
+ stack_top -= len;
+ memcpy((void*)stack_top, envp[i], len);
+ envp[i] = (char*)stack_top;
+ }
+
+ // align stack
+ stack_top &= -sizeof(void*);
+
+// fprintf(stderr, "AT_RANDOM = stack_top = 0x%016lx\n", stack_top);
+
+ struct {
+ long key;
+ size_t value;
+ } aux[] = {
+ {AT_ENTRY, current.entry},
+ {AT_PHNUM, (size_t)current.phnum},
+ {AT_PHENT, (size_t)current.phent},
+ {AT_PHDR, current.phdr},
+ {AT_PAGESZ, RISCV_PGSIZE},
+ {AT_SECURE, 0},
+ {AT_RANDOM, stack_top},
+ {AT_NULL, 0}
+ };
+
+ // place argc, argv, envp, auxp on stack
+ #define PUSH_ARG(type, value) do { \
+ *((type*)sp) = (type)value; \
+ sp += sizeof(type); \
+ } while (0)
+
+ unsigned naux = sizeof(aux)/sizeof(aux[0]);
+ stack_top -= (1 + argc + 1 + envc + 1 + 2*naux) * sizeof(uintptr_t);
+ stack_top &= -16;
+ long sp = stack_top;
+ PUSH_ARG(uintptr_t, argc);
+ for (unsigned i = 0; i < argc; i++)
+ PUSH_ARG(uintptr_t, argv[i]);
+ PUSH_ARG(uintptr_t, 0); /* argv[argc] = NULL */
+ for (unsigned i = 0; i < envc; i++)
+ PUSH_ARG(uintptr_t, envp[i]);
+ PUSH_ARG(uintptr_t, 0); /* envp[envc] = NULL */
+ for (unsigned i = 0; i < naux; i++) {
+ PUSH_ARG(uintptr_t, aux[i].key);
+ PUSH_ARG(uintptr_t, aux[i].value);
+ }
+
+ current.stack_top = stack_top;
+ return stack_top;
+}
+
+
+int find_symbol( const char* name, Addr_t* begin, Addr_t* end )
+{
+ if (strtbl) {
+ for (int i=0; i
+#include
+#include
+#include
+#include
+#include
+
+#include "caveat.h"
+#include "caveat_fp.h"
+#include "arith.h"
+#include "opcodes.h"
+#include "insn.h"
+#include "shmfifo.h"
+#include "core.h"
+
+
+#define trace_mem(code, a) 0
+#define trace_bbk(code, v)
+#define advance(sz)
+#define restart()
+#define on_every_insn(p)
+#define update_regfile(rd, val)
+
+#define amo_lock_begin
+#define amo_lock_end
+
+
+void fast_sim( struct core_t* cpu, long max_count )
+{
+ assert(max_count > 0);
+ register long countdown = max_count;
+ register Addr_t PC = cpu->pc;
+
+#include "sim_body.h"
+
+}
diff --git a/caveat/insn.c b/caveat/insn.c
new file mode 100644
index 0000000..e426897
--- /dev/null
+++ b/caveat/insn.c
@@ -0,0 +1,217 @@
+/*
+ Copyright (c) 2020 Peter Hsu. All Rights Reserved. See LICENCE file for details.
+*/
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "caveat.h"
+#include "opcodes.h"
+#include "insn.h"
+
+
+struct insnAttr_t insnAttr[] = {
+#include "opcodes_attr.h"
+};
+
+struct insnSpace_t insnSpace;
+
+const char* regName[] = {
+ "zero", "ra", "sp", "gp", "tp", "t0", "t1", "t2",
+ "s0", "s1", "a0", "a1", "a2", "a3", "a4", "a5",
+ "a6", "a7", "s2", "s3", "s4", "s5", "s6", "s7",
+ "s8", "s9", "s10", "s11", "t3", "t4", "t5", "t6",
+ "ft0", "ft1", "ft2", "ft3", "ft4", "ft5", "ft6", "ft7",
+ "fs0", "fs1", "fa0", "fa1", "fa2", "fa3", "fa4", "fa5",
+ "fa6", "fa7", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7",
+ "fs8", "fs9", "fs10", "fs11", "ft8", "ft9", "ft10", "ft11",
+ "NOT"
+};
+
+
+void insnSpace_init()
+{
+ dieif(insnSpace.base==0, "insnSpace_init() base, bound not initialized");
+ assert(insnSpace.base < insnSpace.bound);
+
+ long nelts = (insnSpace.bound - insnSpace.base) / 2;
+ insnSpace.insn_array = (struct insn_t*)mmap(0, nelts*sizeof(struct insn_t), PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_ANONYMOUS, -1, 0);
+ assert(insnSpace.insn_array);
+ memset(insnSpace.insn_array, 0, nelts*sizeof(struct insn_t));
+ for (Addr_t pc=insnSpace.base; pcop_code = Op_illegal; // no match
+ return;
+}
+
+
+int format_pc(char* buf, int width, Addr_t pc)
+{
+ if (valid_pc(pc)) {
+ const char* func;
+ long offset;
+ if (find_pc(pc, &func, &offset)) {
+ snprintf(buf, width, "%21s", func);
+ snprintf(buf+21, width, "+%-5ld ", offset);
+ }
+ else
+ snprintf(buf, width, "%21s %5s ", "UNKNOWN", "");
+ }
+ else
+ snprintf(buf, width, "%21s %-5s ", "INVALID", "");
+ return strlen(buf);
+}
+
+void print_pc( long pc, FILE* f)
+{
+ char buf[1024];
+ format_pc(buf, 29, pc);
+ fprintf(f, "%-28s", buf);
+}
+
+
+
+int format_insn(char* buf, const struct insn_t* p, Addr_t pc, unsigned int image)
+{
+ int n;
+ if (shortOp(p->op_code))
+ n = sprintf(buf, "%8lx %04x %-16s", pc, image&0xffff, insnAttr[p->op_code].name);
+ else
+ n = sprintf(buf, "%8lx %08x %-16s", pc, image, insnAttr[p->op_code].name);
+ buf += n;
+ switch (p->op_code) {
+#include "disasm_insn.h"
+ }
+ return n;
+}
+
+void print_insn(Addr_t pc, FILE* f)
+{
+ char buf[1024];
+ format_insn(buf, insn(pc), pc, *((unsigned int*)pc));
+ fprintf(f, "%s\n", buf);
+}
+
+
+
+void print_registers(struct reg_t reg[], FILE* f)
+{
+ char buf[1024];
+ for (int i=0; i<64; i++) {
+ fprintf(f, "%-4s: 0x%016lx ", regName[i], reg[i].ul);
+ if ((i+1) % 4 == 0)
+ fprintf(f, "\n");
+ }
+}
+
+
+static struct options_t* opt_ptr;
+static const char* usage_ptr;
+
+void help_exit()
+{
+ fprintf(stderr, "Usage : %s\n", usage);
+ for (int i=0; opt[i].name; ++i) {
+ int len = strlen(opt[i].name);
+ fprintf(stderr, " %-14s %s ", opt[i].name, opt[i].h);
+ if (opt[i].name[len-2] == '=')
+ switch (opt[i].name[len-1]) {
+ case 's':
+ if (opt[i].ds)
+ fprintf(stderr, "[%s]\n", opt[i].ds);
+ else
+ fprintf(stderr, "[none]\n");
+ break;
+ case 'i':
+ fprintf(stderr, "[%ld]\n", opt[i].di);
+ break;
+ default:
+ fprintf(stderr, "Bad option %s\n", opt[i].name);
+ exit(0);
+ }
+ else
+ fprintf(stderr, "\n");
+ }
+ exit(0);
+}
+
+
+int parse_options(const char** argv)
+{
+ /* initialize default values */
+ for (int i=0; opt[i].name; ++i) {
+ int len = strlen(opt[i].name) - 1;
+ if (opt[i].name[len-1] == '=')
+ switch (opt[i].name[len]) {
+ case 's': *opt[i].s = opt[i].ds; break;
+ case 'i': *opt[i].i = opt[i].di; break;
+ default: fprintf(stderr, "Bad option %s\n", opt[i].name); exit(0);
+ }
+ else
+ *opt[i].b = 0; /* flag not given */
+ }
+ /* parse options */
+ int numargs = 0;
+ while (argv[numargs] && argv[numargs][0]=='-') {
+ const char* arg = argv[numargs++];
+ if (strcmp(arg, "--help") == 0)
+ help_exit();
+ for (int i=0; opt[i].name; ++i) {
+ int len = strlen(opt[i].name) - 1;
+ if (opt[i].name[len-1] == '=') {
+ if (strncmp(opt[i].name, arg, len-1) == 0) {
+ switch (opt[i].name[len]) {
+ case 's': *opt[i].s = (arg+len); break;
+ case 'i': *opt[i].i = atoi(arg+len); break;
+ }
+ goto next_option;
+ }
+ }
+ else if (strcmp(arg, opt[i].name) == 0) {
+ *opt[i].b = opt[i].bv;
+ goto next_option;
+ }
+ }
+ fprintf(stderr, "Illegal option %s\n", arg);
+ exit(1);
+ next_option:
+ ;
+ }
+ return numargs;
+}
diff --git a/caveat/insn.h b/caveat/insn.h
new file mode 100644
index 0000000..9089d2b
--- /dev/null
+++ b/caveat/insn.h
@@ -0,0 +1,175 @@
+/*
+ Copyright (c) 2020 Peter Hsu. All Rights Reserved. See LICENCE file for details.
+*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+#define RISCV_PGSHIFT 12
+#define RISCV_PGSIZE (1 << RISCV_PGSHIFT)
+
+#define ROUNDUP(a, b) ((((a)-1)/(b)+1)*(b))
+#define ROUNDDOWN(a, b) ((a)/(b)*(b))
+
+
+typedef long Addr_t;
+#define GEN_SEGV (*((char*)0) = 0)
+
+
+struct reg_t {
+ union {
+ int64_t l;
+ uint64_t ul;
+ int32_t i;
+ uint32_t ui;
+ double d;
+ float f;
+ void* p;
+ Addr_t a;
+#ifdef SOFT_FP
+ float32_t f32;
+ float64_t f64;
+#endif
+ };
+};
+
+struct insn_t {
+ enum Opcode_t op_code : 16;
+ uint8_t op_rd; // 0..31 = integer registers
+ uint8_t op_rs1; // 32..63 = floating point registers
+ union {
+ int32_t op_constant;
+ struct {
+ int16_t immed;
+ uint8_t rs2; // 64 = not valid
+ uint8_t rs3; // only for floating multiply-add
+ } op;
+ };
+};
+
+#define ZERO 0 // Register x0 always zero
+#define RA 1 // Standard RISC-V ABI convention
+#define SP 2
+#define GP 3
+#define TP 4
+#define NOREG 64
+
+
+struct insnAttr_t {
+ const char* name; /* asserbler opcode */
+ unsigned int flags; /* upper case, from Instructions.def */
+ enum units_t unit : 8; /* lower case, functional units */
+ unsigned char latency; /* filled in by simulator */
+};
+
+
+struct insnSpace_t {
+ struct insn_t* insn_array;
+ Addr_t base, bound;
+};
+
+
+/* Process information */
+struct pinfo_t {
+ long phnum;
+ long phent;
+ long phdr;
+ long phdr_size;
+ Addr_t entry;
+ Addr_t stack_top;
+ Addr_t brk;
+ Addr_t brk_min;
+ Addr_t brk_max;
+};
+
+extern struct pinfo_t current;
+
+
+extern struct insnSpace_t insnSpace;
+extern struct insnAttr_t insnAttr[]; /* Attribute array indexed by Opcode_t */
+extern const char* regName[];
+
+
+
+void insnSpace_init();
+void decode_instruction( const struct insn_t* p, Addr_t PC );
+
+Addr_t load_elf_binary( const char* file_name, int include_data );
+Addr_t initialize_stack( int argc, const char** argv, const char** envp );
+int find_symbol( const char* name, Addr_t* begin, Addr_t* end );
+int find_pc( long pc, const char** name, long* offset );
+
+
+#define insn(pc) ( &insnSpace.insn_array[(pc-insnSpace.base)/2] )
+
+static inline int valid_pc(Addr_t pc)
+{
+ return insnSpace.base <= pc && pc < insnSpace.bound;
+}
+
+static inline void insert_breakpoint(Addr_t pc)
+{
+ assert(valid_pc(pc));
+ struct insn_t* p = &insnSpace.insn_array[(pc-insnSpace.base)/2];
+ if (shortOp(p->op_code))
+ p->op_code = Op_c_ebreak;
+ else
+ p->op_code = Op_ebreak;
+}
+
+
+int find_symbol( const char* name, long* begin_addr, long* end_addr);
+/*
+ returns TRUE or FALSE found in ELF symbol table
+ name - function or variable
+ begin_addr - pointer to where addresses will be written
+ end_addr - writes NULL if symbol not found
+*/
+
+
+void print_symbol( long address, FILE* output_file );
+/*
+ Prints address as name+hex
+ address - in text or data segment
+ output_file - writes to this file
+*/
+
+int format_pc(char* buf, int width, Addr_t pc);
+
+
+void print_pc( long pc, FILE* output_file );
+/*
+ Print symbolic program counter
+ pc - program counter in text segment
+ file_descr - write to this file descriptor
+*/
+
+int format_insn( char* buf, const struct insn_t* p, long pc, unsigned int image );
+/*
+ Disassemble instruction into buffer
+ returns length of string in buf
+ buf - buffer to hold disassembled text
+ p - must be insn(pc)
+ pc - program counter in text segment
+*/
+
+void print_insn( long address, FILE* output_file );
+/*
+ Disassemble instruction and print
+ address - program counter in text segment
+ file_descr - write to this file descriptor
+*/
+
+void print_registers( struct reg_t regs[], FILE* output_file );
+/*
+ Print register files
+ regs - register files, IR+FR
+ file_descr - write to this file descriptor
+*/
+
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/caveat/main.c b/caveat/main.c
new file mode 100644
index 0000000..48ddca5
--- /dev/null
+++ b/caveat/main.c
@@ -0,0 +1,114 @@
+/*
+ Copyright (c) 2020 Peter Hsu. All Rights Reserved. See LICENCE file for details.
+*/
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "caveat.h"
+#include "opcodes.h"
+#include "insn.h"
+#include "shmfifo.h"
+#include "core.h"
+
+
+#define DEFAULT_REPORT_INTERVAL 1000
+
+
+struct core_t core;
+
+const char* tracing;
+static long bufsize;
+static const char* func;
+
+const struct options_t opt[] =
+ {
+ { "--out=s", .s=&tracing, .ds=0, .h="Create trace file/fifo =name" },
+ { "--trace=s", .s=&tracing, .ds=0, .h="synonym for --out" },
+ { "--buffer=i", .i=&bufsize, .di=12, .h="Shared memory buffer size is 2^ =n bytes" },
+ { "--func=s", .s=&func, .ds="_start", .h="Trace function =name" },
+ { "--withregs", .b=&core.params.flags, .bv=tr_has_reg, .h="Include register values in trace" },
+ { "--after=i", .i=&core.params.after, .di=1, .h="Start tracing function after =number calls" },
+ { "--every=i", .i=&core.params.every, .di=1, .h="Trace only every =number times function is called" },
+ { "--skip=i", .i=&core.params.skip, .di=1, .h="Trace function once every =number times called" },
+ { "--report=i", .i=&core.params.report, .di=1000, .h="Progress report every =number million instructions" },
+ { "--quiet", .b=&core.params.quiet, .bv=1, .h="Don't report progress to stderr" },
+ { "-q", .b=&core.params.quiet, .bv=1, .h="short for --quiet" },
+ { 0 }
+ };
+const char* usage = "caveat [caveat-options] target-program [target-options]";
+
+int main(int argc, const char* argv[], const char* envp[])
+{
+ struct timeval start_timeval;
+ gettimeofday(&start_timeval, 0);
+ init_core(&core, clock(), &start_timeval);
+
+ int numopts = parse_options(argv+1);
+ if (argc == numopts+1)
+ help_exit();
+ core.params.report *= 1000000; /* unit is millions of instructions */
+ Addr_t entry_pc = load_elf_binary(argv[1+numopts], 1);
+ insnSpace_init();
+ Addr_t stack_top = initialize_stack(argc-1-numopts, argv+1+numopts, envp);
+ core.pc = entry_pc;
+ core.reg[SP].a = stack_top;
+ if (tracing) {
+ if (!func)
+ func = "_start";
+ if (! find_symbol(func, &core.params.breakpoint, 0)) {
+ fprintf(stderr, "function %s cannot be found in symbol table\n", func);
+ exit(1);
+ }
+ fprintf(stderr, "Tracing %s at 0x%lx\n", func, core.params.breakpoint);
+ core.params.flags |= tr_has_pc | tr_has_mem;
+ core.tb = fifo_create(tracing, bufsize);
+ }
+ else
+ core.params.breakpoint = 0;
+ int rc = run_program(&core);
+ if (tracing) {
+ fifo_put(core.tb, trM(tr_eof, 0));
+ fifo_finish(core.tb);
+ }
+ return rc;
+}
+
+#include
+#include
+
+jmp_buf return_to_top_level;
+
+void signal_handler(int nSIGnum, siginfo_t* si, void* vcontext)
+{
+// ucontext_t* context = (ucontext_t*)vcontext;
+// context->uc_mcontext.gregs[]
+ fprintf(stderr, "\n\nSegV %p\n", si->si_addr);
+ longjmp(return_to_top_level, 1);
+}
+
+int run_program(struct core_t* cpu)
+{
+ struct sigaction action;
+ memset(&action, 0, sizeof(struct sigaction));
+ sigemptyset(&action.sa_mask);
+ sigemptyset(&action.sa_mask);
+// action.sa_flags = SA_SIGINFO;
+ action.sa_sigaction = signal_handler;
+ action.sa_flags = 0;
+
+ sigaction(SIGSEGV, &action, NULL);
+ if (setjmp(return_to_top_level) != 0) {
+ //fprintf(stderr, "Back to main\n");
+ print_insn(cpu->pc, stderr);
+ print_registers(cpu->reg, stderr);
+ return -1;
+ }
+ return outer_loop(&core);
+}
+
diff --git a/caveat/make_ecall_tbl.py b/caveat/make_ecall_tbl.py
new file mode 100644
index 0000000..6ae34c5
--- /dev/null
+++ b/caveat/make_ecall_tbl.py
@@ -0,0 +1,64 @@
+#
+# Copyright (c) 2020 Peter Hsu. All Rights Reserved. See LICENCE file for details.
+#
+
+import re
+import os
+
+PKpattern = re.compile(r'#define\s+SYS_(\S+)\s+(\d+)')
+RVpattern = re.compile(r'#define\s+TARGET_NR_(\S+)\s+(\d+)')
+
+# Algorith is we make table of RISC-V system call names and record
+# their numbers, create a C file of names, include the host x86
+# 'asm/unistd_64.h' file to get the correct mapping.
+
+ecall = {}
+enames = {}
+highest = -1
+rv = open('../include/pk-syscall.h', 'r')
+for line in rv:
+ m = PKpattern.match(line)
+ if m:
+ name, num = m.groups()
+ num = int(num)
+ ecall[num] = name
+ enames[name] = num
+ highest = max(num, highest)
+rv.close()
+
+rv = open('../include/syscall64_nr.h', 'r')
+for line in rv:
+ m = RVpattern.match(line)
+ if m:
+ name, num = m.groups()
+ num = int(num)
+ if num in ecall and name != ecall[num]:
+ print('libc {:s} override pk {:s} ecall'.format(name, ecall[num]))
+ ecall[num] = name
+ enames[name] = num
+ highest = max(num, highest)
+
+en = open('ecall_nums.h', 'w')
+
+for name in sorted(enames.keys()):
+ en.write('#ifndef __NR_{:s}\n'.format(name))
+ en.write('#define __NR_{:s} -2\n'.format(name))
+ en.write('#endif\n')
+
+en.write("""\n
+static const struct {
+ int sysnum;
+ const char*name;
+} rv_to_host[] = {
+""")
+
+for n in range(0, highest+1):
+ if n in ecall:
+ name = ecall[n]
+ en.write(' /* {:5d} */ {{ __NR_{:s}, "{:s}" }},\n'.format(n, name, name))
+ else:
+ en.write(' /* {:5d} */ {{ -1, 0 }},\n'.format(n))
+
+en.write('};\n\n')
+en.write('const int rv_syscall_entries = {:d};\n\n'.format(highest+1))
+en.close()
diff --git a/caveat/selectFP b/caveat/selectFP
new file mode 100755
index 0000000..9f2de36
--- /dev/null
+++ b/caveat/selectFP
@@ -0,0 +1,60 @@
+#!/usr/bin/python3
+#
+# Copyright (c) 2020 Peter Hsu. All Rights Reserved. See LICENCE file for details.
+#
+
+
+import sys
+import re
+
+FPdef = open('FPoperations.def', 'r')
+f = open('caveat_fp.h', 'w')
+
+if sys.argv[1] == 'soft':
+ f.write('#define SOFT_FP\n')
+elif sys.argv[1] == 'hard':
+ f.write('// Do not define SOFT_FP\n')
+else:
+ print('Bad Argument', sys.argv[1])
+ exit(-1)
+f.write('#ifndef NO_FP_MACROS\n')
+
+for line in FPdef:
+ line = line.rstrip('\r\n')
+# print(line)
+ if line == '' or line[0] != '@':
+ continue
+ (macro, rm, fpx, soft, type, hard) = re.split('\t+', line)
+ macro = macro[1:]
+ macro_dyn = re.sub('\(\s*rm,\s*', '_dyn(', macro)
+# funcs = [ 'f32', 'f64', 'nf32', 'nf64', 'i32', 'ui32', 'i64', 'ui64' ]
+# for x in funcs:
+# soft = soft.replace('.'+x, '.'+x+'()')
+# funcs = [ 'l', 'ul', 'i', 'ui', 'd', 'f' ]
+# for x in funcs:
+# hard = hard.replace('.'+x, '.'+x)
+# hard = hard.replace('.'+x, '.'+x+'()')
+ if (sys.argv[1] == 'soft'):
+ (srm, fpx) = ('', '')
+ if rm != '-':
+ srm = ' SRM(rm);'
+ rrm = ' SRM(cpu->state.fcsr.rmode);'
+ if fpx != '-':
+ fpx = ' SET_FPX;'
+ f.write('#define {:s}{:s} {:s};{:s}{:s}\n'.format(macro, srm, soft, fpx, rrm))
+ if rm != '-':
+ f.write('#define {:s} {:s};{:s}\n'.format(macro_dyn, soft, fpx))
+ elif (sys.argv[1] == 'hard'):
+ (srm, rrm, fpx) = ('', '', '')
+ if rm != '-':
+ srm = ' SRM(rm);'
+ rrm = ' RRM(rm);'
+ if fpx != '-':
+ fpx = ' SET_FPX;'
+ f.write('#define {:s}{:s} {:s};{:s}{:s}\n'.format(macro, srm, hard, fpx, rrm))
+ if rm != '-':
+ f.write('#define {:s} {:s};{:s}\n'.format(macro_dyn, hard, fpx))
+
+f.write('#endif\n')
+f.close()
+FPdef.close()
diff --git a/caveat/shmfifo.c b/caveat/shmfifo.c
new file mode 100644
index 0000000..0361199
--- /dev/null
+++ b/caveat/shmfifo.c
@@ -0,0 +1,96 @@
+/*
+ Copyright (c) 2020 Peter Hsu. All Rights Reserved. See LICENCE file for details.
+*/
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+
+#include "shmfifo.h"
+#include "caveat.h"
+
+
+
+#define DEFAULT_BUFSIZE 12
+
+
+/* Producer side fifo initialization.
+ bufid - number = file descriptor (already opened)
+ $name = shared memory segment /dev/shm/name
+ otherwise = trace file path name
+ bufsize - log-base-2 number of bytes
+*/
+struct fifo_t* fifo_create( const char* bufid, int bufsize )
+{
+ // assert(sizeof(struct fifo_t) == 2*64);
+ if (bufsize == 0)
+ bufsize = DEFAULT_BUFSIZE;
+ assert(bufsize > 3);
+ int fd = shm_open(bufid, O_CREAT|O_TRUNC|O_RDWR, S_IRWXU);
+ dieif(fd<0, "shm_open() failed in fifo_create");
+ size_t fsize = (1<size = bufsize;
+ fifo->fd = fd;
+ fifo->get_mask = fifo->put_mask = (1<<(bufsize-3))-1;
+ fifo->id = bufid;
+ return fifo;
+}
+
+
+/* Consumer side fifo initialization.
+ bufid - number = file descriptor (already opened)
+ $name = shared memory segment /dev/shm/name
+ otherwise = trace file path name
+*/
+struct fifo_t* fifo_open( const char* bufid )
+{
+ int fd = shm_open(bufid, O_RDWR, 0);
+ dieif(fd<0, "shm_open() failed in fifo_open");
+ struct fifo_t* fifo = (struct fifo_t*)mmap(NULL, sizeof(struct fifo_t), PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0);
+ dieif(fifo==0, "first mmap() failed in fifo_open");
+ size_t fsize = (1<size) + sizeof(struct fifo_t);
+ dieif(munmap(fifo, sizeof(struct fifo_t))<0, "munmap() failed in fifo_open");
+ fifo = (struct fifo_t*)mmap(NULL, fsize, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0);
+ dieif(fifo==0, "second mmap() failed in fifo_open");
+ assert(((uint64_t)fifo & 0x3fL) == 0L);
+ return fifo;
+}
+
+
+/* Consumer side fifo termination. */
+void fifo_close( struct fifo_t* fifo )
+{
+ fifo->finished = 1;
+ futex_wake(&fifo->finished);
+ size_t fsize = (1<size) + sizeof(struct fifo_t);
+ dieif(munmap(fifo, fsize)<0, "munmap() failed in fifo_close");
+}
+
+
+/* Producer side fifo termination. */
+void fifo_finish( struct fifo_t* fifo )
+{
+ fifo_flush(fifo);
+ /* wait for consumer to finish */
+ futex_hibernate(&fifo->finished, 0);
+ size_t fsize = (1<size) + sizeof(struct fifo_t);
+ dieif(munmap(fifo, fsize)<0, "munmap() failed in fifo_finish");
+}
+
+
+void fifo_debug( struct fifo_t* fifo, const char* msg )
+{
+ fprintf(stderr, "%s: HEAD=%d, head=%d, TAIL=%d, tail=%d\n",
+ msg, fifo->HEAD, fifo->head, fifo->TAIL, fifo->tail);
+}
diff --git a/caveat/shmfifo.h b/caveat/shmfifo.h
new file mode 100644
index 0000000..a382e09
--- /dev/null
+++ b/caveat/shmfifo.h
@@ -0,0 +1,112 @@
+/*
+ Copyright (c) 2020 Peter Hsu. All Rights Reserved. See LICENCE file for details.
+*/
+
+#include
+#include
+#include
+#include
+#include
+
+
+#define BATCH_SIZE 256
+#define MAX_SPINS 100
+
+struct fifo_t {
+ const char* id; /* descriptor, $name or path */
+ int32_t head; /* removal pointer (local copy) */
+ volatile int32_t TAIL; /* global copy of insertion pointer */
+ uint32_t get_mask; /* =(1<tail+1) & fifo->put_mask;
+ if (tailp1 == fifo->HEAD) {
+ int spins = MAX_SPINS;
+ do {
+ _mm_pause();
+ } while (tailp1 == fifo->HEAD && --spins >= 0);
+ while (tailp1 == fifo->HEAD)
+ futex_wait(&fifo->HEAD, tailp1);
+ }
+ fifo->buffer[fifo->tail] = item;
+ fifo->tail = tailp1;
+ if (fifo->tail % BATCH_SIZE == 0) {
+ fifo->TAIL = fifo->tail;
+ futex_wake(&fifo->TAIL);
+ }
+}
+
+
+/* Get item from fifo */
+static inline uint64_t fifo_get( struct fifo_t* fifo )
+{
+ if (fifo->head == fifo->TAIL) {
+ int spins = MAX_SPINS;
+ do {
+ _mm_pause();
+ } while (fifo->head == fifo->TAIL && --spins >= 0);
+ while (fifo->head == fifo->TAIL)
+ futex_wait(&fifo->TAIL, fifo->head);
+ }
+ uint64_t rv = fifo->buffer[fifo->head++];
+ fifo->head &= fifo->get_mask;
+ if (fifo->head % BATCH_SIZE == 0) {
+ fifo->HEAD = fifo->head;
+ futex_wake(&fifo->HEAD);
+ }
+ return rv;
+}
+
+
+
+
+
+/* Make consumer status up to date */
+static inline void fifo_flush( struct fifo_t* fifo )
+{
+ fifo->TAIL = fifo->tail;
+ futex_wake(&fifo->TAIL);
+}
diff --git a/caveat/sim_body.h b/caveat/sim_body.h
new file mode 100644
index 0000000..686713f
--- /dev/null
+++ b/caveat/sim_body.h
@@ -0,0 +1,119 @@
+// See LICENSE for license details.
+
+
+#ifndef SIM_BODY_H
+#define SIM_BODY_H
+
+
+#define IR(rn) cpu->reg[rn]
+#define FR(rn) cpu->reg[rn]
+
+#ifdef SOFT_FP
+#define F32(rn) cpu->reg[rn].f32
+#define F64(rn) cpu->reg[rn].f64
+inline float32_t NF32(int rn) { float32_t x=F32(rn); x.v^=F32_SIGN; return x; }
+inline float64_t NF64(int rn) { float64_t x=F64(rn); x.v^=F64_SIGN; return x; }
+#endif
+
+
+
+// Use only this macro to advance program counter
+#define INCPC(bytes) { update_regfile(p->op_rd, IR(p->op_rd).l); PC+=bytes; advance(bytes); }
+
+// Discontinuous program counter macros
+#define CALL(npc, sz) { Addr_t tgt=npc; IR(p->op_rd).l=PC+sz; INCPC(sz); trace_bbk(tr_call, tgt); PC=tgt; break; }
+#define RETURN(npc, sz) { Addr_t tgt=npc; INCPC(sz); trace_bbk(tr_return, tgt); PC=tgt; break; }
+#define JUMP(npc, sz) { Addr_t tgt=npc; INCPC(sz); trace_bbk(tr_jump, tgt); PC=tgt; break; }
+#define GOTO(npc, sz) { Addr_t tgt=npc; INCPC(sz); trace_bbk(tr_branch, tgt); PC=tgt; break; }
+
+#define EBRK(num, sz) { cpu->state.mcause= 3; cpu->state.mtval=num; continue; }
+#define ECALL(sz) { cpu->state.mcause= 8; cpu->state.mtval=0; INCPC(sz); trace_bbk(tr_ecall, cpu->reg[17].l); PC-=sz; continue; }
+#define DOCSR(num, sz) { cpu->state.mcause=14; cpu->state.mtval=num; INCPC(sz); trace_bbk(tr_csr, 0L); PC-=sz; continue; }
+
+// Memory reference instructions
+#define LOAD_B( a, sz) ( trace_mem(tr_read1, a), *(( char*)(a)) )
+#define LOAD_UB(a, sz) ( trace_mem(tr_read1, a), *((unsigned char*)(a)) )
+#define LOAD_H( a, sz) ( trace_mem(tr_read2, a), *(( short*)(a)) )
+#define LOAD_UH(a, sz) ( trace_mem(tr_read2, a), *((unsigned short*)(a)) )
+#define LOAD_W( a, sz) ( trace_mem(tr_read4, a), *(( int*)(a)) )
+#define LOAD_UW(a, sz) ( trace_mem(tr_read4, a), *((unsigned int*)(a)) )
+#define LOAD_L( a, sz) ( trace_mem(tr_read8, a), *(( long*)(a)) )
+#define LOAD_UL(a, sz) ( trace_mem(tr_read8, a), *((unsigned long*)(a)) )
+#define LOAD_F( a, sz) ( trace_mem(tr_read4, a), *(( float*)(a)) )
+#define LOAD_D( a, sz) ( trace_mem(tr_read8, a), *(( double*)(a)) )
+
+#define STORE_B(a, sz, v) { trace_mem(tr_write1, a); *(( char*)(a))=v; }
+#define STORE_H(a, sz, v) { trace_mem(tr_write2, a); *(( short*)(a))=v; }
+#define STORE_W(a, sz, v) { trace_mem(tr_write4, a); *(( int*)(a))=v; }
+#define STORE_L(a, sz, v) { trace_mem(tr_write8, a); *(( long*)(a))=v; }
+#define STORE_F(a, sz, v) { trace_mem(tr_write4, a); *(( float*)(a))=v; }
+#define STORE_D(a, sz, v) { trace_mem(tr_write8, a); *((double*)(a))=v; }
+
+
+// Define load reserve/store conditional emulation
+#define addrW(rn) (( int*)IR(rn).p)
+#define addrL(rn) ((long*)IR(rn).p)
+#define amoW(rn) ( trace_mem(tr_amo4, IR(rn).l), ( int*)IR(rn).p )
+#define amoL(rn) ( trace_mem(tr_amo8, IR(rn).l), (long*)IR(rn).p )
+
+#define LR_W(rd, r1) { amo_lock_begin; lrsc_set = IR(rd).ul&~0x7; IR(rd).l=*addrW(r1); trace_mem(tr_lr4, IR(r1).ul|0x0L); amo_lock_end; }
+#define LR_L(rd, r1) { amo_lock_begin; lrsc_set = IR(rd).ul&~0x7; IR(rd).l=*addrL(r1); trace_mem(tr_lr8, IR(r1).ul|0x1L); amo_lock_end; }
+#define SC_W(rd, r1, r2) { amo_lock_begin; if (lrsc_set == IR(r1).ul&~0x7) { *addrW(r1)=IR(r2).i; IR(rd).l=1; } else IR(rd).l=0; trace_mem(tr_sc4, IR(r1).ul|0x2L); amo_lock_end; }
+#define SC_L(rd, r1, r2) { amo_lock_begin; if (lrsc_set == IR(r1).ul&~0x7) { *addrL(r1)=IR(r2).l; IR(rd).l=1; } else IR(rd).l=0; trace_mem(tr_sc8, IR(r1).ul|0x3L); amo_lock_end; }
+
+
+// Define AMO instructions
+#define AMOSWAP_W(rd, r1, r2) __sync_lock_test_and_set_4(amoW(r1), IR(r2).i)
+#define AMOSWAP_L(rd, r1, r2) __sync_lock_test_and_set_8(amoL(r1), IR(r2).l)
+
+#define AMOADD_W(rd, r1, r2) __sync_fetch_and_add_4( amoW(r1), IR(r2).i)
+#define AMOADD_L(rd, r1, r2) __sync_fetch_and_add_8( amoL(r1), IR(r2).l)
+#define AMOXOR_W(rd, r1, r2) __sync_fetch_and_xor_4( amoW(r1), IR(r2).i)
+#define AMOXOR_L(rd, r1, r2) __sync_fetch_and_xor_8( amoL(r1), IR(r2).l)
+#define AMOOR_W( rd, r1, r2) __sync_fetch_and_or_4( amoW(r1), IR(r2).i)
+#define AMOOR_L( rd, r1, r2) __sync_fetch_and_or_8( amoL(r1), IR(r2).l)
+#define AMOAND_W(rd, r1, r2) __sync_fetch_and_and_4( amoW(r1), IR(r2).i)
+#define AMOAND_L(rd, r1, r2) __sync_fetch_and_and_8( amoL(r1), IR(r2).l)
+
+#define AMOMIN_W( rd, r1, r2) { amo_lock_begin; int t1=*(( int*)amoW(r1)), t2=IR(r2).i; if (t2 < t1) *addrW(r1) = t2; IR(rd).l = t1; amo_lock_end; }
+#define AMOMAX_W( rd, r1, r2) { amo_lock_begin; int t1=*(( int*)amoW(r1)), t2=IR(r2).ui; if (t2 > t1) *addrW(r1) = t2; IR(rd).l = t1; amo_lock_end; }
+#define AMOMIN_L( rd, r1, r2) { amo_lock_begin; long t1=*(( long*)amoL(r1)), t2=IR(r2).i; if (t2 < t1) *addrL(r1) = t2; IR(rd).l = t1; amo_lock_end; }
+#define AMOMAX_L( rd, r1, r2) { amo_lock_begin; long t1=*(( long*)amoL(r1)), t2=IR(r2).ui; if (t2 > t1) *addrL(r1) = t2; IR(rd).l = t1; amo_lock_end; }
+#define AMOMINU_W(rd, r1, r2) { amo_lock_begin; unsigned int t1=*((unsigned int*)amoW(r1)), t2=IR(r2).l; if (t2 < t1) *addrW(r1) = t2; IR(rd).l = t1; amo_lock_end; }
+#define AMOMAXU_W(rd, r1, r2) { amo_lock_begin; unsigned int t1=*((unsigned int*)amoW(r1)), t2=IR(r2).ul; if (t2 > t1) *addrW(r1) = t2; IR(rd).l = t1; amo_lock_end; }
+#define AMOMINU_L(rd, r1, r2) { amo_lock_begin; unsigned long t1=*((unsigned long*)amoL(r1)), t2=IR(r2).l; if (t2 < t1) *addrL(r1) = t2; IR(rd).l = t1; amo_lock_end; }
+#define AMOMAXU_L(rd, r1, r2) { amo_lock_begin; unsigned long t1=*((unsigned long*)amoL(r1)), t2=IR(r2).ul; if (t2 > t1) *addrL(r1) = t2; IR(rd).l = t1; amo_lock_end; }
+
+
+// Define i-stream synchronization instruction
+#define FENCE(rd, r1, immed) { __sync_synchronize(); INCPC(4); trace_bbk(tr_fence, immed); break; }
+
+
+{
+ while (cpu->state.mcause == 0) {
+ register const struct insn_t* p = insn(PC);
+ on_every_insn(p);
+ switch (p->op_code) {
+
+#include "execute_insn.h"
+
+ case Op_zero:
+ abort(); /* should never occur */
+
+ case Op_illegal:
+ cpu->state.mcause = 2; // Illegal instruction
+ continue; // will exit loop
+ default:
+ cpu->state.mcause = 10; // Unknown instruction
+ continue;
+ }
+ IR(0).l = 0L;
+ if (--countdown == 0)
+ break;
+ }
+ cpu->pc = PC; // program counter cached in register
+ cpu->counter.insn_executed += max_count-countdown;
+}
+
+
+#endif
diff --git a/caveat/slow_sim.c b/caveat/slow_sim.c
new file mode 100644
index 0000000..90a2a63
--- /dev/null
+++ b/caveat/slow_sim.c
@@ -0,0 +1,63 @@
+/*
+ Copyright (c) 2020 Peter Hsu. All Rights Reserved. See LICENCE file for details.
+*/
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "caveat.h"
+#include "caveat_fp.h"
+#include "arith.h"
+#include "opcodes.h"
+#include "insn.h"
+#include "shmfifo.h"
+#include "core.h"
+
+
+
+static inline int dump_regs( struct core_t* cpu, int n)
+{
+ for (int i=0; itb, regval[i]);
+ return 0;
+}
+
+#define update_regfile(rd, val) (withregs && (rd) != NOREG ? regval[updates++]=(val) : 0)
+#define trace_mem(code, a) fifo_put(cpu->tb, trM(code, a))
+#define trace_bbk(code, v) ( fifo_put(cpu->tb, trP(code, since, v)), restart() )
+#define advance(sz) { since+=sz; if (since >= tr_max_number-4L) { fifo_put(cpu->tb, trP(tr_any, since, 0)); restart(); } }
+#define restart() (withregs ? dump_regs(cpu, updates) : 0, since=updates=0 )
+//#define on_every_insn(p) if (cpu->params.verify) { fifo_put(&verify, cpu->holding_pc); cpu->holding_pc=PC; }
+#define on_every_insn(p)
+
+#define amo_lock_begin
+#define amo_lock_end
+
+
+#define ICOUNT_INTERVAL 100000
+
+void slow_sim( struct core_t* cpu, long total_max_count )
+{
+ Addr_t PC = cpu->pc;
+ int since =0, updates=0;
+ int withregs = (cpu->params.flags & tr_has_reg) != 0;
+
+ while (cpu->state.mcause == 0 && total_max_count > 0) {
+ long max_count = ICOUNT_INTERVAL;
+ long countdown = max_count;
+
+#include "sim_body.h"
+
+ trace_mem(tr_icount, cpu->counter.insn_executed);
+ total_max_count -= max_count;
+ }
+ if (since > 0) {
+ trace_bbk(tr_any, 0);
+ }
+}
diff --git a/doc/Intro-Cavatools.pdf b/doc/Intro-Cavatools.pdf
new file mode 100644
index 0000000..079d547
Binary files /dev/null and b/doc/Intro-Cavatools.pdf differ
diff --git a/erised/Makefile b/erised/Makefile
new file mode 100644
index 0000000..2b58990
--- /dev/null
+++ b/erised/Makefile
@@ -0,0 +1,28 @@
+# Path where things should be installed
+R = $(HOME)
+
+CFLAGS = -I$R/include/cava -g -O3
+LIBS = $R/lib/libcava.a -lrt -lpthread -lncurses
+LDFLAGS = -Wl,-Ttext=70000000
+
+# Dependent headers
+hdrs := caveat.h opcodes.h insn.h
+
+# Text substitutions
+hdrs := $(addprefix $R/include/cava/,$(hdrs))
+
+
+erised: erised.o $(LIBS)
+ $(CC) $(CFLAGS) -o $@ $^ $(LDFLAGS)
+
+erised.o: $(hdrs) ../pipesim/pipesim.h
+
+install: erised
+ -cp $^ $R/bin/
+
+.PHONY:
+clean:
+ rm -f erised *.o *~ ./#*#
+
+
+
diff --git a/erised/erised.c b/erised/erised.c
new file mode 100644
index 0000000..95c8ad1
--- /dev/null
+++ b/erised/erised.c
@@ -0,0 +1,399 @@
+/*
+ Copyright (c) 2020 Peter Hsu. All Rights Reserved. See LICENCE file for details.
+*/
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "caveat.h"
+#include "opcodes.h"
+#include "insn.h"
+#include "perfctr.h"
+
+
+#define FRAMERATE 60 /* frames per second */
+#define PERSISTENCE 30 /* frames per color decay */
+#define HOT_COLOR (7-2)
+
+int global_width = 17;
+int local_width = 17;
+
+struct perfCounters_t perf;
+
+WINDOW *menu;
+struct histogram_t global, local;
+struct disasm_t disasm;
+
+time_t start_tick;
+long insn_count =0;
+
+inline static int min(int x, int y) { return x < y ? x : y; }
+
+#define EPSILON 0.001
+
+MEVENT event;
+
+
+/* Histogram functions. */
+
+struct histogram_t {
+ WINDOW* win;
+ long* bin;
+ int* decay;
+ long base, bound;
+ long range;
+ long max_value;
+ int bins;
+};
+
+struct disasm_t {
+ WINDOW* win;
+ long* old;
+ int* decay;
+ long base, bound;
+ long max_value;
+ int lines;
+};
+
+
+#define max(a, b) ( (a) > (b) ? (a) : (b) )
+
+void histo_create(struct histogram_t* histo, int lines, int cols, int starty, int startx)
+{
+ histo->win = newwin(lines, cols, starty, startx);
+ histo->bins = --lines;
+ histo->bin = (long*)malloc(lines*sizeof(long));
+ memset(histo->bin, 0, lines*sizeof(long));
+ histo->decay = (int*)malloc(lines*sizeof(int));
+ memset(histo->decay, 0, lines*sizeof(int));
+};
+
+void histo_delete(struct histogram_t* histo)
+{
+ if (histo->bin)
+ free(histo->bin);
+ if (histo->decay)
+ free(histo->decay);
+ memset(histo, 0, sizeof(struct histogram_t));
+}
+
+void histo_compute(struct histogram_t* histo, long base, long bound)
+{
+ long range = (bound-base) / histo->bins; /* pc range per bin */
+ histo->base = base;
+ histo->bound = bound;
+ histo->range = range;
+ long pc = base;
+ struct count_t* c = count(pc);
+ long max_count = 0;
+ for (int i=0; ibins; i++) {
+ long mcount = 0;
+ long limit = pc + range;
+ while (pc < limit) {
+ // mcount = max(mcount, c->count);
+ mcount += c->count;
+ pc += shortOp(c->i.op_code) ? 2 : 4;
+ c += shortOp(c->i.op_code) ? 1 : 2;
+ }
+ if (mcount != histo->bin[i])
+ histo->decay[i] = HOT_COLOR*PERSISTENCE;
+ histo->bin[i] = mcount;
+ max_count = max(max_count, mcount);
+ }
+ histo->max_value = max_count;
+}
+
+void paint_count_color(WINDOW* win, int width, long count, int decay, int always)
+{
+ int heat = (decay + PERSISTENCE-1)/PERSISTENCE;
+ wattron(win, COLOR_PAIR(heat + 2));
+ if (count > 0 || always)
+ wprintw(win, "%*ld", width, count);
+ else
+ wprintw(win, "%*s", width, "");
+ wattroff(win, COLOR_PAIR(heat + 2));
+}
+
+void histo_paint(struct histogram_t* histo, const char* title, long base, long bound)
+{
+ werase(histo->win);
+ long rows, cols;
+ getmaxyx(histo->win, rows, cols);
+ rows--;
+ wmove(histo->win, 0, 0);
+ wprintw(histo->win, "%*s\n", cols-1, title);
+ long pc = histo->base;
+ for (int y=0; yrange);
+ if (highlight) wattron(histo->win, A_REVERSE);
+ paint_count_color(histo->win, cols-1, histo->bin[y], histo->decay[y], 0);
+ wprintw(histo->win, "\n");
+ if (highlight) wattroff(histo->win, A_REVERSE);
+ if (histo->decay[y] > 0)
+ histo->decay[y]--;
+ pc += histo->range;
+ }
+ wnoutrefresh(histo->win);
+}
+
+
+
+void disasm_create(struct disasm_t* disasm, int lines, int cols, int starty, int startx)
+{
+ disasm->win = newwin(lines, cols, starty, startx);
+ disasm->lines = lines;
+ disasm->old = (long*)malloc(lines*sizeof(long));
+ memset(disasm->old, 0, lines*sizeof(long));
+ disasm->decay = (int*)malloc(lines*sizeof(int));
+ memset(disasm->decay, 0, lines*sizeof(int));
+}
+
+void disasm_delete(struct disasm_t* disasm)
+{
+ if (disasm->old)
+ free(disasm->old);
+ if (disasm->decay)
+ free(disasm->decay);
+ memset(disasm, 0, sizeof(struct disasm_t));
+}
+
+inline int fmtpercent(char* b, long num, long over)
+{
+ if (num == 0) return sprintf(b, " %4s ", "");
+ double percent = 100.0 * num / over;
+ if (percent > 99.9) return sprintf(b, " %4d%%", (int)percent);
+ if (percent > 9.99) return sprintf(b, " %4.1f%%", percent);
+ if (percent > 0.99) return sprintf(b, " %4.2f%%", percent);
+ return sprintf(b, " .%03u%%", (unsigned)((percent+0.005)*100));
+}
+
+void disasm_paint(struct disasm_t* disasm)
+{
+ WINDOW* win = disasm->win;
+ long pc = disasm->base;
+ wmove(win, 0, 0);
+ wprintw(win, "%16s %-6s %-5s %-5s %-5s", "Count", " CPI", "Ibuf", "I$", "D$");
+ wprintw(win, "%7.1fB insns CPI=%5.2f ", perf.h->insns/1e9, (double)perf.h->cycles/perf.h->insns);
+ wprintw(win, "%8s %8s %s\n", "PC", "Hex", "Assembly q=quit");
+ if (pc != 0) {
+ const struct count_t* c = count(pc);
+ const long* ibm = ibmiss(pc);
+ const long* icm = icmiss(pc);
+ const long* dcm = dcmiss(pc);
+ for (int y=1; ybound; y++) {
+ wmove(win, y, 0);
+ if (c->count != disasm->old[y])
+ disasm->decay[y] = HOT_COLOR*PERSISTENCE;
+ disasm->old[y] = c->count;
+ paint_count_color(win, 16, c->count, disasm->decay[y], 1);
+ if (disasm->decay[y] > 0)
+ disasm->decay[y]--;
+
+ double cpi = (double)c->cycles/c->count;
+ int dim = cpi < 1.0+EPSILON || c->count == 0;
+ if (dim) wattron(win, A_DIM);
+ if (c->count == 0) wprintw(win, " %-5s", "");
+ else if (c->cycles == c->count) wprintw(win, " %-5s", " 1");
+ else wprintw(win, " %5.2f", cpi);
+ char buf[1024];
+ char* b = buf;
+ b+=fmtpercent(b, *ibm, c->count);
+ b+=fmtpercent(b, *icm, c->count);
+ b+=fmtpercent(b, *dcm, c->count);
+ b+=sprintf(b, " ");
+ b+=format_pc(b, 28, pc);
+ b+=format_insn(b, &c->i, pc, *((unsigned int*)pc));
+ wprintw(win, "%s\n", buf);
+ if (dim) wattroff(win, A_DIM);
+
+ int sz = shortOp(c->i.op_code) ? 1 : 2;
+ pc += 2*sz;
+ c += sz, ibm += sz, icm += sz, dcm += sz;
+ }
+ }
+ disasm->bound = pc;
+ wclrtobot(win);
+ wnoutrefresh(win);
+}
+
+void resize_histos()
+{
+ histo_delete(&global);
+ histo_delete(&local);
+ disasm_delete(&disasm);
+ histo_create(&global, LINES, global_width, 0, 0);
+ histo_compute(&global, perf.h->base, perf.h->bound);
+ histo_create(&local, LINES, local_width, 0, global_width+1);
+ histo_compute(&local, 0, 0);
+ disasm_create(&disasm, LINES, COLS-global_width-local_width, 0, global_width+local_width);
+ disasm.base = 0;
+ doupdate();
+}
+
+void interactive()
+{
+ struct timeval t1, t2;
+ for (;;) {
+ gettimeofday(&t1, 0);
+ // histo_compute(&global, perf.h->base, perf.h->bound);
+ histo_compute(&global, insnSpace.base, insnSpace.bound);
+ histo_compute(&local, local.base, local.bound);
+ disasm_paint(&disasm);
+ histo_paint(&global, "Global", local.base, local.bound);
+ histo_paint(&local, "Local", disasm.base, disasm.bound);
+ doupdate();
+ int ch = wgetch(stdscr);
+ switch (ch) {
+ case ERR:
+ gettimeofday(&t2, 0);
+ double msec = (t2.tv_sec - t1.tv_sec)*1000;
+ msec += (t2.tv_usec - t1.tv_usec)/1000.0;
+ usleep((1000/FRAMERATE - msec) * 1000);
+ break;
+ //case KEY_F(1):
+#if 0
+ case KEY_RESIZE:
+ resizeterm(LINES, COLS);
+ resize_histos();
+ break;
+#endif
+ case 'q':
+ return;
+ //case KEY_DOWN:
+ //case KEY_UP:
+ case KEY_MOUSE:
+ dieif(getmouse(&event) != OK, "Got bad mouse event.");
+ if (wenclose(disasm.win, event.y, event.x)) {
+ if (event.bstate & BUTTON4_PRESSED) {
+ if (disasm.base > perf.h->base) {
+ disasm.base -= 2;
+ if (insn(disasm.base)->op_code == Op_zero)
+ disasm.base -= 2;
+ }
+ }
+ else if (event.bstate & BUTTON5_PRESSED) {
+ long npc = disasm.base + (shortOp(insn(disasm.base)->op_code) ? 2 : 4);
+ if (npc < perf.h->bound)
+ disasm.base = npc;
+ }
+ }
+ else if (wenclose(global.win, event.y, event.x)) {
+ if (event.bstate & BUTTON1_PRESSED) {
+ local.base = global.base + (event.y-1)*global.range;
+ local.bound = local.base + global.range;
+ }
+ }
+ else if (wenclose(local.win, event.y, event.x)) {
+ //int scroll = local.range * local.bins/2;
+ int scroll = local.range;
+ if (event.bstate & BUTTON1_PRESSED) {
+ disasm.base = local.base + (event.y-1)*local.range;
+ }
+ else if ((event.bstate & BUTTON4_PRESSED) && (event.bstate & BUTTON_SHIFT)) {
+ local.base += scroll;
+ local.bound -= scroll;
+ }
+ else if ((event.bstate & BUTTON5_PRESSED) && (event.bstate & BUTTON_SHIFT)) {
+ local.base -= scroll;
+ local.bound += scroll;
+ }
+ else if (event.bstate & BUTTON4_PRESSED) { /* without shift */
+ local.base -= scroll;
+ local.bound -= scroll;
+ }
+ else if (event.bstate & BUTTON5_PRESSED) { /* without shift */
+ local.base += scroll;
+ local.bound += scroll;
+ }
+
+ if (local.base < insnSpace.base)
+ local.base = insnSpace.base;
+ if (local.bound > insnSpace.bound)
+ local.bound = insnSpace.bound;
+ local.range = (local.bound-local.base)/local.bins;
+ }
+ break;
+ }
+ }
+}
+
+
+long atohex(const char* p)
+{
+ for (long n=0; ; p++) {
+ long digit;
+ if ('0' <= *p && *p <= '9')
+ digit = *p - '0';
+ else if ('a' <= *p && *p <= 'f')
+ digit = 10 + (*p - 'a');
+ else if ('A' <= *p && *p <= 'F')
+ digit = 10 + (*p - 'F');
+ else
+ return n;
+ n = 16*n + digit;
+ }
+}
+
+
+static const char* perf_path =0;
+static int list =0;
+
+const char* usage = "erised --count=name [erised-options]";
+const struct options_t opt[] =
+ { { "--perf=s", .s=&perf_path, .ds=0, .h="Shared memory counting structure =name" },
+ { 0 }
+ };
+
+
+int main(int argc, const char** argv)
+{
+ int numopts = parse_options(argv+1);
+ if (argc == numopts+1 || !perf_path)
+ help_exit();
+ long entry = load_elf_binary(argv[1+numopts], 0);
+ insnSpace_init();
+ perf_open(perf_path);
+
+ initscr(); /* Start curses mode */
+ start_color(); /* Start the color functionality */
+ cbreak(); /* Line buffering disabled */
+ noecho();
+ keypad(stdscr, TRUE); /* Need all keys */
+ mouseinterval(0); /* no mouse clicks, just button up/down */
+ // Don't mask any mouse events
+ mousemask(ALL_MOUSE_EVENTS | REPORT_MOUSE_POSITION, NULL);
+ //mousemask(ALL_MOUSE_EVENTS, NULL);
+
+ nodelay(stdscr, TRUE);
+ //timeout(100);
+
+ if (has_colors() == FALSE) {
+ endwin();
+ puts("Your terminal does not support color");
+ exit(1);
+ }
+ start_color();
+ init_pair(2, COLOR_MAGENTA, COLOR_BLACK);
+ init_pair(3, COLOR_BLUE, COLOR_BLACK);
+ init_pair(4, COLOR_CYAN, COLOR_BLACK);
+ init_pair(5, COLOR_GREEN, COLOR_BLACK);
+ init_pair(6, COLOR_YELLOW, COLOR_BLACK);
+ init_pair(7, COLOR_RED, COLOR_BLACK);
+
+ resize_histos();
+ interactive();
+
+ // printf("\033[?1003l\n"); // Disable mouse movement events, as l = low
+ endwin();
+ perf_close();
+ return 0;
+}
diff --git a/include/common.h b/include/common.h
new file mode 100644
index 0000000..4d94c4f
--- /dev/null
+++ b/include/common.h
@@ -0,0 +1,1287 @@
+/* ELF support for BFD.
+ Copyright (C) 1991-2020 Free Software Foundation, Inc.
+
+ Written by Fred Fish @ Cygnus Support, from information published
+ in "UNIX System V Release 4, Programmers Guide: ANSI C and
+ Programming Support Tools".
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+ MA 02110-1301, USA. */
+
+/* This file is part of ELF support for BFD, and contains the portions
+ that are common to both the internal and external representations.
+ For example, ELFMAG0 is the byte 0x7F in both the internal (in-memory)
+ and external (in-file) representations. */
+
+#ifndef _ELF_COMMON_H
+#define _ELF_COMMON_H
+
+/* Fields in e_ident[]. */
+
+#define EI_MAG0 0 /* File identification byte 0 index */
+#define ELFMAG0 0x7F /* Magic number byte 0 */
+
+#define EI_MAG1 1 /* File identification byte 1 index */
+#define ELFMAG1 'E' /* Magic number byte 1 */
+
+#define EI_MAG2 2 /* File identification byte 2 index */
+#define ELFMAG2 'L' /* Magic number byte 2 */
+
+#define EI_MAG3 3 /* File identification byte 3 index */
+#define ELFMAG3 'F' /* Magic number byte 3 */
+
+#define EI_CLASS 4 /* File class */
+#define ELFCLASSNONE 0 /* Invalid class */
+#define ELFCLASS32 1 /* 32-bit objects */
+#define ELFCLASS64 2 /* 64-bit objects */
+
+#define EI_DATA 5 /* Data encoding */
+#define ELFDATANONE 0 /* Invalid data encoding */
+#define ELFDATA2LSB 1 /* 2's complement, little endian */
+#define ELFDATA2MSB 2 /* 2's complement, big endian */
+
+#define EI_VERSION 6 /* File version */
+
+#define EI_OSABI 7 /* Operating System/ABI indication */
+#define ELFOSABI_NONE 0 /* UNIX System V ABI */
+#define ELFOSABI_HPUX 1 /* HP-UX operating system */
+#define ELFOSABI_NETBSD 2 /* NetBSD */
+#define ELFOSABI_GNU 3 /* GNU */
+#define ELFOSABI_LINUX 3 /* Alias for ELFOSABI_GNU */
+#define ELFOSABI_SOLARIS 6 /* Solaris */
+#define ELFOSABI_AIX 7 /* AIX */
+#define ELFOSABI_IRIX 8 /* IRIX */
+#define ELFOSABI_FREEBSD 9 /* FreeBSD */
+#define ELFOSABI_TRU64 10 /* TRU64 UNIX */
+#define ELFOSABI_MODESTO 11 /* Novell Modesto */
+#define ELFOSABI_OPENBSD 12 /* OpenBSD */
+#define ELFOSABI_OPENVMS 13 /* OpenVMS */
+#define ELFOSABI_NSK 14 /* Hewlett-Packard Non-Stop Kernel */
+#define ELFOSABI_AROS 15 /* AROS */
+#define ELFOSABI_FENIXOS 16 /* FenixOS */
+#define ELFOSABI_CLOUDABI 17 /* Nuxi CloudABI */
+#define ELFOSABI_OPENVOS 18 /* Stratus Technologies OpenVOS */
+
+#define ELFOSABI_C6000_ELFABI 64 /* Bare-metal TMS320C6000 */
+#define ELFOSABI_C6000_LINUX 65 /* Linux TMS320C6000 */
+#define ELFOSABI_ARM_FDPIC 65 /* ARM FDPIC */
+#define ELFOSABI_ARM 97 /* ARM */
+#define ELFOSABI_STANDALONE 255 /* Standalone (embedded) application */
+
+#define EI_ABIVERSION 8 /* ABI version */
+
+#define EI_PAD 9 /* Start of padding bytes */
+
+
+/* Values for e_type, which identifies the object file type. */
+
+#define ET_NONE 0 /* No file type */
+#define ET_REL 1 /* Relocatable file */
+#define ET_EXEC 2 /* Position-dependent executable file */
+#define ET_DYN 3 /* Position-independent executable or
+ shared object file */
+#define ET_CORE 4 /* Core file */
+#define ET_LOOS 0xFE00 /* Operating system-specific */
+#define ET_HIOS 0xFEFF /* Operating system-specific */
+#define ET_LOPROC 0xFF00 /* Processor-specific */
+#define ET_HIPROC 0xFFFF /* Processor-specific */
+
+/* Values for e_machine, which identifies the architecture. These numbers
+ are officially assigned by registry@sco.com. See below for a list of
+ ad-hoc numbers used during initial development. */
+
+#define EM_NONE 0 /* No machine */
+#define EM_M32 1 /* AT&T WE 32100 */
+#define EM_SPARC 2 /* SUN SPARC */
+#define EM_386 3 /* Intel 80386 */
+#define EM_68K 4 /* Motorola m68k family */
+#define EM_88K 5 /* Motorola m88k family */
+#define EM_IAMCU 6 /* Intel MCU */
+#define EM_860 7 /* Intel 80860 */
+#define EM_MIPS 8 /* MIPS R3000 (officially, big-endian only) */
+#define EM_S370 9 /* IBM System/370 */
+#define EM_MIPS_RS3_LE 10 /* MIPS R3000 little-endian (Oct 4 1999 Draft). Deprecated. */
+#define EM_OLD_SPARCV9 11 /* Old version of Sparc v9, from before the ABI. Deprecated. */
+#define EM_res011 11 /* Reserved */
+#define EM_res012 12 /* Reserved */
+#define EM_res013 13 /* Reserved */
+#define EM_res014 14 /* Reserved */
+#define EM_PARISC 15 /* HPPA */
+#define EM_res016 16 /* Reserved */
+#define EM_PPC_OLD 17 /* Old version of PowerPC. Deprecated. */
+#define EM_VPP550 17 /* Fujitsu VPP500 */
+#define EM_SPARC32PLUS 18 /* Sun's "v8plus" */
+#define EM_960 19 /* Intel 80960 */
+#define EM_PPC 20 /* PowerPC */
+#define EM_PPC64 21 /* 64-bit PowerPC */
+#define EM_S390 22 /* IBM S/390 */
+#define EM_SPU 23 /* Sony/Toshiba/IBM SPU */
+#define EM_res024 24 /* Reserved */
+#define EM_res025 25 /* Reserved */
+#define EM_res026 26 /* Reserved */
+#define EM_res027 27 /* Reserved */
+#define EM_res028 28 /* Reserved */
+#define EM_res029 29 /* Reserved */
+#define EM_res030 30 /* Reserved */
+#define EM_res031 31 /* Reserved */
+#define EM_res032 32 /* Reserved */
+#define EM_res033 33 /* Reserved */
+#define EM_res034 34 /* Reserved */
+#define EM_res035 35 /* Reserved */
+#define EM_V800 36 /* NEC V800 series */
+#define EM_FR20 37 /* Fujitsu FR20 */
+#define EM_RH32 38 /* TRW RH32 */
+#define EM_MCORE 39 /* Motorola M*Core */ /* May also be taken by Fujitsu MMA */
+#define EM_RCE 39 /* Old name for MCore */
+#define EM_ARM 40 /* ARM */
+#define EM_OLD_ALPHA 41 /* Digital Alpha */
+#define EM_SH 42 /* Renesas (formerly Hitachi) / SuperH SH */
+#define EM_SPARCV9 43 /* SPARC v9 64-bit */
+#define EM_TRICORE 44 /* Siemens Tricore embedded processor */
+#define EM_ARC 45 /* ARC Cores */
+#define EM_H8_300 46 /* Renesas (formerly Hitachi) H8/300 */
+#define EM_H8_300H 47 /* Renesas (formerly Hitachi) H8/300H */
+#define EM_H8S 48 /* Renesas (formerly Hitachi) H8S */
+#define EM_H8_500 49 /* Renesas (formerly Hitachi) H8/500 */
+#define EM_IA_64 50 /* Intel IA-64 Processor */
+#define EM_MIPS_X 51 /* Stanford MIPS-X */
+#define EM_COLDFIRE 52 /* Motorola Coldfire */
+#define EM_68HC12 53 /* Motorola M68HC12 */
+#define EM_MMA 54 /* Fujitsu Multimedia Accelerator */
+#define EM_PCP 55 /* Siemens PCP */
+#define EM_NCPU 56 /* Sony nCPU embedded RISC processor */
+#define EM_NDR1 57 /* Denso NDR1 microprocessor */
+#define EM_STARCORE 58 /* Motorola Star*Core processor */
+#define EM_ME16 59 /* Toyota ME16 processor */
+#define EM_ST100 60 /* STMicroelectronics ST100 processor */
+#define EM_TINYJ 61 /* Advanced Logic Corp. TinyJ embedded processor */
+#define EM_X86_64 62 /* Advanced Micro Devices X86-64 processor */
+#define EM_PDSP 63 /* Sony DSP Processor */
+#define EM_PDP10 64 /* Digital Equipment Corp. PDP-10 */
+#define EM_PDP11 65 /* Digital Equipment Corp. PDP-11 */
+#define EM_FX66 66 /* Siemens FX66 microcontroller */
+#define EM_ST9PLUS 67 /* STMicroelectronics ST9+ 8/16 bit microcontroller */
+#define EM_ST7 68 /* STMicroelectronics ST7 8-bit microcontroller */
+#define EM_68HC16 69 /* Motorola MC68HC16 Microcontroller */
+#define EM_68HC11 70 /* Motorola MC68HC11 Microcontroller */
+#define EM_68HC08 71 /* Motorola MC68HC08 Microcontroller */
+#define EM_68HC05 72 /* Motorola MC68HC05 Microcontroller */
+#define EM_SVX 73 /* Silicon Graphics SVx */
+#define EM_ST19 74 /* STMicroelectronics ST19 8-bit cpu */
+#define EM_VAX 75 /* Digital VAX */
+#define EM_CRIS 76 /* Axis Communications 32-bit embedded processor */
+#define EM_JAVELIN 77 /* Infineon Technologies 32-bit embedded cpu */
+#define EM_FIREPATH 78 /* Element 14 64-bit DSP processor */
+#define EM_ZSP 79 /* LSI Logic's 16-bit DSP processor */
+#define EM_MMIX 80 /* Donald Knuth's educational 64-bit processor */
+#define EM_HUANY 81 /* Harvard's machine-independent format */
+#define EM_PRISM 82 /* SiTera Prism */
+#define EM_AVR 83 /* Atmel AVR 8-bit microcontroller */
+#define EM_FR30 84 /* Fujitsu FR30 */
+#define EM_D10V 85 /* Mitsubishi D10V */
+#define EM_D30V 86 /* Mitsubishi D30V */
+#define EM_V850 87 /* Renesas V850 (formerly NEC V850) */
+#define EM_M32R 88 /* Renesas M32R (formerly Mitsubishi M32R) */
+#define EM_MN10300 89 /* Matsushita MN10300 */
+#define EM_MN10200 90 /* Matsushita MN10200 */
+#define EM_PJ 91 /* picoJava */
+#define EM_OR1K 92 /* OpenRISC 1000 32-bit embedded processor */
+#define EM_ARC_COMPACT 93 /* ARC International ARCompact processor */
+#define EM_XTENSA 94 /* Tensilica Xtensa Architecture */
+#define EM_SCORE_OLD 95 /* Old Sunplus S+core7 backend magic number. Written in the absence of an ABI. */
+#define EM_VIDEOCORE 95 /* Alphamosaic VideoCore processor */
+#define EM_TMM_GPP 96 /* Thompson Multimedia General Purpose Processor */
+#define EM_NS32K 97 /* National Semiconductor 32000 series */
+#define EM_TPC 98 /* Tenor Network TPC processor */
+#define EM_PJ_OLD 99 /* Old value for picoJava. Deprecated. */
+#define EM_SNP1K 99 /* Trebia SNP 1000 processor */
+#define EM_ST200 100 /* STMicroelectronics ST200 microcontroller */
+#define EM_IP2K 101 /* Ubicom IP2022 micro controller */
+#define EM_MAX 102 /* MAX Processor */
+#define EM_CR 103 /* National Semiconductor CompactRISC */
+#define EM_F2MC16 104 /* Fujitsu F2MC16 */
+#define EM_MSP430 105 /* TI msp430 micro controller */
+#define EM_BLACKFIN 106 /* ADI Blackfin */
+#define EM_SE_C33 107 /* S1C33 Family of Seiko Epson processors */
+#define EM_SEP 108 /* Sharp embedded microprocessor */
+#define EM_ARCA 109 /* Arca RISC Microprocessor */
+#define EM_UNICORE 110 /* Microprocessor series from PKU-Unity Ltd. and MPRC of Peking University */
+#define EM_EXCESS 111 /* eXcess: 16/32/64-bit configurable embedded CPU */
+#define EM_DXP 112 /* Icera Semiconductor Inc. Deep Execution Processor */
+#define EM_ALTERA_NIOS2 113 /* Altera Nios II soft-core processor */
+#define EM_CRX 114 /* National Semiconductor CRX */
+#define EM_CR16_OLD 115 /* Old, value for National Semiconductor CompactRISC. Deprecated. */
+#define EM_XGATE 115 /* Motorola XGATE embedded processor */
+#define EM_C166 116 /* Infineon C16x/XC16x processor */
+#define EM_M16C 117 /* Renesas M16C series microprocessors */
+#define EM_DSPIC30F 118 /* Microchip Technology dsPIC30F Digital Signal Controller */
+#define EM_CE 119 /* Freescale Communication Engine RISC core */
+#define EM_M32C 120 /* Renesas M32C series microprocessors */
+#define EM_res121 121 /* Reserved */
+#define EM_res122 122 /* Reserved */
+#define EM_res123 123 /* Reserved */
+#define EM_res124 124 /* Reserved */
+#define EM_res125 125 /* Reserved */
+#define EM_res126 126 /* Reserved */
+#define EM_res127 127 /* Reserved */
+#define EM_res128 128 /* Reserved */
+#define EM_res129 129 /* Reserved */
+#define EM_res130 130 /* Reserved */
+#define EM_TSK3000 131 /* Altium TSK3000 core */
+#define EM_RS08 132 /* Freescale RS08 embedded processor */
+#define EM_res133 133 /* Reserved */
+#define EM_ECOG2 134 /* Cyan Technology eCOG2 microprocessor */
+#define EM_SCORE 135 /* Sunplus Score */
+#define EM_SCORE7 135 /* Sunplus S+core7 RISC processor */
+#define EM_DSP24 136 /* New Japan Radio (NJR) 24-bit DSP Processor */
+#define EM_VIDEOCORE3 137 /* Broadcom VideoCore III processor */
+#define EM_LATTICEMICO32 138 /* RISC processor for Lattice FPGA architecture */
+#define EM_SE_C17 139 /* Seiko Epson C17 family */
+#define EM_TI_C6000 140 /* Texas Instruments TMS320C6000 DSP family */
+#define EM_TI_C2000 141 /* Texas Instruments TMS320C2000 DSP family */
+#define EM_TI_C5500 142 /* Texas Instruments TMS320C55x DSP family */
+#define EM_res143 143 /* Reserved */
+#define EM_TI_PRU 144 /* Texas Instruments Programmable Realtime Unit */
+#define EM_res145 145 /* Reserved */
+#define EM_res146 146 /* Reserved */
+#define EM_res147 147 /* Reserved */
+#define EM_res148 148 /* Reserved */
+#define EM_res149 149 /* Reserved */
+#define EM_res150 150 /* Reserved */
+#define EM_res151 151 /* Reserved */
+#define EM_res152 152 /* Reserved */
+#define EM_res153 153 /* Reserved */
+#define EM_res154 154 /* Reserved */
+#define EM_res155 155 /* Reserved */
+#define EM_res156 156 /* Reserved */
+#define EM_res157 157 /* Reserved */
+#define EM_res158 158 /* Reserved */
+#define EM_res159 159 /* Reserved */
+#define EM_MMDSP_PLUS 160 /* STMicroelectronics 64bit VLIW Data Signal Processor */
+#define EM_CYPRESS_M8C 161 /* Cypress M8C microprocessor */
+#define EM_R32C 162 /* Renesas R32C series microprocessors */
+#define EM_TRIMEDIA 163 /* NXP Semiconductors TriMedia architecture family */
+#define EM_QDSP6 164 /* QUALCOMM DSP6 Processor */
+#define EM_8051 165 /* Intel 8051 and variants */
+#define EM_STXP7X 166 /* STMicroelectronics STxP7x family */
+#define EM_NDS32 167 /* Andes Technology compact code size embedded RISC processor family */
+#define EM_ECOG1 168 /* Cyan Technology eCOG1X family */
+#define EM_ECOG1X 168 /* Cyan Technology eCOG1X family */
+#define EM_MAXQ30 169 /* Dallas Semiconductor MAXQ30 Core Micro-controllers */
+#define EM_XIMO16 170 /* New Japan Radio (NJR) 16-bit DSP Processor */
+#define EM_MANIK 171 /* M2000 Reconfigurable RISC Microprocessor */
+#define EM_CRAYNV2 172 /* Cray Inc. NV2 vector architecture */
+#define EM_RX 173 /* Renesas RX family */
+#define EM_METAG 174 /* Imagination Technologies Meta processor architecture */
+#define EM_MCST_ELBRUS 175 /* MCST Elbrus general purpose hardware architecture */
+#define EM_ECOG16 176 /* Cyan Technology eCOG16 family */
+#define EM_CR16 177 /* National Semiconductor CompactRISC 16-bit processor */
+#define EM_ETPU 178 /* Freescale Extended Time Processing Unit */
+#define EM_SLE9X 179 /* Infineon Technologies SLE9X core */
+#define EM_L1OM 180 /* Intel L1OM */
+#define EM_K1OM 181 /* Intel K1OM */
+#define EM_INTEL182 182 /* Reserved by Intel */
+#define EM_AARCH64 183 /* ARM 64-bit architecture */
+#define EM_ARM184 184 /* Reserved by ARM */
+#define EM_AVR32 185 /* Atmel Corporation 32-bit microprocessor family */
+#define EM_STM8 186 /* STMicroeletronics STM8 8-bit microcontroller */
+#define EM_TILE64 187 /* Tilera TILE64 multicore architecture family */
+#define EM_TILEPRO 188 /* Tilera TILEPro multicore architecture family */
+#define EM_MICROBLAZE 189 /* Xilinx MicroBlaze 32-bit RISC soft processor core */
+#define EM_CUDA 190 /* NVIDIA CUDA architecture */
+#define EM_TILEGX 191 /* Tilera TILE-Gx multicore architecture family */
+#define EM_CLOUDSHIELD 192 /* CloudShield architecture family */
+#define EM_COREA_1ST 193 /* KIPO-KAIST Core-A 1st generation processor family */
+#define EM_COREA_2ND 194 /* KIPO-KAIST Core-A 2nd generation processor family */
+#define EM_ARC_COMPACT2 195 /* Synopsys ARCompact V2 */
+#define EM_OPEN8 196 /* Open8 8-bit RISC soft processor core */
+#define EM_RL78 197 /* Renesas RL78 family. */
+#define EM_VIDEOCORE5 198 /* Broadcom VideoCore V processor */
+#define EM_78K0R 199 /* Renesas 78K0R. */
+#define EM_56800EX 200 /* Freescale 56800EX Digital Signal Controller (DSC) */
+#define EM_BA1 201 /* Beyond BA1 CPU architecture */
+#define EM_BA2 202 /* Beyond BA2 CPU architecture */
+#define EM_XCORE 203 /* XMOS xCORE processor family */
+#define EM_MCHP_PIC 204 /* Microchip 8-bit PIC(r) family */
+#define EM_INTEL205 205 /* Reserved by Intel */
+#define EM_INTEL206 206 /* Reserved by Intel */
+#define EM_INTEL207 207 /* Reserved by Intel */
+#define EM_INTEL208 208 /* Reserved by Intel */
+#define EM_INTEL209 209 /* Reserved by Intel */
+#define EM_KM32 210 /* KM211 KM32 32-bit processor */
+#define EM_KMX32 211 /* KM211 KMX32 32-bit processor */
+#define EM_KMX16 212 /* KM211 KMX16 16-bit processor */
+#define EM_KMX8 213 /* KM211 KMX8 8-bit processor */
+#define EM_KVARC 214 /* KM211 KVARC processor */
+#define EM_CDP 215 /* Paneve CDP architecture family */
+#define EM_COGE 216 /* Cognitive Smart Memory Processor */
+#define EM_COOL 217 /* Bluechip Systems CoolEngine */
+#define EM_NORC 218 /* Nanoradio Optimized RISC */
+#define EM_CSR_KALIMBA 219 /* CSR Kalimba architecture family */
+#define EM_Z80 220 /* Zilog Z80 */
+#define EM_VISIUM 221 /* Controls and Data Services VISIUMcore processor */
+#define EM_FT32 222 /* FTDI Chip FT32 high performance 32-bit RISC architecture */
+#define EM_MOXIE 223 /* Moxie processor family */
+#define EM_AMDGPU 224 /* AMD GPU architecture */
+#define EM_RISCV 243 /* RISC-V */
+#define EM_LANAI 244 /* Lanai 32-bit processor. */
+#define EM_BPF 247 /* Linux BPF â in-kernel virtual machine. */
+#define EM_NFP 250 /* Netronome Flow Processor. */
+#define EM_CSKY 252 /* C-SKY processor family. */
+
+/* If it is necessary to assign new unofficial EM_* values, please pick large
+ random numbers (0x8523, 0xa7f2, etc.) to minimize the chances of collision
+ with official or non-GNU unofficial values.
+
+ NOTE: Do not just increment the most recent number by one.
+ Somebody else somewhere will do exactly the same thing, and you
+ will have a collision. Instead, pick a random number.
+
+ Normally, each entity or maintainer responsible for a machine with an
+ unofficial e_machine number should eventually ask registry@sco.com for
+ an officially blessed number to be added to the list above. */
+
+/* AVR magic number. Written in the absense of an ABI. */
+#define EM_AVR_OLD 0x1057
+
+/* MSP430 magic number. Written in the absense of everything. */
+#define EM_MSP430_OLD 0x1059
+
+/* Morpho MT. Written in the absense of an ABI. */
+#define EM_MT 0x2530
+
+/* FR30 magic number - no EABI available. */
+#define EM_CYGNUS_FR30 0x3330
+
+/* Unofficial value for Web Assembly binaries, as used by LLVM. */
+#define EM_WEBASSEMBLY 0x4157
+
+/* Freescale S12Z. The Freescale toolchain generates elf files with this value. */
+#define EM_S12Z 0x4DEF
+
+/* DLX magic number. Written in the absense of an ABI. */
+#define EM_DLX 0x5aa5
+
+/* FRV magic number - no EABI available??. */
+#define EM_CYGNUS_FRV 0x5441
+
+/* Infineon Technologies 16-bit microcontroller with C166-V2 core. */
+#define EM_XC16X 0x4688
+
+/* D10V backend magic number. Written in the absence of an ABI. */
+#define EM_CYGNUS_D10V 0x7650
+
+/* D30V backend magic number. Written in the absence of an ABI. */
+#define EM_CYGNUS_D30V 0x7676
+
+/* Ubicom IP2xxx; Written in the absense of an ABI. */
+#define EM_IP2K_OLD 0x8217
+
+/* Cygnus PowerPC ELF backend. Written in the absence of an ABI. */
+#define EM_CYGNUS_POWERPC 0x9025
+
+/* Alpha backend magic number. Written in the absence of an ABI. */
+#define EM_ALPHA 0x9026
+
+/* Cygnus M32R ELF backend. Written in the absence of an ABI. */
+#define EM_CYGNUS_M32R 0x9041
+
+/* V850 backend magic number. Written in the absense of an ABI. */
+#define EM_CYGNUS_V850 0x9080
+
+/* old S/390 backend magic number. Written in the absence of an ABI. */
+#define EM_S390_OLD 0xa390
+
+/* Old, unofficial value for Xtensa. */
+#define EM_XTENSA_OLD 0xabc7
+
+#define EM_XSTORMY16 0xad45
+
+/* mn10200 and mn10300 backend magic numbers.
+ Written in the absense of an ABI. */
+#define EM_CYGNUS_MN10300 0xbeef
+#define EM_CYGNUS_MN10200 0xdead
+
+/* Renesas M32C and M16C. */
+#define EM_M32C_OLD 0xFEB0
+
+/* Vitesse IQ2000. */
+#define EM_IQ2000 0xFEBA
+
+/* NIOS magic number - no EABI available. */
+#define EM_NIOS32 0xFEBB
+
+#define EM_CYGNUS_MEP 0xF00D /* Toshiba MeP */
+
+/* Old, unofficial value for Moxie. */
+#define EM_MOXIE_OLD 0xFEED
+
+#define EM_MICROBLAZE_OLD 0xbaab /* Old MicroBlaze */
+
+#define EM_ADAPTEVA_EPIPHANY 0x1223 /* Adapteva's Epiphany architecture. */
+
+/* Old constant that might be in use by some software. */
+#define EM_OPENRISC EM_OR1K
+
+/* C-SKY historically used 39, the same value as MCORE, from which the
+ architecture was derived. */
+#define EM_CSKY_OLD EM_MCORE
+
+/* See the above comment before you add a new EM_* value here. */
+
+/* Values for e_version. */
+
+#define EV_NONE 0 /* Invalid ELF version */
+#define EV_CURRENT 1 /* Current version */
+
+/* Value for e_phnum. */
+#define PN_XNUM 0xffff /* Extended numbering */
+
+/* Values for program header, p_type field. */
+
+#define PT_NULL 0 /* Program header table entry unused */
+#define PT_LOAD 1 /* Loadable program segment */
+#define PT_DYNAMIC 2 /* Dynamic linking information */
+#define PT_INTERP 3 /* Program interpreter */
+#define PT_NOTE 4 /* Auxiliary information */
+#define PT_SHLIB 5 /* Reserved, unspecified semantics */
+#define PT_PHDR 6 /* Entry for header table itself */
+#define PT_TLS 7 /* Thread local storage segment */
+#define PT_LOOS 0x60000000 /* OS-specific */
+#define PT_HIOS 0x6fffffff /* OS-specific */
+#define PT_LOPROC 0x70000000 /* Processor-specific */
+#define PT_HIPROC 0x7FFFFFFF /* Processor-specific */
+
+#define PT_GNU_EH_FRAME (PT_LOOS + 0x474e550) /* Frame unwind information */
+#define PT_SUNW_EH_FRAME PT_GNU_EH_FRAME /* Solaris uses the same value */
+#define PT_GNU_STACK (PT_LOOS + 0x474e551) /* Stack flags */
+#define PT_GNU_RELRO (PT_LOOS + 0x474e552) /* Read-only after relocation */
+#define PT_GNU_PROPERTY (PT_LOOS + 0x474e553) /* GNU property */
+
+/* Mbind segments */
+#define PT_GNU_MBIND_NUM 4096
+#define PT_GNU_MBIND_LO (PT_LOOS + 0x474e555)
+#define PT_GNU_MBIND_HI (PT_GNU_MBIND_LO + PT_GNU_MBIND_NUM - 1)
+
+/* Program segment permissions, in program header p_flags field. */
+
+#define PF_X (1 << 0) /* Segment is executable */
+#define PF_W (1 << 1) /* Segment is writable */
+#define PF_R (1 << 2) /* Segment is readable */
+/* #define PF_MASKOS 0x0F000000 *//* OS-specific reserved bits */
+#define PF_MASKOS 0x0FF00000 /* New value, Oct 4, 1999 Draft */
+#define PF_MASKPROC 0xF0000000 /* Processor-specific reserved bits */
+
+/* Values for section header, sh_type field. */
+
+#define SHT_NULL 0 /* Section header table entry unused */
+#define SHT_PROGBITS 1 /* Program specific (private) data */
+#define SHT_SYMTAB 2 /* Link editing symbol table */
+#define SHT_STRTAB 3 /* A string table */
+#define SHT_RELA 4 /* Relocation entries with addends */
+#define SHT_HASH 5 /* A symbol hash table */
+#define SHT_DYNAMIC 6 /* Information for dynamic linking */
+#define SHT_NOTE 7 /* Information that marks file */
+#define SHT_NOBITS 8 /* Section occupies no space in file */
+#define SHT_REL 9 /* Relocation entries, no addends */
+#define SHT_SHLIB 10 /* Reserved, unspecified semantics */
+#define SHT_DYNSYM 11 /* Dynamic linking symbol table */
+
+#define SHT_INIT_ARRAY 14 /* Array of ptrs to init functions */
+#define SHT_FINI_ARRAY 15 /* Array of ptrs to finish functions */
+#define SHT_PREINIT_ARRAY 16 /* Array of ptrs to pre-init funcs */
+#define SHT_GROUP 17 /* Section contains a section group */
+#define SHT_SYMTAB_SHNDX 18 /* Indices for SHN_XINDEX entries */
+
+#define SHT_LOOS 0x60000000 /* First of OS specific semantics */
+#define SHT_HIOS 0x6fffffff /* Last of OS specific semantics */
+
+#define SHT_GNU_INCREMENTAL_INPUTS 0x6fff4700 /* incremental build data */
+#define SHT_GNU_ATTRIBUTES 0x6ffffff5 /* Object attributes */
+#define SHT_GNU_HASH 0x6ffffff6 /* GNU style symbol hash table */
+#define SHT_GNU_LIBLIST 0x6ffffff7 /* List of prelink dependencies */
+
+/* The next three section types are defined by Solaris, and are named
+ SHT_SUNW*. We use them in GNU code, so we also define SHT_GNU*
+ versions. */
+#define SHT_SUNW_verdef 0x6ffffffd /* Versions defined by file */
+#define SHT_SUNW_verneed 0x6ffffffe /* Versions needed by file */
+#define SHT_SUNW_versym 0x6fffffff /* Symbol versions */
+
+#define SHT_GNU_verdef SHT_SUNW_verdef
+#define SHT_GNU_verneed SHT_SUNW_verneed
+#define SHT_GNU_versym SHT_SUNW_versym
+
+#define SHT_LOPROC 0x70000000 /* Processor-specific semantics, lo */
+#define SHT_HIPROC 0x7FFFFFFF /* Processor-specific semantics, hi */
+#define SHT_LOUSER 0x80000000 /* Application-specific semantics */
+/* #define SHT_HIUSER 0x8FFFFFFF *//* Application-specific semantics */
+#define SHT_HIUSER 0xFFFFFFFF /* New value, defined in Oct 4, 1999 Draft */
+
+/* Values for section header, sh_flags field. */
+
+#define SHF_WRITE (1 << 0) /* Writable data during execution */
+#define SHF_ALLOC (1 << 1) /* Occupies memory during execution */
+#define SHF_EXECINSTR (1 << 2) /* Executable machine instructions */
+#define SHF_MERGE (1 << 4) /* Data in this section can be merged */
+#define SHF_STRINGS (1 << 5) /* Contains null terminated character strings */
+#define SHF_INFO_LINK (1 << 6) /* sh_info holds section header table index */
+#define SHF_LINK_ORDER (1 << 7) /* Preserve section ordering when linking */
+#define SHF_OS_NONCONFORMING (1 << 8) /* OS specific processing required */
+#define SHF_GROUP (1 << 9) /* Member of a section group */
+#define SHF_TLS (1 << 10) /* Thread local storage section */
+#define SHF_COMPRESSED (1 << 11) /* Section with compressed data */
+
+/* #define SHF_MASKOS 0x0F000000 *//* OS-specific semantics */
+#define SHF_MASKOS 0x0FF00000 /* New value, Oct 4, 1999 Draft */
+#define SHF_GNU_BUILD_NOTE (1 << 20) /* Section contains GNU BUILD ATTRIBUTE notes. */
+#define SHF_MASKPROC 0xF0000000 /* Processor-specific semantics */
+
+/* This used to be implemented as a processor specific section flag.
+ We just make it generic. */
+#define SHF_EXCLUDE 0x80000000 /* Link editor is to exclude
+ this section from executable
+ and shared library that it
+ builds when those objects
+ are not to be further
+ relocated. */
+
+#define SHF_GNU_MBIND 0x01000000 /* Mbind section. */
+
+/* Compression types. */
+#define ELFCOMPRESS_ZLIB 1 /* Compressed with zlib. */
+#define ELFCOMPRESS_LOOS 0x60000000 /* OS-specific semantics, lo */
+#define ELFCOMPRESS_HIOS 0x6FFFFFFF /* OS-specific semantics, hi */
+#define ELFCOMPRESS_LOPROC 0x70000000 /* Processor-specific semantics, lo */
+#define ELFCOMPRESS_HIPROC 0x7FFFFFFF /* Processor-specific semantics, hi */
+
+/* Values of note segment descriptor types for core files. */
+
+#define NT_PRSTATUS 1 /* Contains copy of prstatus struct */
+#define NT_FPREGSET 2 /* Contains copy of fpregset struct */
+#define NT_PRPSINFO 3 /* Contains copy of prpsinfo struct */
+#define NT_TASKSTRUCT 4 /* Contains copy of task struct */
+#define NT_AUXV 6 /* Contains copy of Elfxx_auxv_t */
+#define NT_PRXFPREG 0x46e62b7f /* Contains a user_xfpregs_struct; */
+ /* note name must be "LINUX". */
+#define NT_PPC_VMX 0x100 /* PowerPC Altivec/VMX registers */
+ /* note name must be "LINUX". */
+#define NT_PPC_VSX 0x102 /* PowerPC VSX registers */
+ /* note name must be "LINUX". */
+#define NT_PPC_TAR 0x103 /* PowerPC Target Address Register */
+ /* note name must be "LINUX". */
+#define NT_PPC_PPR 0x104 /* PowerPC Program Priority Register */
+ /* note name must be "LINUX". */
+#define NT_PPC_DSCR 0x105 /* PowerPC Data Stream Control Register */
+ /* note name must be "LINUX". */
+#define NT_PPC_EBB 0x106 /* PowerPC Event Based Branch Registers */
+ /* note name must be "LINUX". */
+#define NT_PPC_PMU 0x107 /* PowerPC Performance Monitor Registers */
+ /* note name must be "LINUX". */
+#define NT_PPC_TM_CGPR 0x108 /* PowerPC TM checkpointed GPR Registers */
+ /* note name must be "LINUX". */
+#define NT_PPC_TM_CFPR 0x109 /* PowerPC TM checkpointed FPR Registers */
+ /* note name must be "LINUX". */
+#define NT_PPC_TM_CVMX 0x10a /* PowerPC TM checkpointed VMX Registers */
+ /* note name must be "LINUX". */
+#define NT_PPC_TM_CVSX 0x10b /* PowerPC TM checkpointed VSX Registers */
+ /* note name must be "LINUX". */
+#define NT_PPC_TM_SPR 0x10c /* PowerPC TM Special Purpose Registers */
+ /* note name must be "LINUX". */
+#define NT_PPC_TM_CTAR 0x10d /* PowerPC TM checkpointed TAR */
+ /* note name must be "LINUX". */
+#define NT_PPC_TM_CPPR 0x10e /* PowerPC TM checkpointed PPR */
+ /* note name must be "LINUX". */
+#define NT_PPC_TM_CDSCR 0x10f /* PowerPC TM checkpointed Data SCR */
+ /* note name must be "LINUX". */
+#define NT_386_TLS 0x200 /* x86 TLS information */
+ /* note name must be "LINUX". */
+#define NT_386_IOPERM 0x201 /* x86 io permissions */
+ /* note name must be "LINUX". */
+#define NT_X86_XSTATE 0x202 /* x86 XSAVE extended state */
+ /* note name must be "LINUX". */
+#define NT_S390_HIGH_GPRS 0x300 /* S/390 upper halves of GPRs */
+ /* note name must be "LINUX". */
+#define NT_S390_TIMER 0x301 /* S390 timer */
+ /* note name must be "LINUX". */
+#define NT_S390_TODCMP 0x302 /* S390 TOD clock comparator */
+ /* note name must be "LINUX". */
+#define NT_S390_TODPREG 0x303 /* S390 TOD programmable register */
+ /* note name must be "LINUX". */
+#define NT_S390_CTRS 0x304 /* S390 control registers */
+ /* note name must be "LINUX". */
+#define NT_S390_PREFIX 0x305 /* S390 prefix register */
+ /* note name must be "LINUX". */
+#define NT_S390_LAST_BREAK 0x306 /* S390 breaking event address */
+ /* note name must be "LINUX". */
+#define NT_S390_SYSTEM_CALL 0x307 /* S390 system call restart data */
+ /* note name must be "LINUX". */
+#define NT_S390_TDB 0x308 /* S390 transaction diagnostic block */
+ /* note name must be "LINUX". */
+#define NT_S390_VXRS_LOW 0x309 /* S390 vector registers 0-15 upper half */
+ /* note name must be "LINUX". */
+#define NT_S390_VXRS_HIGH 0x30a /* S390 vector registers 16-31 */
+ /* note name must be "LINUX". */
+#define NT_S390_GS_CB 0x30b /* s390 guarded storage registers */
+ /* note name must be "LINUX". */
+#define NT_S390_GS_BC 0x30c /* s390 guarded storage broadcast control block */
+ /* note name must be "LINUX". */
+#define NT_ARM_VFP 0x400 /* ARM VFP registers */
+/* The following definitions should really use NT_AARCH_..., but defined
+ this way for compatibility with Linux. */
+#define NT_ARM_TLS 0x401 /* AArch TLS registers */
+ /* note name must be "LINUX". */
+#define NT_ARM_HW_BREAK 0x402 /* AArch hardware breakpoint registers */
+ /* note name must be "LINUX". */
+#define NT_ARM_HW_WATCH 0x403 /* AArch hardware watchpoint registers */
+ /* note name must be "LINUX". */
+#define NT_ARM_SVE 0x405 /* AArch SVE registers. */
+ /* note name must be "LINUX". */
+#define NT_ARM_PAC_MASK 0x406 /* AArch pointer authentication code masks */
+ /* note name must be "LINUX". */
+#define NT_ARC_V2 0x600 /* ARC HS accumulator/extra registers. */
+ /* note name must be "LINUX". */
+#define NT_SIGINFO 0x53494749 /* Fields of siginfo_t. */
+#define NT_FILE 0x46494c45 /* Description of mapped files. */
+
+/* Note segments for core files on dir-style procfs systems. */
+
+#define NT_PSTATUS 10 /* Has a struct pstatus */
+#define NT_FPREGS 12 /* Has a struct fpregset */
+#define NT_PSINFO 13 /* Has a struct psinfo */
+#define NT_LWPSTATUS 16 /* Has a struct lwpstatus_t */
+#define NT_LWPSINFO 17 /* Has a struct lwpsinfo_t */
+#define NT_WIN32PSTATUS 18 /* Has a struct win32_pstatus */
+
+/* Note segment for SystemTap probes. */
+#define NT_STAPSDT 3
+
+/* Note segments for core files on FreeBSD systems. Note name is
+ "FreeBSD". */
+
+#define NT_FREEBSD_THRMISC 7 /* Thread miscellaneous info. */
+#define NT_FREEBSD_PROCSTAT_PROC 8 /* Procstat proc data. */
+#define NT_FREEBSD_PROCSTAT_FILES 9 /* Procstat files data. */
+#define NT_FREEBSD_PROCSTAT_VMMAP 10 /* Procstat vmmap data. */
+#define NT_FREEBSD_PROCSTAT_GROUPS 11 /* Procstat groups data. */
+#define NT_FREEBSD_PROCSTAT_UMASK 12 /* Procstat umask data. */
+#define NT_FREEBSD_PROCSTAT_RLIMIT 13 /* Procstat rlimit data. */
+#define NT_FREEBSD_PROCSTAT_OSREL 14 /* Procstat osreldate data. */
+#define NT_FREEBSD_PROCSTAT_PSSTRINGS 15 /* Procstat ps_strings data. */
+#define NT_FREEBSD_PROCSTAT_AUXV 16 /* Procstat auxv data. */
+#define NT_FREEBSD_PTLWPINFO 17 /* Thread ptrace miscellaneous info. */
+
+/* Note segments for core files on NetBSD systems. Note name
+ must start with "NetBSD-CORE". */
+
+#define NT_NETBSDCORE_PROCINFO 1 /* Has a struct procinfo */
+#define NT_NETBSDCORE_AUXV 2 /* Has auxv data */
+#define NT_NETBSDCORE_LWPSTATUS 24 /* Has LWPSTATUS data */
+#define NT_NETBSDCORE_FIRSTMACH 32 /* start of machdep note types */
+
+
+/* Note segments for core files on OpenBSD systems. Note name is
+ "OpenBSD". */
+
+#define NT_OPENBSD_PROCINFO 10
+#define NT_OPENBSD_AUXV 11
+#define NT_OPENBSD_REGS 20
+#define NT_OPENBSD_FPREGS 21
+#define NT_OPENBSD_XFPREGS 22
+#define NT_OPENBSD_WCOOKIE 23
+
+
+/* Note segments for core files on SPU systems. Note name
+ must start with "SPU/". */
+
+#define NT_SPU 1
+
+/* Values of note segment descriptor types for object files. */
+
+#define NT_VERSION 1 /* Contains a version string. */
+#define NT_ARCH 2 /* Contains an architecture string. */
+
+/* Values for notes in non-core files using name "GNU". */
+
+#define NT_GNU_ABI_TAG 1
+#define NT_GNU_HWCAP 2 /* Used by ld.so and kernel vDSO. */
+#define NT_GNU_BUILD_ID 3 /* Generated by ld --build-id. */
+#define NT_GNU_GOLD_VERSION 4 /* Generated by gold. */
+#define NT_GNU_PROPERTY_TYPE_0 5 /* Generated by gcc. */
+
+#define NT_GNU_BUILD_ATTRIBUTE_OPEN 0x100
+#define NT_GNU_BUILD_ATTRIBUTE_FUNC 0x101
+
+#define GNU_BUILD_ATTRIBUTE_TYPE_NUMERIC '*'
+#define GNU_BUILD_ATTRIBUTE_TYPE_STRING '$'
+#define GNU_BUILD_ATTRIBUTE_TYPE_BOOL_TRUE '+'
+#define GNU_BUILD_ATTRIBUTE_TYPE_BOOL_FALSE '!'
+
+#define GNU_BUILD_ATTRIBUTE_VERSION 1
+#define GNU_BUILD_ATTRIBUTE_STACK_PROT 2
+#define GNU_BUILD_ATTRIBUTE_RELRO 3
+#define GNU_BUILD_ATTRIBUTE_STACK_SIZE 4
+#define GNU_BUILD_ATTRIBUTE_TOOL 5
+#define GNU_BUILD_ATTRIBUTE_ABI 6
+#define GNU_BUILD_ATTRIBUTE_PIC 7
+#define GNU_BUILD_ATTRIBUTE_SHORT_ENUM 8
+
+#define NOTE_GNU_PROPERTY_SECTION_NAME ".note.gnu.property"
+#define GNU_BUILD_ATTRS_SECTION_NAME ".gnu.build.attributes"
+
+/* Values used in GNU .note.gnu.property notes (NT_GNU_PROPERTY_TYPE_0). */
+#define GNU_PROPERTY_STACK_SIZE 1
+#define GNU_PROPERTY_NO_COPY_ON_PROTECTED 2
+
+/* Processor-specific semantics, lo */
+#define GNU_PROPERTY_LOPROC 0xc0000000
+/* Processor-specific semantics, hi */
+#define GNU_PROPERTY_HIPROC 0xdfffffff
+/* Application-specific semantics, lo */
+#define GNU_PROPERTY_LOUSER 0xe0000000
+/* Application-specific semantics, hi */
+#define GNU_PROPERTY_HIUSER 0xffffffff
+
+#define GNU_PROPERTY_X86_COMPAT_ISA_1_USED 0xc0000000
+#define GNU_PROPERTY_X86_COMPAT_ISA_1_NEEDED 0xc0000001
+
+#define GNU_PROPERTY_X86_COMPAT_ISA_1_486 (1U << 0)
+#define GNU_PROPERTY_X86_COMPAT_ISA_1_586 (1U << 1)
+#define GNU_PROPERTY_X86_COMPAT_ISA_1_686 (1U << 2)
+#define GNU_PROPERTY_X86_COMPAT_ISA_1_SSE (1U << 3)
+#define GNU_PROPERTY_X86_COMPAT_ISA_1_SSE2 (1U << 4)
+#define GNU_PROPERTY_X86_COMPAT_ISA_1_SSE3 (1U << 5)
+#define GNU_PROPERTY_X86_COMPAT_ISA_1_SSSE3 (1U << 6)
+#define GNU_PROPERTY_X86_COMPAT_ISA_1_SSE4_1 (1U << 7)
+#define GNU_PROPERTY_X86_COMPAT_ISA_1_SSE4_2 (1U << 8)
+#define GNU_PROPERTY_X86_COMPAT_ISA_1_AVX (1U << 9)
+#define GNU_PROPERTY_X86_COMPAT_ISA_1_AVX2 (1U << 10)
+#define GNU_PROPERTY_X86_COMPAT_ISA_1_AVX512F (1U << 11)
+#define GNU_PROPERTY_X86_COMPAT_ISA_1_AVX512CD (1U << 12)
+#define GNU_PROPERTY_X86_COMPAT_ISA_1_AVX512ER (1U << 13)
+#define GNU_PROPERTY_X86_COMPAT_ISA_1_AVX512PF (1U << 14)
+#define GNU_PROPERTY_X86_COMPAT_ISA_1_AVX512VL (1U << 15)
+#define GNU_PROPERTY_X86_COMPAT_ISA_1_AVX512DQ (1U << 16)
+#define GNU_PROPERTY_X86_COMPAT_ISA_1_AVX512BW (1U << 17)
+
+/* A 4-byte unsigned integer property: A bit is set if it is set in all
+ relocatable inputs. */
+#define GNU_PROPERTY_X86_UINT32_AND_LO 0xc0000002
+#define GNU_PROPERTY_X86_UINT32_AND_HI 0xc0007fff
+
+/* A 4-byte unsigned integer property: A bit is set if it is set in any
+ relocatable inputs. */
+#define GNU_PROPERTY_X86_UINT32_OR_LO 0xc0008000
+#define GNU_PROPERTY_X86_UINT32_OR_HI 0xc000ffff
+
+/* A 4-byte unsigned integer property: A bit is set if it is set in any
+ relocatable inputs and the property is present in all relocatable
+ inputs. */
+#define GNU_PROPERTY_X86_UINT32_OR_AND_LO 0xc0010000
+#define GNU_PROPERTY_X86_UINT32_OR_AND_HI 0xc0017fff
+
+#define GNU_PROPERTY_X86_FEATURE_1_AND \
+ (GNU_PROPERTY_X86_UINT32_AND_LO + 0)
+
+#define GNU_PROPERTY_X86_ISA_1_NEEDED \
+ (GNU_PROPERTY_X86_UINT32_OR_LO + 0)
+#define GNU_PROPERTY_X86_FEATURE_2_NEEDED \
+ (GNU_PROPERTY_X86_UINT32_OR_LO + 1)
+
+#define GNU_PROPERTY_X86_ISA_1_USED \
+ (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 0)
+#define GNU_PROPERTY_X86_FEATURE_2_USED \
+ (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 1)
+
+#define GNU_PROPERTY_X86_FEATURE_1_IBT (1U << 0)
+#define GNU_PROPERTY_X86_FEATURE_1_SHSTK (1U << 1)
+
+#define GNU_PROPERTY_X86_ISA_1_CMOV (1U << 0)
+#define GNU_PROPERTY_X86_ISA_1_SSE (1U << 1)
+#define GNU_PROPERTY_X86_ISA_1_SSE2 (1U << 2)
+#define GNU_PROPERTY_X86_ISA_1_SSE3 (1U << 3)
+#define GNU_PROPERTY_X86_ISA_1_SSSE3 (1U << 4)
+#define GNU_PROPERTY_X86_ISA_1_SSE4_1 (1U << 5)
+#define GNU_PROPERTY_X86_ISA_1_SSE4_2 (1U << 6)
+#define GNU_PROPERTY_X86_ISA_1_AVX (1U << 7)
+#define GNU_PROPERTY_X86_ISA_1_AVX2 (1U << 8)
+#define GNU_PROPERTY_X86_ISA_1_FMA (1U << 9)
+#define GNU_PROPERTY_X86_ISA_1_AVX512F (1U << 10)
+#define GNU_PROPERTY_X86_ISA_1_AVX512CD (1U << 11)
+#define GNU_PROPERTY_X86_ISA_1_AVX512ER (1U << 12)
+#define GNU_PROPERTY_X86_ISA_1_AVX512PF (1U << 13)
+#define GNU_PROPERTY_X86_ISA_1_AVX512VL (1U << 14)
+#define GNU_PROPERTY_X86_ISA_1_AVX512DQ (1U << 15)
+#define GNU_PROPERTY_X86_ISA_1_AVX512BW (1U << 16)
+#define GNU_PROPERTY_X86_ISA_1_AVX512_4FMAPS (1U << 17)
+#define GNU_PROPERTY_X86_ISA_1_AVX512_4VNNIW (1U << 18)
+#define GNU_PROPERTY_X86_ISA_1_AVX512_BITALG (1U << 19)
+#define GNU_PROPERTY_X86_ISA_1_AVX512_IFMA (1U << 20)
+#define GNU_PROPERTY_X86_ISA_1_AVX512_VBMI (1U << 21)
+#define GNU_PROPERTY_X86_ISA_1_AVX512_VBMI2 (1U << 22)
+#define GNU_PROPERTY_X86_ISA_1_AVX512_VNNI (1U << 23)
+#define GNU_PROPERTY_X86_ISA_1_AVX512_BF16 (1U << 24)
+
+#define GNU_PROPERTY_X86_FEATURE_2_X86 (1U << 0)
+#define GNU_PROPERTY_X86_FEATURE_2_X87 (1U << 1)
+#define GNU_PROPERTY_X86_FEATURE_2_MMX (1U << 2)
+#define GNU_PROPERTY_X86_FEATURE_2_XMM (1U << 3)
+#define GNU_PROPERTY_X86_FEATURE_2_YMM (1U << 4)
+#define GNU_PROPERTY_X86_FEATURE_2_ZMM (1U << 5)
+#define GNU_PROPERTY_X86_FEATURE_2_FXSR (1U << 6)
+#define GNU_PROPERTY_X86_FEATURE_2_XSAVE (1U << 7)
+#define GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT (1U << 8)
+#define GNU_PROPERTY_X86_FEATURE_2_XSAVEC (1U << 9)
+
+/* AArch64 specific GNU PROPERTY. */
+#define GNU_PROPERTY_AARCH64_FEATURE_1_AND 0xc0000000
+
+#define GNU_PROPERTY_AARCH64_FEATURE_1_BTI (1U << 0)
+#define GNU_PROPERTY_AARCH64_FEATURE_1_PAC (1U << 1)
+
+/* Values used in GNU .note.ABI-tag notes (NT_GNU_ABI_TAG). */
+#define GNU_ABI_TAG_LINUX 0
+#define GNU_ABI_TAG_HURD 1
+#define GNU_ABI_TAG_SOLARIS 2
+#define GNU_ABI_TAG_FREEBSD 3
+#define GNU_ABI_TAG_NETBSD 4
+#define GNU_ABI_TAG_SYLLABLE 5
+#define GNU_ABI_TAG_NACL 6
+
+/* Values for NetBSD .note.netbsd.ident notes. Note name is "NetBSD". */
+
+#define NT_NETBSD_IDENT 1
+#define NT_NETBSD_MARCH 5
+
+/* Values for OpenBSD .note.openbsd.ident notes. Note name is "OpenBSD". */
+
+#define NT_OPENBSD_IDENT 1
+
+/* Values for FreeBSD .note.ABI-tag notes. Note name is "FreeBSD". */
+
+#define NT_FREEBSD_ABI_TAG 1
+
+/* These three macros disassemble and assemble a symbol table st_info field,
+ which contains the symbol binding and symbol type. The STB_ and STT_
+ defines identify the binding and type. */
+
+#define ELF_ST_BIND(val) (((unsigned int)(val)) >> 4)
+#define ELF_ST_TYPE(val) ((val) & 0xF)
+#define ELF_ST_INFO(bind,type) (((bind) << 4) + ((type) & 0xF))
+
+/* The 64bit and 32bit versions of these macros are identical, but
+ the ELF spec defines them, so here they are. */
+#define ELF32_ST_BIND ELF_ST_BIND
+#define ELF32_ST_TYPE ELF_ST_TYPE
+#define ELF32_ST_INFO ELF_ST_INFO
+#define ELF64_ST_BIND ELF_ST_BIND
+#define ELF64_ST_TYPE ELF_ST_TYPE
+#define ELF64_ST_INFO ELF_ST_INFO
+
+/* This macro disassembles and assembles a symbol's visibility into
+ the st_other field. The STV_ defines specify the actual visibility. */
+
+#define ELF_ST_VISIBILITY(v) ((v) & 0x3)
+/* The remaining bits in the st_other field are not currently used.
+ They should be set to zero. */
+
+#define ELF32_ST_VISIBILITY ELF_ST_VISIBILITY
+#define ELF64_ST_VISIBILITY ELF_ST_VISIBILITY
+
+
+#define STN_UNDEF 0 /* Undefined symbol index */
+
+#define STB_LOCAL 0 /* Symbol not visible outside obj */
+#define STB_GLOBAL 1 /* Symbol visible outside obj */
+#define STB_WEAK 2 /* Like globals, lower precedence */
+#define STB_LOOS 10 /* OS-specific semantics */
+#define STB_GNU_UNIQUE 10 /* Symbol is unique in namespace */
+#define STB_HIOS 12 /* OS-specific semantics */
+#define STB_LOPROC 13 /* Processor-specific semantics */
+#define STB_HIPROC 15 /* Processor-specific semantics */
+
+#define STT_NOTYPE 0 /* Symbol type is unspecified */
+#define STT_OBJECT 1 /* Symbol is a data object */
+#define STT_FUNC 2 /* Symbol is a code object */
+#define STT_SECTION 3 /* Symbol associated with a section */
+#define STT_FILE 4 /* Symbol gives a file name */
+#define STT_COMMON 5 /* An uninitialised common block */
+#define STT_TLS 6 /* Thread local data object */
+#define STT_RELC 8 /* Complex relocation expression */
+#define STT_SRELC 9 /* Signed Complex relocation expression */
+#define STT_LOOS 10 /* OS-specific semantics */
+#define STT_GNU_IFUNC 10 /* Symbol is an indirect code object */
+#define STT_HIOS 12 /* OS-specific semantics */
+#define STT_LOPROC 13 /* Processor-specific semantics */
+#define STT_HIPROC 15 /* Processor-specific semantics */
+
+/* The following constants control how a symbol may be accessed once it has
+ become part of an executable or shared library. */
+
+#define STV_DEFAULT 0 /* Visibility is specified by binding type */
+#define STV_INTERNAL 1 /* OS specific version of STV_HIDDEN */
+#define STV_HIDDEN 2 /* Can only be seen inside currect component */
+#define STV_PROTECTED 3 /* Treat as STB_LOCAL inside current component */
+
+/* Relocation info handling macros. */
+
+#define ELF32_R_SYM(i) ((i) >> 8)
+#define ELF32_R_TYPE(i) ((i) & 0xff)
+#define ELF32_R_INFO(s,t) (((s) << 8) + ((t) & 0xff))
+
+#define ELF64_R_SYM(i) ((i) >> 32)
+#define ELF64_R_TYPE(i) ((i) & 0xffffffff)
+#define ELF64_R_INFO(s,t) (((bfd_vma) (s) << 31 << 1) + (bfd_vma) (t))
+
+/* Dynamic section tags. */
+
+#define DT_NULL 0
+#define DT_NEEDED 1
+#define DT_PLTRELSZ 2
+#define DT_PLTGOT 3
+#define DT_HASH 4
+#define DT_STRTAB 5
+#define DT_SYMTAB 6
+#define DT_RELA 7
+#define DT_RELASZ 8
+#define DT_RELAENT 9
+#define DT_STRSZ 10
+#define DT_SYMENT 11
+#define DT_INIT 12
+#define DT_FINI 13
+#define DT_SONAME 14
+#define DT_RPATH 15
+#define DT_SYMBOLIC 16
+#define DT_REL 17
+#define DT_RELSZ 18
+#define DT_RELENT 19
+#define DT_PLTREL 20
+#define DT_DEBUG 21
+#define DT_TEXTREL 22
+#define DT_JMPREL 23
+#define DT_BIND_NOW 24
+#define DT_INIT_ARRAY 25
+#define DT_FINI_ARRAY 26
+#define DT_INIT_ARRAYSZ 27
+#define DT_FINI_ARRAYSZ 28
+#define DT_RUNPATH 29
+#define DT_FLAGS 30
+#define DT_ENCODING 32
+#define DT_PREINIT_ARRAY 32
+#define DT_PREINIT_ARRAYSZ 33
+#define DT_SYMTAB_SHNDX 34
+
+/* Note, the Oct 4, 1999 draft of the ELF ABI changed the values
+ for DT_LOOS and DT_HIOS. Some implementations however, use
+ values outside of the new range (see below). */
+#define OLD_DT_LOOS 0x60000000
+#define DT_LOOS 0x6000000d
+#define DT_HIOS 0x6ffff000
+#define OLD_DT_HIOS 0x6fffffff
+
+#define DT_LOPROC 0x70000000
+#define DT_HIPROC 0x7fffffff
+
+/* The next 2 dynamic tag ranges, integer value range (DT_VALRNGLO to
+ DT_VALRNGHI) and virtual address range (DT_ADDRRNGLO to DT_ADDRRNGHI),
+ are used on Solaris. We support them everywhere. Note these values
+ lie outside of the (new) range for OS specific values. This is a
+ deliberate special case and we maintain it for backwards compatability.
+ */
+#define DT_VALRNGLO 0x6ffffd00
+#define DT_GNU_PRELINKED 0x6ffffdf5
+#define DT_GNU_CONFLICTSZ 0x6ffffdf6
+#define DT_GNU_LIBLISTSZ 0x6ffffdf7
+#define DT_CHECKSUM 0x6ffffdf8
+#define DT_PLTPADSZ 0x6ffffdf9
+#define DT_MOVEENT 0x6ffffdfa
+#define DT_MOVESZ 0x6ffffdfb
+#define DT_FEATURE 0x6ffffdfc
+#define DT_POSFLAG_1 0x6ffffdfd
+#define DT_SYMINSZ 0x6ffffdfe
+#define DT_SYMINENT 0x6ffffdff
+#define DT_VALRNGHI 0x6ffffdff
+
+#define DT_ADDRRNGLO 0x6ffffe00
+#define DT_GNU_HASH 0x6ffffef5
+#define DT_TLSDESC_PLT 0x6ffffef6
+#define DT_TLSDESC_GOT 0x6ffffef7
+#define DT_GNU_CONFLICT 0x6ffffef8
+#define DT_GNU_LIBLIST 0x6ffffef9
+#define DT_CONFIG 0x6ffffefa
+#define DT_DEPAUDIT 0x6ffffefb
+#define DT_AUDIT 0x6ffffefc
+#define DT_PLTPAD 0x6ffffefd
+#define DT_MOVETAB 0x6ffffefe
+#define DT_SYMINFO 0x6ffffeff
+#define DT_ADDRRNGHI 0x6ffffeff
+
+#define DT_RELACOUNT 0x6ffffff9
+#define DT_RELCOUNT 0x6ffffffa
+#define DT_FLAGS_1 0x6ffffffb
+#define DT_VERDEF 0x6ffffffc
+#define DT_VERDEFNUM 0x6ffffffd
+#define DT_VERNEED 0x6ffffffe
+#define DT_VERNEEDNUM 0x6fffffff
+
+/* This tag is a GNU extension to the Solaris version scheme. */
+#define DT_VERSYM 0x6ffffff0
+
+#define DT_LOPROC 0x70000000
+#define DT_HIPROC 0x7fffffff
+
+/* These section tags are used on Solaris. We support them
+ everywhere, and hope they do not conflict. */
+
+#define DT_AUXILIARY 0x7ffffffd
+#define DT_USED 0x7ffffffe
+#define DT_FILTER 0x7fffffff
+
+
+/* Values used in DT_FEATURE .dynamic entry. */
+#define DTF_1_PARINIT 0x00000001
+/* From
+
+ http://docs.sun.com:80/ab2/coll.45.13/LLM/@Ab2PageView/21165?Ab2Lang=C&Ab2Enc=iso-8859-1
+
+ DTF_1_CONFEXP is the same as DTF_1_PARINIT. It is a typo. The value
+ defined here is the same as the one in on Solaris 8. */
+#define DTF_1_CONFEXP 0x00000002
+
+/* Flag values used in the DT_POSFLAG_1 .dynamic entry. */
+#define DF_P1_LAZYLOAD 0x00000001
+#define DF_P1_GROUPPERM 0x00000002
+
+/* Flag value in in the DT_FLAGS_1 .dynamic entry. */
+#define DF_1_NOW 0x00000001
+#define DF_1_GLOBAL 0x00000002
+#define DF_1_GROUP 0x00000004
+#define DF_1_NODELETE 0x00000008
+#define DF_1_LOADFLTR 0x00000010
+#define DF_1_INITFIRST 0x00000020
+#define DF_1_NOOPEN 0x00000040
+#define DF_1_ORIGIN 0x00000080
+#define DF_1_DIRECT 0x00000100
+#define DF_1_TRANS 0x00000200
+#define DF_1_INTERPOSE 0x00000400
+#define DF_1_NODEFLIB 0x00000800
+#define DF_1_NODUMP 0x00001000
+#define DF_1_CONFALT 0x00002000
+#define DF_1_ENDFILTEE 0x00004000
+#define DF_1_DISPRELDNE 0x00008000
+#define DF_1_DISPRELPND 0x00010000
+#define DF_1_NODIRECT 0x00020000
+#define DF_1_IGNMULDEF 0x00040000
+#define DF_1_NOKSYMS 0x00080000
+#define DF_1_NOHDR 0x00100000
+#define DF_1_EDITED 0x00200000
+#define DF_1_NORELOC 0x00400000
+#define DF_1_SYMINTPOSE 0x00800000
+#define DF_1_GLOBAUDIT 0x01000000
+#define DF_1_SINGLETON 0x02000000
+#define DF_1_STUB 0x04000000
+#define DF_1_PIE 0x08000000
+#define DF_1_KMOD 0x10000000
+#define DF_1_WEAKFILTER 0x20000000
+#define DF_1_NOCOMMON 0x40000000
+
+/* Flag values for the DT_FLAGS entry. */
+#define DF_ORIGIN (1 << 0)
+#define DF_SYMBOLIC (1 << 1)
+#define DF_TEXTREL (1 << 2)
+#define DF_BIND_NOW (1 << 3)
+#define DF_STATIC_TLS (1 << 4)
+
+/* These constants are used for the version number of a Elf32_Verdef
+ structure. */
+
+#define VER_DEF_NONE 0
+#define VER_DEF_CURRENT 1
+
+/* These constants appear in the vd_flags field of a Elf32_Verdef
+ structure.
+
+ Cf. the Solaris Linker and Libraries Guide, Ch. 7, Object File Format,
+ Versioning Sections, for a description:
+
+ http://docs.sun.com/app/docs/doc/819-0690/chapter6-93046?l=en&a=view */
+
+#define VER_FLG_BASE 0x1
+#define VER_FLG_WEAK 0x2
+#define VER_FLG_INFO 0x4
+
+/* These special constants can be found in an Elf32_Versym field. */
+
+#define VER_NDX_LOCAL 0
+#define VER_NDX_GLOBAL 1
+
+/* These constants are used for the version number of a Elf32_Verneed
+ structure. */
+
+#define VER_NEED_NONE 0
+#define VER_NEED_CURRENT 1
+
+/* This flag appears in a Versym structure. It means that the symbol
+ is hidden, and is only visible with an explicit version number.
+ This is a GNU extension. */
+
+#define VERSYM_HIDDEN 0x8000
+
+/* This is the mask for the rest of the Versym information. */
+
+#define VERSYM_VERSION 0x7fff
+
+/* This is a special token which appears as part of a symbol name. It
+ indictes that the rest of the name is actually the name of a
+ version node, and is not part of the actual name. This is a GNU
+ extension. For example, the symbol name `stat@ver2' is taken to
+ mean the symbol `stat' in version `ver2'. */
+
+#define ELF_VER_CHR '@'
+
+/* Possible values for si_boundto. */
+
+#define SYMINFO_BT_SELF 0xffff /* Symbol bound to self */
+#define SYMINFO_BT_PARENT 0xfffe /* Symbol bound to parent */
+#define SYMINFO_BT_LOWRESERVE 0xff00 /* Beginning of reserved entries */
+
+/* Possible bitmasks for si_flags. */
+
+#define SYMINFO_FLG_DIRECT 0x0001 /* Direct bound symbol */
+#define SYMINFO_FLG_PASSTHRU 0x0002 /* Pass-thru symbol for translator */
+#define SYMINFO_FLG_COPY 0x0004 /* Symbol is a copy-reloc */
+#define SYMINFO_FLG_LAZYLOAD 0x0008 /* Symbol bound to object to be lazy loaded */
+
+/* Syminfo version values. */
+
+#define SYMINFO_NONE 0
+#define SYMINFO_CURRENT 1
+#define SYMINFO_NUM 2
+
+/* Section Group Flags. */
+
+#define GRP_COMDAT 0x1 /* A COMDAT group */
+#define GRP_MASKOS 0x0ff00000 /* Bits in this range reserved for OS specific use. */
+#define GRP_MASKPROC 0xf0000000 /* Bits in this range reserved for processor use. */
+
+/* Auxv a_type values. */
+
+#define AT_NULL 0 /* End of vector */
+#define AT_IGNORE 1 /* Entry should be ignored */
+#define AT_EXECFD 2 /* File descriptor of program */
+#define AT_PHDR 3 /* Program headers for program */
+#define AT_PHENT 4 /* Size of program header entry */
+#define AT_PHNUM 5 /* Number of program headers */
+#define AT_PAGESZ 6 /* System page size */
+#define AT_BASE 7 /* Base address of interpreter */
+#define AT_FLAGS 8 /* Flags */
+#define AT_ENTRY 9 /* Entry point of program */
+#define AT_NOTELF 10 /* Program is not ELF */
+#define AT_UID 11 /* Real uid */
+#define AT_EUID 12 /* Effective uid */
+#define AT_GID 13 /* Real gid */
+#define AT_EGID 14 /* Effective gid */
+#define AT_CLKTCK 17 /* Frequency of times() */
+#define AT_PLATFORM 15 /* String identifying platform. */
+#define AT_HWCAP 16 /* Machine dependent hints about
+ processor capabilities. */
+#define AT_FPUCW 18 /* Used FPU control word. */
+#define AT_DCACHEBSIZE 19 /* Data cache block size. */
+#define AT_ICACHEBSIZE 20 /* Instruction cache block size. */
+#define AT_UCACHEBSIZE 21 /* Unified cache block size. */
+#define AT_IGNOREPPC 22 /* Entry should be ignored */
+#define AT_SECURE 23 /* Boolean, was exec setuid-like? */
+#define AT_BASE_PLATFORM 24 /* String identifying real platform,
+ may differ from AT_PLATFORM. */
+#define AT_RANDOM 25 /* Address of 16 random bytes. */
+#define AT_HWCAP2 26 /* Extension of AT_HWCAP. */
+#define AT_EXECFN 31 /* Filename of executable. */
+/* Pointer to the global system page used for system calls and other
+ nice things. */
+#define AT_SYSINFO 32
+#define AT_SYSINFO_EHDR 33 /* Pointer to ELF header of system-supplied DSO. */
+
+/* More complete cache descriptions than AT_[DIU]CACHEBSIZE. If the
+ value is -1, then the cache doesn't exist. Otherwise:
+
+ bit 0-3: Cache set-associativity; 0 means fully associative.
+ bit 4-7: Log2 of cacheline size.
+ bit 8-31: Size of the entire cache >> 8. */
+
+#define AT_L1I_CACHESHAPE 34
+#define AT_L1D_CACHESHAPE 35
+#define AT_L2_CACHESHAPE 36
+#define AT_L3_CACHESHAPE 37
+
+/* Shapes of the caches, with more room to describe them.
+ *GEOMETRY are comprised of cache line size in bytes in the bottom 16 bits
+ and the cache associativity in the next 16 bits. */
+#define AT_L1I_CACHESIZE 40
+#define AT_L1I_CACHEGEOMETRY 41
+#define AT_L1D_CACHESIZE 42
+#define AT_L1D_CACHEGEOMETRY 43
+#define AT_L2_CACHESIZE 44
+#define AT_L2_CACHEGEOMETRY 45
+#define AT_L3_CACHESIZE 46
+#define AT_L3_CACHEGEOMETRY 47
+
+#define AT_MINSIGSTKSZ 51 /* Stack needed for signal delivery
+ (AArch64). */
+
+#define AT_FREEBSD_EXECPATH 15 /* Path to the executable. */
+#define AT_FREEBSD_CANARY 16 /* Canary for SSP. */
+#define AT_FREEBSD_CANARYLEN 17 /* Length of the canary. */
+#define AT_FREEBSD_OSRELDATE 18 /* OSRELDATE. */
+#define AT_FREEBSD_NCPUS 19 /* Number of CPUs. */
+#define AT_FREEBSD_PAGESIZES 20 /* Pagesizes. */
+#define AT_FREEBSD_PAGESIZESLEN 21 /* Number of pagesizes. */
+#define AT_FREEBSD_TIMEKEEP 22 /* Pointer to timehands. */
+#define AT_FREEBSD_STACKPROT 23 /* Initial stack protection. */
+#define AT_FREEBSD_EHDRFLAGS 24 /* e_flags field from ELF header. */
+#define AT_FREEBSD_HWCAP 25 /* CPU feature flags. */
+#define AT_FREEBSD_HWCAP2 26 /* CPU feature flags 2. */
+#define AT_FREEBSD_BSDFLAGS 27 /* ELF BSD Flags. */
+
+#define AT_SUN_UID 2000 /* Effective user ID. */
+#define AT_SUN_RUID 2001 /* Real user ID. */
+#define AT_SUN_GID 2002 /* Effective group ID. */
+#define AT_SUN_RGID 2003 /* Real group ID. */
+#define AT_SUN_LDELF 2004 /* Dynamic linker's ELF header. */
+#define AT_SUN_LDSHDR 2005 /* Dynamic linker's section headers. */
+#define AT_SUN_LDNAME 2006 /* String giving name of dynamic linker. */
+#define AT_SUN_LPAGESZ 2007 /* Large pagesize. */
+#define AT_SUN_PLATFORM 2008 /* Platform name string. */
+#define AT_SUN_CAP_HW1 2009 /* Machine dependent hints about
+ processor capabilities. */
+#define AT_SUN_HWCAP AT_SUN_CAP_HW1 /* For backward compat only. */
+#define AT_SUN_IFLUSH 2010 /* Should flush icache? */
+#define AT_SUN_CPU 2011 /* CPU name string. */
+#define AT_SUN_EMUL_ENTRY 2012 /* COFF entry point address. */
+#define AT_SUN_EMUL_EXECFD 2013 /* COFF executable file descriptor. */
+#define AT_SUN_EXECNAME 2014 /* Canonicalized file name given to execve. */
+#define AT_SUN_MMU 2015 /* String for name of MMU module. */
+#define AT_SUN_LDDATA 2016 /* Dynamic linker's data segment address. */
+#define AT_SUN_AUXFLAGS 2017 /* AF_SUN_ flags passed from the kernel. */
+#define AT_SUN_EMULATOR 2018 /* Name of emulation binary for runtime
+ linker. */
+#define AT_SUN_BRANDNAME 2019 /* Name of brand library. */
+#define AT_SUN_BRAND_AUX1 2020 /* Aux vectors for brand modules. */
+#define AT_SUN_BRAND_AUX2 2021
+#define AT_SUN_BRAND_AUX3 2022
+#define AT_SUN_CAP_HW2 2023 /* Extension of AT_SUN_CAP_HW1. */
+
+#endif /* _ELF_COMMON_H */
diff --git a/include/pk-syscall.h b/include/pk-syscall.h
new file mode 100644
index 0000000..60355ae
--- /dev/null
+++ b/include/pk-syscall.h
@@ -0,0 +1,77 @@
+// See LICENSE for license details.
+
+#ifndef _PK_SYSCALL_H
+#define _PK_SYSCALL_H
+
+#define SYS_exit 93
+#define SYS_exit_group 94
+#define SYS_getpid 172
+#define SYS_kill 129
+#define SYS_read 63
+#define SYS_write 64
+#define SYS_openat 56
+#define SYS_close 57
+#define SYS_lseek 62
+#define SYS_brk 214
+#define SYS_linkat 37
+#define SYS_unlinkat 35
+#define SYS_mkdirat 34
+#define SYS_renameat 38
+#define SYS_chdir 49
+#define SYS_getcwd 17
+#define SYS_fstat 80
+#define SYS_fstatat 79
+#define SYS_faccessat 48
+#define SYS_pread 67
+#define SYS_pwrite 68
+#define SYS_uname 160
+#define SYS_getuid 174
+#define SYS_geteuid 175
+#define SYS_getgid 176
+#define SYS_getegid 177
+#define SYS_mmap 222
+#define SYS_munmap 215
+#define SYS_mremap 216
+#define SYS_mprotect 226
+#define SYS_prlimit64 261
+#define SYS_getmainvars 2011
+#define SYS_rt_sigaction 134
+#define SYS_writev 66
+#define SYS_gettimeofday 169
+#define SYS_times 153
+#define SYS_fcntl 25
+#define SYS_ftruncate 46
+#define SYS_getdents 61
+#define SYS_dup 23
+#define SYS_dup3 24
+#define SYS_readlinkat 78
+#define SYS_rt_sigprocmask 135
+#define SYS_ioctl 29
+#define SYS_getrlimit 163
+#define SYS_setrlimit 164
+#define SYS_getrusage 165
+#define SYS_clock_gettime 113
+#define SYS_set_tid_address 96
+#define SYS_set_robust_list 99
+#define SYS_madvise 233
+
+#define OLD_SYSCALL_THRESHOLD 1024
+#define SYS_open 1024
+#define SYS_link 1025
+#define SYS_unlink 1026
+#define SYS_mkdir 1030
+#define SYS_access 1033
+#define SYS_stat 1038
+#define SYS_lstat 1039
+#define SYS_time 1062
+
+#define IS_ERR_VALUE(x) ((unsigned long)(x) >= (unsigned long)-4096)
+#define ERR_PTR(x) ((void*)(long)(x))
+#define PTR_ERR(x) ((long)(x))
+
+#undef AT_FDCWD
+#define AT_FDCWD -100
+
+long do_syscall(long a0, long a1, long a2, long a3, long a4, long a5, unsigned long n);
+
+#endif
diff --git a/include/riscv-opc.h b/include/riscv-opc.h
new file mode 100644
index 0000000..f09200c
--- /dev/null
+++ b/include/riscv-opc.h
@@ -0,0 +1,1384 @@
+/* Automatically generated by parse-opcodes. */
+#ifndef RISCV_ENCODING_H
+#define RISCV_ENCODING_H
+#define MATCH_SLLI_RV32 0x1013
+#define MASK_SLLI_RV32 0xfe00707f
+#define MATCH_SRLI_RV32 0x5013
+#define MASK_SRLI_RV32 0xfe00707f
+#define MATCH_SRAI_RV32 0x40005013
+#define MASK_SRAI_RV32 0xfe00707f
+#define MATCH_FRFLAGS 0x102073
+#define MASK_FRFLAGS 0xfffff07f
+#define MATCH_FSFLAGS 0x101073
+#define MASK_FSFLAGS 0xfff0707f
+#define MATCH_FSFLAGSI 0x105073
+#define MASK_FSFLAGSI 0xfff0707f
+#define MATCH_FRRM 0x202073
+#define MASK_FRRM 0xfffff07f
+#define MATCH_FSRM 0x201073
+#define MASK_FSRM 0xfff0707f
+#define MATCH_FSRMI 0x205073
+#define MASK_FSRMI 0xfff0707f
+#define MATCH_FSCSR 0x301073
+#define MASK_FSCSR 0xfff0707f
+#define MATCH_FRCSR 0x302073
+#define MASK_FRCSR 0xfffff07f
+#define MATCH_RDCYCLE 0xc0002073
+#define MASK_RDCYCLE 0xfffff07f
+#define MATCH_RDTIME 0xc0102073
+#define MASK_RDTIME 0xfffff07f
+#define MATCH_RDINSTRET 0xc0202073
+#define MASK_RDINSTRET 0xfffff07f
+#define MATCH_RDCYCLEH 0xc8002073
+#define MASK_RDCYCLEH 0xfffff07f
+#define MATCH_RDTIMEH 0xc8102073
+#define MASK_RDTIMEH 0xfffff07f
+#define MATCH_RDINSTRETH 0xc8202073
+#define MASK_RDINSTRETH 0xfffff07f
+#define MATCH_SCALL 0x73
+#define MASK_SCALL 0xffffffff
+#define MATCH_SBREAK 0x100073
+#define MASK_SBREAK 0xffffffff
+#define MATCH_BEQ 0x63
+#define MASK_BEQ 0x707f
+#define MATCH_BNE 0x1063
+#define MASK_BNE 0x707f
+#define MATCH_BLT 0x4063
+#define MASK_BLT 0x707f
+#define MATCH_BGE 0x5063
+#define MASK_BGE 0x707f
+#define MATCH_BLTU 0x6063
+#define MASK_BLTU 0x707f
+#define MATCH_BGEU 0x7063
+#define MASK_BGEU 0x707f
+#define MATCH_JALR 0x67
+#define MASK_JALR 0x707f
+#define MATCH_JAL 0x6f
+#define MASK_JAL 0x7f
+#define MATCH_LUI 0x37
+#define MASK_LUI 0x7f
+#define MATCH_AUIPC 0x17
+#define MASK_AUIPC 0x7f
+#define MATCH_ADDI 0x13
+#define MASK_ADDI 0x707f
+#define MATCH_SLLI 0x1013
+#define MASK_SLLI 0xfc00707f
+#define MATCH_SLTI 0x2013
+#define MASK_SLTI 0x707f
+#define MATCH_SLTIU 0x3013
+#define MASK_SLTIU 0x707f
+#define MATCH_XORI 0x4013
+#define MASK_XORI 0x707f
+#define MATCH_SRLI 0x5013
+#define MASK_SRLI 0xfc00707f
+#define MATCH_SRAI 0x40005013
+#define MASK_SRAI 0xfc00707f
+#define MATCH_ORI 0x6013
+#define MASK_ORI 0x707f
+#define MATCH_ANDI 0x7013
+#define MASK_ANDI 0x707f
+#define MATCH_ADD 0x33
+#define MASK_ADD 0xfe00707f
+#define MATCH_SUB 0x40000033
+#define MASK_SUB 0xfe00707f
+#define MATCH_SLL 0x1033
+#define MASK_SLL 0xfe00707f
+#define MATCH_SLT 0x2033
+#define MASK_SLT 0xfe00707f
+#define MATCH_SLTU 0x3033
+#define MASK_SLTU 0xfe00707f
+#define MATCH_XOR 0x4033
+#define MASK_XOR 0xfe00707f
+#define MATCH_SRL 0x5033
+#define MASK_SRL 0xfe00707f
+#define MATCH_SRA 0x40005033
+#define MASK_SRA 0xfe00707f
+#define MATCH_OR 0x6033
+#define MASK_OR 0xfe00707f
+#define MATCH_AND 0x7033
+#define MASK_AND 0xfe00707f
+#define MATCH_ADDIW 0x1b
+#define MASK_ADDIW 0x707f
+#define MATCH_SLLIW 0x101b
+#define MASK_SLLIW 0xfe00707f
+#define MATCH_SRLIW 0x501b
+#define MASK_SRLIW 0xfe00707f
+#define MATCH_SRAIW 0x4000501b
+#define MASK_SRAIW 0xfe00707f
+#define MATCH_ADDW 0x3b
+#define MASK_ADDW 0xfe00707f
+#define MATCH_SUBW 0x4000003b
+#define MASK_SUBW 0xfe00707f
+#define MATCH_SLLW 0x103b
+#define MASK_SLLW 0xfe00707f
+#define MATCH_SRLW 0x503b
+#define MASK_SRLW 0xfe00707f
+#define MATCH_SRAW 0x4000503b
+#define MASK_SRAW 0xfe00707f
+#define MATCH_LB 0x3
+#define MASK_LB 0x707f
+#define MATCH_LH 0x1003
+#define MASK_LH 0x707f
+#define MATCH_LW 0x2003
+#define MASK_LW 0x707f
+#define MATCH_LD 0x3003
+#define MASK_LD 0x707f
+#define MATCH_LBU 0x4003
+#define MASK_LBU 0x707f
+#define MATCH_LHU 0x5003
+#define MASK_LHU 0x707f
+#define MATCH_LWU 0x6003
+#define MASK_LWU 0x707f
+#define MATCH_SB 0x23
+#define MASK_SB 0x707f
+#define MATCH_SH 0x1023
+#define MASK_SH 0x707f
+#define MATCH_SW 0x2023
+#define MASK_SW 0x707f
+#define MATCH_SD 0x3023
+#define MASK_SD 0x707f
+#define MATCH_FENCE 0xf
+#define MASK_FENCE 0x707f
+#define MATCH_FENCE_I 0x100f
+#define MASK_FENCE_I 0x707f
+#define MATCH_FENCE_TSO 0x8330000f
+#define MASK_FENCE_TSO 0xfff0707f
+#define MATCH_MUL 0x2000033
+#define MASK_MUL 0xfe00707f
+#define MATCH_MULH 0x2001033
+#define MASK_MULH 0xfe00707f
+#define MATCH_MULHSU 0x2002033
+#define MASK_MULHSU 0xfe00707f
+#define MATCH_MULHU 0x2003033
+#define MASK_MULHU 0xfe00707f
+#define MATCH_DIV 0x2004033
+#define MASK_DIV 0xfe00707f
+#define MATCH_DIVU 0x2005033
+#define MASK_DIVU 0xfe00707f
+#define MATCH_REM 0x2006033
+#define MASK_REM 0xfe00707f
+#define MATCH_REMU 0x2007033
+#define MASK_REMU 0xfe00707f
+#define MATCH_MULW 0x200003b
+#define MASK_MULW 0xfe00707f
+#define MATCH_DIVW 0x200403b
+#define MASK_DIVW 0xfe00707f
+#define MATCH_DIVUW 0x200503b
+#define MASK_DIVUW 0xfe00707f
+#define MATCH_REMW 0x200603b
+#define MASK_REMW 0xfe00707f
+#define MATCH_REMUW 0x200703b
+#define MASK_REMUW 0xfe00707f
+#define MATCH_AMOADD_W 0x202f
+#define MASK_AMOADD_W 0xf800707f
+#define MATCH_AMOXOR_W 0x2000202f
+#define MASK_AMOXOR_W 0xf800707f
+#define MATCH_AMOOR_W 0x4000202f
+#define MASK_AMOOR_W 0xf800707f
+#define MATCH_AMOAND_W 0x6000202f
+#define MASK_AMOAND_W 0xf800707f
+#define MATCH_AMOMIN_W 0x8000202f
+#define MASK_AMOMIN_W 0xf800707f
+#define MATCH_AMOMAX_W 0xa000202f
+#define MASK_AMOMAX_W 0xf800707f
+#define MATCH_AMOMINU_W 0xc000202f
+#define MASK_AMOMINU_W 0xf800707f
+#define MATCH_AMOMAXU_W 0xe000202f
+#define MASK_AMOMAXU_W 0xf800707f
+#define MATCH_AMOSWAP_W 0x800202f
+#define MASK_AMOSWAP_W 0xf800707f
+#define MATCH_LR_W 0x1000202f
+#define MASK_LR_W 0xf9f0707f
+#define MATCH_SC_W 0x1800202f
+#define MASK_SC_W 0xf800707f
+#define MATCH_AMOADD_D 0x302f
+#define MASK_AMOADD_D 0xf800707f
+#define MATCH_AMOXOR_D 0x2000302f
+#define MASK_AMOXOR_D 0xf800707f
+#define MATCH_AMOOR_D 0x4000302f
+#define MASK_AMOOR_D 0xf800707f
+#define MATCH_AMOAND_D 0x6000302f
+#define MASK_AMOAND_D 0xf800707f
+#define MATCH_AMOMIN_D 0x8000302f
+#define MASK_AMOMIN_D 0xf800707f
+#define MATCH_AMOMAX_D 0xa000302f
+#define MASK_AMOMAX_D 0xf800707f
+#define MATCH_AMOMINU_D 0xc000302f
+#define MASK_AMOMINU_D 0xf800707f
+#define MATCH_AMOMAXU_D 0xe000302f
+#define MASK_AMOMAXU_D 0xf800707f
+#define MATCH_AMOSWAP_D 0x800302f
+#define MASK_AMOSWAP_D 0xf800707f
+#define MATCH_LR_D 0x1000302f
+#define MASK_LR_D 0xf9f0707f
+#define MATCH_SC_D 0x1800302f
+#define MASK_SC_D 0xf800707f
+#define MATCH_ECALL 0x73
+#define MASK_ECALL 0xffffffff
+#define MATCH_EBREAK 0x100073
+#define MASK_EBREAK 0xffffffff
+#define MATCH_URET 0x200073
+#define MASK_URET 0xffffffff
+#define MATCH_SRET 0x10200073
+#define MASK_SRET 0xffffffff
+#define MATCH_HRET 0x20200073
+#define MASK_HRET 0xffffffff
+#define MATCH_MRET 0x30200073
+#define MASK_MRET 0xffffffff
+#define MATCH_DRET 0x7b200073
+#define MASK_DRET 0xffffffff
+#define MATCH_SFENCE_VM 0x10400073
+#define MASK_SFENCE_VM 0xfff07fff
+#define MATCH_SFENCE_VMA 0x12000073
+#define MASK_SFENCE_VMA 0xfe007fff
+#define MATCH_WFI 0x10500073
+#define MASK_WFI 0xffffffff
+#define MATCH_CSRRW 0x1073
+#define MASK_CSRRW 0x707f
+#define MATCH_CSRRS 0x2073
+#define MASK_CSRRS 0x707f
+#define MATCH_CSRRC 0x3073
+#define MASK_CSRRC 0x707f
+#define MATCH_CSRRWI 0x5073
+#define MASK_CSRRWI 0x707f
+#define MATCH_CSRRSI 0x6073
+#define MASK_CSRRSI 0x707f
+#define MATCH_CSRRCI 0x7073
+#define MASK_CSRRCI 0x707f
+#define MATCH_FADD_S 0x53
+#define MASK_FADD_S 0xfe00007f
+#define MATCH_FSUB_S 0x8000053
+#define MASK_FSUB_S 0xfe00007f
+#define MATCH_FMUL_S 0x10000053
+#define MASK_FMUL_S 0xfe00007f
+#define MATCH_FDIV_S 0x18000053
+#define MASK_FDIV_S 0xfe00007f
+#define MATCH_FSGNJ_S 0x20000053
+#define MASK_FSGNJ_S 0xfe00707f
+#define MATCH_FSGNJN_S 0x20001053
+#define MASK_FSGNJN_S 0xfe00707f
+#define MATCH_FSGNJX_S 0x20002053
+#define MASK_FSGNJX_S 0xfe00707f
+#define MATCH_FMIN_S 0x28000053
+#define MASK_FMIN_S 0xfe00707f
+#define MATCH_FMAX_S 0x28001053
+#define MASK_FMAX_S 0xfe00707f
+#define MATCH_FSQRT_S 0x58000053
+#define MASK_FSQRT_S 0xfff0007f
+#define MATCH_FADD_D 0x2000053
+#define MASK_FADD_D 0xfe00007f
+#define MATCH_FSUB_D 0xa000053
+#define MASK_FSUB_D 0xfe00007f
+#define MATCH_FMUL_D 0x12000053
+#define MASK_FMUL_D 0xfe00007f
+#define MATCH_FDIV_D 0x1a000053
+#define MASK_FDIV_D 0xfe00007f
+#define MATCH_FSGNJ_D 0x22000053
+#define MASK_FSGNJ_D 0xfe00707f
+#define MATCH_FSGNJN_D 0x22001053
+#define MASK_FSGNJN_D 0xfe00707f
+#define MATCH_FSGNJX_D 0x22002053
+#define MASK_FSGNJX_D 0xfe00707f
+#define MATCH_FMIN_D 0x2a000053
+#define MASK_FMIN_D 0xfe00707f
+#define MATCH_FMAX_D 0x2a001053
+#define MASK_FMAX_D 0xfe00707f
+#define MATCH_FCVT_S_D 0x40100053
+#define MASK_FCVT_S_D 0xfff0007f
+#define MATCH_FCVT_D_S 0x42000053
+#define MASK_FCVT_D_S 0xfff0007f
+#define MATCH_FSQRT_D 0x5a000053
+#define MASK_FSQRT_D 0xfff0007f
+#define MATCH_FADD_Q 0x6000053
+#define MASK_FADD_Q 0xfe00007f
+#define MATCH_FSUB_Q 0xe000053
+#define MASK_FSUB_Q 0xfe00007f
+#define MATCH_FMUL_Q 0x16000053
+#define MASK_FMUL_Q 0xfe00007f
+#define MATCH_FDIV_Q 0x1e000053
+#define MASK_FDIV_Q 0xfe00007f
+#define MATCH_FSGNJ_Q 0x26000053
+#define MASK_FSGNJ_Q 0xfe00707f
+#define MATCH_FSGNJN_Q 0x26001053
+#define MASK_FSGNJN_Q 0xfe00707f
+#define MATCH_FSGNJX_Q 0x26002053
+#define MASK_FSGNJX_Q 0xfe00707f
+#define MATCH_FMIN_Q 0x2e000053
+#define MASK_FMIN_Q 0xfe00707f
+#define MATCH_FMAX_Q 0x2e001053
+#define MASK_FMAX_Q 0xfe00707f
+#define MATCH_FCVT_S_Q 0x40300053
+#define MASK_FCVT_S_Q 0xfff0007f
+#define MATCH_FCVT_Q_S 0x46000053
+#define MASK_FCVT_Q_S 0xfff0007f
+#define MATCH_FCVT_D_Q 0x42300053
+#define MASK_FCVT_D_Q 0xfff0007f
+#define MATCH_FCVT_Q_D 0x46100053
+#define MASK_FCVT_Q_D 0xfff0007f
+#define MATCH_FSQRT_Q 0x5e000053
+#define MASK_FSQRT_Q 0xfff0007f
+#define MATCH_FLE_S 0xa0000053
+#define MASK_FLE_S 0xfe00707f
+#define MATCH_FLT_S 0xa0001053
+#define MASK_FLT_S 0xfe00707f
+#define MATCH_FEQ_S 0xa0002053
+#define MASK_FEQ_S 0xfe00707f
+#define MATCH_FLE_D 0xa2000053
+#define MASK_FLE_D 0xfe00707f
+#define MATCH_FLT_D 0xa2001053
+#define MASK_FLT_D 0xfe00707f
+#define MATCH_FEQ_D 0xa2002053
+#define MASK_FEQ_D 0xfe00707f
+#define MATCH_FLE_Q 0xa6000053
+#define MASK_FLE_Q 0xfe00707f
+#define MATCH_FLT_Q 0xa6001053
+#define MASK_FLT_Q 0xfe00707f
+#define MATCH_FEQ_Q 0xa6002053
+#define MASK_FEQ_Q 0xfe00707f
+#define MATCH_FCVT_W_S 0xc0000053
+#define MASK_FCVT_W_S 0xfff0007f
+#define MATCH_FCVT_WU_S 0xc0100053
+#define MASK_FCVT_WU_S 0xfff0007f
+#define MATCH_FCVT_L_S 0xc0200053
+#define MASK_FCVT_L_S 0xfff0007f
+#define MATCH_FCVT_LU_S 0xc0300053
+#define MASK_FCVT_LU_S 0xfff0007f
+#define MATCH_FMV_X_S 0xe0000053
+#define MASK_FMV_X_S 0xfff0707f
+#define MATCH_FCLASS_S 0xe0001053
+#define MASK_FCLASS_S 0xfff0707f
+#define MATCH_FCVT_W_D 0xc2000053
+#define MASK_FCVT_W_D 0xfff0007f
+#define MATCH_FCVT_WU_D 0xc2100053
+#define MASK_FCVT_WU_D 0xfff0007f
+#define MATCH_FCVT_L_D 0xc2200053
+#define MASK_FCVT_L_D 0xfff0007f
+#define MATCH_FCVT_LU_D 0xc2300053
+#define MASK_FCVT_LU_D 0xfff0007f
+#define MATCH_FMV_X_D 0xe2000053
+#define MASK_FMV_X_D 0xfff0707f
+#define MATCH_FCLASS_D 0xe2001053
+#define MASK_FCLASS_D 0xfff0707f
+#define MATCH_FCVT_W_Q 0xc6000053
+#define MASK_FCVT_W_Q 0xfff0007f
+#define MATCH_FCVT_WU_Q 0xc6100053
+#define MASK_FCVT_WU_Q 0xfff0007f
+#define MATCH_FCVT_L_Q 0xc6200053
+#define MASK_FCVT_L_Q 0xfff0007f
+#define MATCH_FCVT_LU_Q 0xc6300053
+#define MASK_FCVT_LU_Q 0xfff0007f
+#define MATCH_FMV_X_Q 0xe6000053
+#define MASK_FMV_X_Q 0xfff0707f
+#define MATCH_FCLASS_Q 0xe6001053
+#define MASK_FCLASS_Q 0xfff0707f
+#define MATCH_FCVT_S_W 0xd0000053
+#define MASK_FCVT_S_W 0xfff0007f
+#define MATCH_FCVT_S_WU 0xd0100053
+#define MASK_FCVT_S_WU 0xfff0007f
+#define MATCH_FCVT_S_L 0xd0200053
+#define MASK_FCVT_S_L 0xfff0007f
+#define MATCH_FCVT_S_LU 0xd0300053
+#define MASK_FCVT_S_LU 0xfff0007f
+#define MATCH_FMV_S_X 0xf0000053
+#define MASK_FMV_S_X 0xfff0707f
+#define MATCH_FCVT_D_W 0xd2000053
+#define MASK_FCVT_D_W 0xfff0007f
+#define MATCH_FCVT_D_WU 0xd2100053
+#define MASK_FCVT_D_WU 0xfff0007f
+#define MATCH_FCVT_D_L 0xd2200053
+#define MASK_FCVT_D_L 0xfff0007f
+#define MATCH_FCVT_D_LU 0xd2300053
+#define MASK_FCVT_D_LU 0xfff0007f
+#define MATCH_FMV_D_X 0xf2000053
+#define MASK_FMV_D_X 0xfff0707f
+#define MATCH_FCVT_Q_W 0xd6000053
+#define MASK_FCVT_Q_W 0xfff0007f
+#define MATCH_FCVT_Q_WU 0xd6100053
+#define MASK_FCVT_Q_WU 0xfff0007f
+#define MATCH_FCVT_Q_L 0xd6200053
+#define MASK_FCVT_Q_L 0xfff0007f
+#define MATCH_FCVT_Q_LU 0xd6300053
+#define MASK_FCVT_Q_LU 0xfff0007f
+#define MATCH_FMV_Q_X 0xf6000053
+#define MASK_FMV_Q_X 0xfff0707f
+#define MATCH_FLW 0x2007
+#define MASK_FLW 0x707f
+#define MATCH_FLD 0x3007
+#define MASK_FLD 0x707f
+#define MATCH_FLQ 0x4007
+#define MASK_FLQ 0x707f
+#define MATCH_FSW 0x2027
+#define MASK_FSW 0x707f
+#define MATCH_FSD 0x3027
+#define MASK_FSD 0x707f
+#define MATCH_FSQ 0x4027
+#define MASK_FSQ 0x707f
+#define MATCH_FMADD_S 0x43
+#define MASK_FMADD_S 0x600007f
+#define MATCH_FMSUB_S 0x47
+#define MASK_FMSUB_S 0x600007f
+#define MATCH_FNMSUB_S 0x4b
+#define MASK_FNMSUB_S 0x600007f
+#define MATCH_FNMADD_S 0x4f
+#define MASK_FNMADD_S 0x600007f
+#define MATCH_FMADD_D 0x2000043
+#define MASK_FMADD_D 0x600007f
+#define MATCH_FMSUB_D 0x2000047
+#define MASK_FMSUB_D 0x600007f
+#define MATCH_FNMSUB_D 0x200004b
+#define MASK_FNMSUB_D 0x600007f
+#define MATCH_FNMADD_D 0x200004f
+#define MASK_FNMADD_D 0x600007f
+#define MATCH_FMADD_Q 0x6000043
+#define MASK_FMADD_Q 0x600007f
+#define MATCH_FMSUB_Q 0x6000047
+#define MASK_FMSUB_Q 0x600007f
+#define MATCH_FNMSUB_Q 0x600004b
+#define MASK_FNMSUB_Q 0x600007f
+#define MATCH_FNMADD_Q 0x600004f
+#define MASK_FNMADD_Q 0x600007f
+#define MATCH_C_ADDI4SPN 0x0
+#define MASK_C_ADDI4SPN 0xe003
+#define MATCH_C_FLD 0x2000
+#define MASK_C_FLD 0xe003
+#define MATCH_C_LW 0x4000
+#define MASK_C_LW 0xe003
+#define MATCH_C_FLW 0x6000
+#define MASK_C_FLW 0xe003
+#define MATCH_C_FSD 0xa000
+#define MASK_C_FSD 0xe003
+#define MATCH_C_SW 0xc000
+#define MASK_C_SW 0xe003
+#define MATCH_C_FSW 0xe000
+#define MASK_C_FSW 0xe003
+#define MATCH_C_ADDI 0x1
+#define MASK_C_ADDI 0xe003
+#define MATCH_C_JAL 0x2001
+#define MASK_C_JAL 0xe003
+#define MATCH_C_LI 0x4001
+#define MASK_C_LI 0xe003
+#define MATCH_C_LUI 0x6001
+#define MASK_C_LUI 0xe003
+#define MATCH_C_SRLI 0x8001
+#define MASK_C_SRLI 0xec03
+#define MATCH_C_SRLI64 0x8001
+#define MASK_C_SRLI64 0xfc7f
+#define MATCH_C_SRAI 0x8401
+#define MASK_C_SRAI 0xec03
+#define MATCH_C_SRAI64 0x8401
+#define MASK_C_SRAI64 0xfc7f
+#define MATCH_C_ANDI 0x8801
+#define MASK_C_ANDI 0xec03
+#define MATCH_C_SUB 0x8c01
+#define MASK_C_SUB 0xfc63
+#define MATCH_C_XOR 0x8c21
+#define MASK_C_XOR 0xfc63
+#define MATCH_C_OR 0x8c41
+#define MASK_C_OR 0xfc63
+#define MATCH_C_AND 0x8c61
+#define MASK_C_AND 0xfc63
+#define MATCH_C_SUBW 0x9c01
+#define MASK_C_SUBW 0xfc63
+#define MATCH_C_ADDW 0x9c21
+#define MASK_C_ADDW 0xfc63
+#define MATCH_C_J 0xa001
+#define MASK_C_J 0xe003
+#define MATCH_C_BEQZ 0xc001
+#define MASK_C_BEQZ 0xe003
+#define MATCH_C_BNEZ 0xe001
+#define MASK_C_BNEZ 0xe003
+#define MATCH_C_SLLI 0x2
+#define MASK_C_SLLI 0xe003
+#define MATCH_C_SLLI64 0x2
+#define MASK_C_SLLI64 0xf07f
+#define MATCH_C_FLDSP 0x2002
+#define MASK_C_FLDSP 0xe003
+#define MATCH_C_LWSP 0x4002
+#define MASK_C_LWSP 0xe003
+#define MATCH_C_FLWSP 0x6002
+#define MASK_C_FLWSP 0xe003
+#define MATCH_C_MV 0x8002
+#define MASK_C_MV 0xf003
+#define MATCH_C_ADD 0x9002
+#define MASK_C_ADD 0xf003
+#define MATCH_C_FSDSP 0xa002
+#define MASK_C_FSDSP 0xe003
+#define MATCH_C_SWSP 0xc002
+#define MASK_C_SWSP 0xe003
+#define MATCH_C_FSWSP 0xe002
+#define MASK_C_FSWSP 0xe003
+#define MATCH_C_NOP 0x1
+#define MASK_C_NOP 0xffff
+#define MATCH_C_ADDI16SP 0x6101
+#define MASK_C_ADDI16SP 0xef83
+#define MATCH_C_JR 0x8002
+#define MASK_C_JR 0xf07f
+#define MATCH_C_JALR 0x9002
+#define MASK_C_JALR 0xf07f
+#define MATCH_C_EBREAK 0x9002
+#define MASK_C_EBREAK 0xffff
+#define MATCH_C_LD 0x6000
+#define MASK_C_LD 0xe003
+#define MATCH_C_SD 0xe000
+#define MASK_C_SD 0xe003
+#define MATCH_C_ADDIW 0x2001
+#define MASK_C_ADDIW 0xe003
+#define MATCH_C_LDSP 0x6002
+#define MASK_C_LDSP 0xe003
+#define MATCH_C_SDSP 0xe002
+#define MASK_C_SDSP 0xe003
+#define MATCH_CUSTOM0 0xb
+#define MASK_CUSTOM0 0x707f
+#define MATCH_CUSTOM0_RS1 0x200b
+#define MASK_CUSTOM0_RS1 0x707f
+#define MATCH_CUSTOM0_RS1_RS2 0x300b
+#define MASK_CUSTOM0_RS1_RS2 0x707f
+#define MATCH_CUSTOM0_RD 0x400b
+#define MASK_CUSTOM0_RD 0x707f
+#define MATCH_CUSTOM0_RD_RS1 0x600b
+#define MASK_CUSTOM0_RD_RS1 0x707f
+#define MATCH_CUSTOM0_RD_RS1_RS2 0x700b
+#define MASK_CUSTOM0_RD_RS1_RS2 0x707f
+#define MATCH_CUSTOM1 0x2b
+#define MASK_CUSTOM1 0x707f
+#define MATCH_CUSTOM1_RS1 0x202b
+#define MASK_CUSTOM1_RS1 0x707f
+#define MATCH_CUSTOM1_RS1_RS2 0x302b
+#define MASK_CUSTOM1_RS1_RS2 0x707f
+#define MATCH_CUSTOM1_RD 0x402b
+#define MASK_CUSTOM1_RD 0x707f
+#define MATCH_CUSTOM1_RD_RS1 0x602b
+#define MASK_CUSTOM1_RD_RS1 0x707f
+#define MATCH_CUSTOM1_RD_RS1_RS2 0x702b
+#define MASK_CUSTOM1_RD_RS1_RS2 0x707f
+#define MATCH_CUSTOM2 0x5b
+#define MASK_CUSTOM2 0x707f
+#define MATCH_CUSTOM2_RS1 0x205b
+#define MASK_CUSTOM2_RS1 0x707f
+#define MATCH_CUSTOM2_RS1_RS2 0x305b
+#define MASK_CUSTOM2_RS1_RS2 0x707f
+#define MATCH_CUSTOM2_RD 0x405b
+#define MASK_CUSTOM2_RD 0x707f
+#define MATCH_CUSTOM2_RD_RS1 0x605b
+#define MASK_CUSTOM2_RD_RS1 0x707f
+#define MATCH_CUSTOM2_RD_RS1_RS2 0x705b
+#define MASK_CUSTOM2_RD_RS1_RS2 0x707f
+#define MATCH_CUSTOM3 0x7b
+#define MASK_CUSTOM3 0x707f
+#define MATCH_CUSTOM3_RS1 0x207b
+#define MASK_CUSTOM3_RS1 0x707f
+#define MATCH_CUSTOM3_RS1_RS2 0x307b
+#define MASK_CUSTOM3_RS1_RS2 0x707f
+#define MATCH_CUSTOM3_RD 0x407b
+#define MASK_CUSTOM3_RD 0x707f
+#define MATCH_CUSTOM3_RD_RS1 0x607b
+#define MASK_CUSTOM3_RD_RS1 0x707f
+#define MATCH_CUSTOM3_RD_RS1_RS2 0x707b
+#define MASK_CUSTOM3_RD_RS1_RS2 0x707f
+#define CSR_USTATUS 0x0
+#define CSR_UIE 0x4
+#define CSR_UTVEC 0x5
+#define CSR_USCRATCH 0x40
+#define CSR_UEPC 0x41
+#define CSR_UCAUSE 0x42
+#define CSR_UTVAL 0x43
+#define CSR_UIP 0x44
+#define CSR_FFLAGS 0x1
+#define CSR_FRM 0x2
+#define CSR_FCSR 0x3
+#define CSR_CYCLE 0xc00
+#define CSR_TIME 0xc01
+#define CSR_INSTRET 0xc02
+#define CSR_HPMCOUNTER3 0xc03
+#define CSR_HPMCOUNTER4 0xc04
+#define CSR_HPMCOUNTER5 0xc05
+#define CSR_HPMCOUNTER6 0xc06
+#define CSR_HPMCOUNTER7 0xc07
+#define CSR_HPMCOUNTER8 0xc08
+#define CSR_HPMCOUNTER9 0xc09
+#define CSR_HPMCOUNTER10 0xc0a
+#define CSR_HPMCOUNTER11 0xc0b
+#define CSR_HPMCOUNTER12 0xc0c
+#define CSR_HPMCOUNTER13 0xc0d
+#define CSR_HPMCOUNTER14 0xc0e
+#define CSR_HPMCOUNTER15 0xc0f
+#define CSR_HPMCOUNTER16 0xc10
+#define CSR_HPMCOUNTER17 0xc11
+#define CSR_HPMCOUNTER18 0xc12
+#define CSR_HPMCOUNTER19 0xc13
+#define CSR_HPMCOUNTER20 0xc14
+#define CSR_HPMCOUNTER21 0xc15
+#define CSR_HPMCOUNTER22 0xc16
+#define CSR_HPMCOUNTER23 0xc17
+#define CSR_HPMCOUNTER24 0xc18
+#define CSR_HPMCOUNTER25 0xc19
+#define CSR_HPMCOUNTER26 0xc1a
+#define CSR_HPMCOUNTER27 0xc1b
+#define CSR_HPMCOUNTER28 0xc1c
+#define CSR_HPMCOUNTER29 0xc1d
+#define CSR_HPMCOUNTER30 0xc1e
+#define CSR_HPMCOUNTER31 0xc1f
+#define CSR_CYCLEH 0xc80
+#define CSR_TIMEH 0xc81
+#define CSR_INSTRETH 0xc82
+#define CSR_HPMCOUNTER3H 0xc83
+#define CSR_HPMCOUNTER4H 0xc84
+#define CSR_HPMCOUNTER5H 0xc85
+#define CSR_HPMCOUNTER6H 0xc86
+#define CSR_HPMCOUNTER7H 0xc87
+#define CSR_HPMCOUNTER8H 0xc88
+#define CSR_HPMCOUNTER9H 0xc89
+#define CSR_HPMCOUNTER10H 0xc8a
+#define CSR_HPMCOUNTER11H 0xc8b
+#define CSR_HPMCOUNTER12H 0xc8c
+#define CSR_HPMCOUNTER13H 0xc8d
+#define CSR_HPMCOUNTER14H 0xc8e
+#define CSR_HPMCOUNTER15H 0xc8f
+#define CSR_HPMCOUNTER16H 0xc90
+#define CSR_HPMCOUNTER17H 0xc91
+#define CSR_HPMCOUNTER18H 0xc92
+#define CSR_HPMCOUNTER19H 0xc93
+#define CSR_HPMCOUNTER20H 0xc94
+#define CSR_HPMCOUNTER21H 0xc95
+#define CSR_HPMCOUNTER22H 0xc96
+#define CSR_HPMCOUNTER23H 0xc97
+#define CSR_HPMCOUNTER24H 0xc98
+#define CSR_HPMCOUNTER25H 0xc99
+#define CSR_HPMCOUNTER26H 0xc9a
+#define CSR_HPMCOUNTER27H 0xc9b
+#define CSR_HPMCOUNTER28H 0xc9c
+#define CSR_HPMCOUNTER29H 0xc9d
+#define CSR_HPMCOUNTER30H 0xc9e
+#define CSR_HPMCOUNTER31H 0xc9f
+#define CSR_SSTATUS 0x100
+#define CSR_SEDELEG 0x102
+#define CSR_SIDELEG 0x103
+#define CSR_SIE 0x104
+#define CSR_STVEC 0x105
+#define CSR_SCOUNTEREN 0x106
+#define CSR_SSCRATCH 0x140
+#define CSR_SEPC 0x141
+#define CSR_SCAUSE 0x142
+#define CSR_STVAL 0x143
+#define CSR_SIP 0x144
+#define CSR_SATP 0x180
+#define CSR_MVENDORID 0xf11
+#define CSR_MARCHID 0xf12
+#define CSR_MIMPID 0xf13
+#define CSR_MHARTID 0xf14
+#define CSR_MSTATUS 0x300
+#define CSR_MISA 0x301
+#define CSR_MEDELEG 0x302
+#define CSR_MIDELEG 0x303
+#define CSR_MIE 0x304
+#define CSR_MTVEC 0x305
+#define CSR_MCOUNTEREN 0x306
+#define CSR_MSCRATCH 0x340
+#define CSR_MEPC 0x341
+#define CSR_MCAUSE 0x342
+#define CSR_MTVAL 0x343
+#define CSR_MIP 0x344
+#define CSR_PMPCFG0 0x3a0
+#define CSR_PMPCFG1 0x3a1
+#define CSR_PMPCFG2 0x3a2
+#define CSR_PMPCFG3 0x3a3
+#define CSR_PMPADDR0 0x3b0
+#define CSR_PMPADDR1 0x3b1
+#define CSR_PMPADDR2 0x3b2
+#define CSR_PMPADDR3 0x3b3
+#define CSR_PMPADDR4 0x3b4
+#define CSR_PMPADDR5 0x3b5
+#define CSR_PMPADDR6 0x3b6
+#define CSR_PMPADDR7 0x3b7
+#define CSR_PMPADDR8 0x3b8
+#define CSR_PMPADDR9 0x3b9
+#define CSR_PMPADDR10 0x3ba
+#define CSR_PMPADDR11 0x3bb
+#define CSR_PMPADDR12 0x3bc
+#define CSR_PMPADDR13 0x3bd
+#define CSR_PMPADDR14 0x3be
+#define CSR_PMPADDR15 0x3bf
+#define CSR_MCYCLE 0xb00
+#define CSR_MINSTRET 0xb02
+#define CSR_MHPMCOUNTER3 0xb03
+#define CSR_MHPMCOUNTER4 0xb04
+#define CSR_MHPMCOUNTER5 0xb05
+#define CSR_MHPMCOUNTER6 0xb06
+#define CSR_MHPMCOUNTER7 0xb07
+#define CSR_MHPMCOUNTER8 0xb08
+#define CSR_MHPMCOUNTER9 0xb09
+#define CSR_MHPMCOUNTER10 0xb0a
+#define CSR_MHPMCOUNTER11 0xb0b
+#define CSR_MHPMCOUNTER12 0xb0c
+#define CSR_MHPMCOUNTER13 0xb0d
+#define CSR_MHPMCOUNTER14 0xb0e
+#define CSR_MHPMCOUNTER15 0xb0f
+#define CSR_MHPMCOUNTER16 0xb10
+#define CSR_MHPMCOUNTER17 0xb11
+#define CSR_MHPMCOUNTER18 0xb12
+#define CSR_MHPMCOUNTER19 0xb13
+#define CSR_MHPMCOUNTER20 0xb14
+#define CSR_MHPMCOUNTER21 0xb15
+#define CSR_MHPMCOUNTER22 0xb16
+#define CSR_MHPMCOUNTER23 0xb17
+#define CSR_MHPMCOUNTER24 0xb18
+#define CSR_MHPMCOUNTER25 0xb19
+#define CSR_MHPMCOUNTER26 0xb1a
+#define CSR_MHPMCOUNTER27 0xb1b
+#define CSR_MHPMCOUNTER28 0xb1c
+#define CSR_MHPMCOUNTER29 0xb1d
+#define CSR_MHPMCOUNTER30 0xb1e
+#define CSR_MHPMCOUNTER31 0xb1f
+#define CSR_MCYCLEH 0xb80
+#define CSR_MINSTRETH 0xb82
+#define CSR_MHPMCOUNTER3H 0xb83
+#define CSR_MHPMCOUNTER4H 0xb84
+#define CSR_MHPMCOUNTER5H 0xb85
+#define CSR_MHPMCOUNTER6H 0xb86
+#define CSR_MHPMCOUNTER7H 0xb87
+#define CSR_MHPMCOUNTER8H 0xb88
+#define CSR_MHPMCOUNTER9H 0xb89
+#define CSR_MHPMCOUNTER10H 0xb8a
+#define CSR_MHPMCOUNTER11H 0xb8b
+#define CSR_MHPMCOUNTER12H 0xb8c
+#define CSR_MHPMCOUNTER13H 0xb8d
+#define CSR_MHPMCOUNTER14H 0xb8e
+#define CSR_MHPMCOUNTER15H 0xb8f
+#define CSR_MHPMCOUNTER16H 0xb90
+#define CSR_MHPMCOUNTER17H 0xb91
+#define CSR_MHPMCOUNTER18H 0xb92
+#define CSR_MHPMCOUNTER19H 0xb93
+#define CSR_MHPMCOUNTER20H 0xb94
+#define CSR_MHPMCOUNTER21H 0xb95
+#define CSR_MHPMCOUNTER22H 0xb96
+#define CSR_MHPMCOUNTER23H 0xb97
+#define CSR_MHPMCOUNTER24H 0xb98
+#define CSR_MHPMCOUNTER25H 0xb99
+#define CSR_MHPMCOUNTER26H 0xb9a
+#define CSR_MHPMCOUNTER27H 0xb9b
+#define CSR_MHPMCOUNTER28H 0xb9c
+#define CSR_MHPMCOUNTER29H 0xb9d
+#define CSR_MHPMCOUNTER30H 0xb9e
+#define CSR_MHPMCOUNTER31H 0xb9f
+#define CSR_MHPMEVENT3 0x323
+#define CSR_MHPMEVENT4 0x324
+#define CSR_MHPMEVENT5 0x325
+#define CSR_MHPMEVENT6 0x326
+#define CSR_MHPMEVENT7 0x327
+#define CSR_MHPMEVENT8 0x328
+#define CSR_MHPMEVENT9 0x329
+#define CSR_MHPMEVENT10 0x32a
+#define CSR_MHPMEVENT11 0x32b
+#define CSR_MHPMEVENT12 0x32c
+#define CSR_MHPMEVENT13 0x32d
+#define CSR_MHPMEVENT14 0x32e
+#define CSR_MHPMEVENT15 0x32f
+#define CSR_MHPMEVENT16 0x330
+#define CSR_MHPMEVENT17 0x331
+#define CSR_MHPMEVENT18 0x332
+#define CSR_MHPMEVENT19 0x333
+#define CSR_MHPMEVENT20 0x334
+#define CSR_MHPMEVENT21 0x335
+#define CSR_MHPMEVENT22 0x336
+#define CSR_MHPMEVENT23 0x337
+#define CSR_MHPMEVENT24 0x338
+#define CSR_MHPMEVENT25 0x339
+#define CSR_MHPMEVENT26 0x33a
+#define CSR_MHPMEVENT27 0x33b
+#define CSR_MHPMEVENT28 0x33c
+#define CSR_MHPMEVENT29 0x33d
+#define CSR_MHPMEVENT30 0x33e
+#define CSR_MHPMEVENT31 0x33f
+#define CSR_TSELECT 0x7a0
+#define CSR_TDATA1 0x7a1
+#define CSR_TDATA2 0x7a2
+#define CSR_TDATA3 0x7a3
+#define CSR_DCSR 0x7b0
+#define CSR_DPC 0x7b1
+#define CSR_DSCRATCH 0x7b2
+/* These registers are present in priv spec 1.9.1, dropped in 1.10. */
+#define CSR_HSTATUS 0x200
+#define CSR_HEDELEG 0x202
+#define CSR_HIDELEG 0x203
+#define CSR_HIE 0x204
+#define CSR_HTVEC 0x205
+#define CSR_HSCRATCH 0x240
+#define CSR_HEPC 0x241
+#define CSR_HCAUSE 0x242
+#define CSR_HBADADDR 0x243
+#define CSR_HIP 0x244
+/* CSR_MISA is 0xf10 in 1.9, but 0x301 in 1.9.1. */
+#define CSR_MBASE 0x380
+#define CSR_MBOUND 0x381
+#define CSR_MIBASE 0x382
+#define CSR_MIBOUND 0x383
+#define CSR_MDBASE 0x384
+#define CSR_MDBOUND 0x385
+#define CSR_MUCOUNTEREN 0x320
+#define CSR_MSCOUNTEREN 0x321
+#define CSR_MHCOUNTEREN 0x322
+#define CAUSE_MISALIGNED_FETCH 0x0
+#define CAUSE_FAULT_FETCH 0x1
+#define CAUSE_ILLEGAL_INSTRUCTION 0x2
+#define CAUSE_BREAKPOINT 0x3
+#define CAUSE_MISALIGNED_LOAD 0x4
+#define CAUSE_FAULT_LOAD 0x5
+#define CAUSE_MISALIGNED_STORE 0x6
+#define CAUSE_FAULT_STORE 0x7
+#define CAUSE_USER_ECALL 0x8
+#define CAUSE_SUPERVISOR_ECALL 0x9
+#define CAUSE_HYPERVISOR_ECALL 0xa
+#define CAUSE_MACHINE_ECALL 0xb
+#endif
+#ifdef DECLARE_INSN
+DECLARE_INSN(slli_rv32, MATCH_SLLI_RV32, MASK_SLLI_RV32)
+DECLARE_INSN(srli_rv32, MATCH_SRLI_RV32, MASK_SRLI_RV32)
+DECLARE_INSN(srai_rv32, MATCH_SRAI_RV32, MASK_SRAI_RV32)
+DECLARE_INSN(frflags, MATCH_FRFLAGS, MASK_FRFLAGS)
+DECLARE_INSN(fsflags, MATCH_FSFLAGS, MASK_FSFLAGS)
+DECLARE_INSN(fsflagsi, MATCH_FSFLAGSI, MASK_FSFLAGSI)
+DECLARE_INSN(frrm, MATCH_FRRM, MASK_FRRM)
+DECLARE_INSN(fsrm, MATCH_FSRM, MASK_FSRM)
+DECLARE_INSN(fsrmi, MATCH_FSRMI, MASK_FSRMI)
+DECLARE_INSN(fscsr, MATCH_FSCSR, MASK_FSCSR)
+DECLARE_INSN(frcsr, MATCH_FRCSR, MASK_FRCSR)
+DECLARE_INSN(rdcycle, MATCH_RDCYCLE, MASK_RDCYCLE)
+DECLARE_INSN(rdtime, MATCH_RDTIME, MASK_RDTIME)
+DECLARE_INSN(rdinstret, MATCH_RDINSTRET, MASK_RDINSTRET)
+DECLARE_INSN(rdcycleh, MATCH_RDCYCLEH, MASK_RDCYCLEH)
+DECLARE_INSN(rdtimeh, MATCH_RDTIMEH, MASK_RDTIMEH)
+DECLARE_INSN(rdinstreth, MATCH_RDINSTRETH, MASK_RDINSTRETH)
+DECLARE_INSN(scall, MATCH_SCALL, MASK_SCALL)
+DECLARE_INSN(sbreak, MATCH_SBREAK, MASK_SBREAK)
+DECLARE_INSN(beq, MATCH_BEQ, MASK_BEQ)
+DECLARE_INSN(bne, MATCH_BNE, MASK_BNE)
+DECLARE_INSN(blt, MATCH_BLT, MASK_BLT)
+DECLARE_INSN(bge, MATCH_BGE, MASK_BGE)
+DECLARE_INSN(bltu, MATCH_BLTU, MASK_BLTU)
+DECLARE_INSN(bgeu, MATCH_BGEU, MASK_BGEU)
+DECLARE_INSN(jalr, MATCH_JALR, MASK_JALR)
+DECLARE_INSN(jal, MATCH_JAL, MASK_JAL)
+DECLARE_INSN(lui, MATCH_LUI, MASK_LUI)
+DECLARE_INSN(auipc, MATCH_AUIPC, MASK_AUIPC)
+DECLARE_INSN(addi, MATCH_ADDI, MASK_ADDI)
+DECLARE_INSN(slli, MATCH_SLLI, MASK_SLLI)
+DECLARE_INSN(slti, MATCH_SLTI, MASK_SLTI)
+DECLARE_INSN(sltiu, MATCH_SLTIU, MASK_SLTIU)
+DECLARE_INSN(xori, MATCH_XORI, MASK_XORI)
+DECLARE_INSN(srli, MATCH_SRLI, MASK_SRLI)
+DECLARE_INSN(srai, MATCH_SRAI, MASK_SRAI)
+DECLARE_INSN(ori, MATCH_ORI, MASK_ORI)
+DECLARE_INSN(andi, MATCH_ANDI, MASK_ANDI)
+DECLARE_INSN(add, MATCH_ADD, MASK_ADD)
+DECLARE_INSN(sub, MATCH_SUB, MASK_SUB)
+DECLARE_INSN(sll, MATCH_SLL, MASK_SLL)
+DECLARE_INSN(slt, MATCH_SLT, MASK_SLT)
+DECLARE_INSN(sltu, MATCH_SLTU, MASK_SLTU)
+DECLARE_INSN(xor, MATCH_XOR, MASK_XOR)
+DECLARE_INSN(srl, MATCH_SRL, MASK_SRL)
+DECLARE_INSN(sra, MATCH_SRA, MASK_SRA)
+DECLARE_INSN(or, MATCH_OR, MASK_OR)
+DECLARE_INSN(and, MATCH_AND, MASK_AND)
+DECLARE_INSN(addiw, MATCH_ADDIW, MASK_ADDIW)
+DECLARE_INSN(slliw, MATCH_SLLIW, MASK_SLLIW)
+DECLARE_INSN(srliw, MATCH_SRLIW, MASK_SRLIW)
+DECLARE_INSN(sraiw, MATCH_SRAIW, MASK_SRAIW)
+DECLARE_INSN(addw, MATCH_ADDW, MASK_ADDW)
+DECLARE_INSN(subw, MATCH_SUBW, MASK_SUBW)
+DECLARE_INSN(sllw, MATCH_SLLW, MASK_SLLW)
+DECLARE_INSN(srlw, MATCH_SRLW, MASK_SRLW)
+DECLARE_INSN(sraw, MATCH_SRAW, MASK_SRAW)
+DECLARE_INSN(lb, MATCH_LB, MASK_LB)
+DECLARE_INSN(lh, MATCH_LH, MASK_LH)
+DECLARE_INSN(lw, MATCH_LW, MASK_LW)
+DECLARE_INSN(ld, MATCH_LD, MASK_LD)
+DECLARE_INSN(lbu, MATCH_LBU, MASK_LBU)
+DECLARE_INSN(lhu, MATCH_LHU, MASK_LHU)
+DECLARE_INSN(lwu, MATCH_LWU, MASK_LWU)
+DECLARE_INSN(sb, MATCH_SB, MASK_SB)
+DECLARE_INSN(sh, MATCH_SH, MASK_SH)
+DECLARE_INSN(sw, MATCH_SW, MASK_SW)
+DECLARE_INSN(sd, MATCH_SD, MASK_SD)
+DECLARE_INSN(fence, MATCH_FENCE, MASK_FENCE)
+DECLARE_INSN(fence_i, MATCH_FENCE_I, MASK_FENCE_I)
+DECLARE_INSN(mul, MATCH_MUL, MASK_MUL)
+DECLARE_INSN(mulh, MATCH_MULH, MASK_MULH)
+DECLARE_INSN(mulhsu, MATCH_MULHSU, MASK_MULHSU)
+DECLARE_INSN(mulhu, MATCH_MULHU, MASK_MULHU)
+DECLARE_INSN(div, MATCH_DIV, MASK_DIV)
+DECLARE_INSN(divu, MATCH_DIVU, MASK_DIVU)
+DECLARE_INSN(rem, MATCH_REM, MASK_REM)
+DECLARE_INSN(remu, MATCH_REMU, MASK_REMU)
+DECLARE_INSN(mulw, MATCH_MULW, MASK_MULW)
+DECLARE_INSN(divw, MATCH_DIVW, MASK_DIVW)
+DECLARE_INSN(divuw, MATCH_DIVUW, MASK_DIVUW)
+DECLARE_INSN(remw, MATCH_REMW, MASK_REMW)
+DECLARE_INSN(remuw, MATCH_REMUW, MASK_REMUW)
+DECLARE_INSN(amoadd_w, MATCH_AMOADD_W, MASK_AMOADD_W)
+DECLARE_INSN(amoxor_w, MATCH_AMOXOR_W, MASK_AMOXOR_W)
+DECLARE_INSN(amoor_w, MATCH_AMOOR_W, MASK_AMOOR_W)
+DECLARE_INSN(amoand_w, MATCH_AMOAND_W, MASK_AMOAND_W)
+DECLARE_INSN(amomin_w, MATCH_AMOMIN_W, MASK_AMOMIN_W)
+DECLARE_INSN(amomax_w, MATCH_AMOMAX_W, MASK_AMOMAX_W)
+DECLARE_INSN(amominu_w, MATCH_AMOMINU_W, MASK_AMOMINU_W)
+DECLARE_INSN(amomaxu_w, MATCH_AMOMAXU_W, MASK_AMOMAXU_W)
+DECLARE_INSN(amoswap_w, MATCH_AMOSWAP_W, MASK_AMOSWAP_W)
+DECLARE_INSN(lr_w, MATCH_LR_W, MASK_LR_W)
+DECLARE_INSN(sc_w, MATCH_SC_W, MASK_SC_W)
+DECLARE_INSN(amoadd_d, MATCH_AMOADD_D, MASK_AMOADD_D)
+DECLARE_INSN(amoxor_d, MATCH_AMOXOR_D, MASK_AMOXOR_D)
+DECLARE_INSN(amoor_d, MATCH_AMOOR_D, MASK_AMOOR_D)
+DECLARE_INSN(amoand_d, MATCH_AMOAND_D, MASK_AMOAND_D)
+DECLARE_INSN(amomin_d, MATCH_AMOMIN_D, MASK_AMOMIN_D)
+DECLARE_INSN(amomax_d, MATCH_AMOMAX_D, MASK_AMOMAX_D)
+DECLARE_INSN(amominu_d, MATCH_AMOMINU_D, MASK_AMOMINU_D)
+DECLARE_INSN(amomaxu_d, MATCH_AMOMAXU_D, MASK_AMOMAXU_D)
+DECLARE_INSN(amoswap_d, MATCH_AMOSWAP_D, MASK_AMOSWAP_D)
+DECLARE_INSN(lr_d, MATCH_LR_D, MASK_LR_D)
+DECLARE_INSN(sc_d, MATCH_SC_D, MASK_SC_D)
+DECLARE_INSN(ecall, MATCH_ECALL, MASK_ECALL)
+DECLARE_INSN(ebreak, MATCH_EBREAK, MASK_EBREAK)
+DECLARE_INSN(uret, MATCH_URET, MASK_URET)
+DECLARE_INSN(sret, MATCH_SRET, MASK_SRET)
+DECLARE_INSN(hret, MATCH_HRET, MASK_HRET)
+DECLARE_INSN(mret, MATCH_MRET, MASK_MRET)
+DECLARE_INSN(dret, MATCH_DRET, MASK_DRET)
+DECLARE_INSN(sfence_vm, MATCH_SFENCE_VM, MASK_SFENCE_VM)
+DECLARE_INSN(sfence_vma, MATCH_SFENCE_VMA, MASK_SFENCE_VMA)
+DECLARE_INSN(wfi, MATCH_WFI, MASK_WFI)
+DECLARE_INSN(csrrw, MATCH_CSRRW, MASK_CSRRW)
+DECLARE_INSN(csrrs, MATCH_CSRRS, MASK_CSRRS)
+DECLARE_INSN(csrrc, MATCH_CSRRC, MASK_CSRRC)
+DECLARE_INSN(csrrwi, MATCH_CSRRWI, MASK_CSRRWI)
+DECLARE_INSN(csrrsi, MATCH_CSRRSI, MASK_CSRRSI)
+DECLARE_INSN(csrrci, MATCH_CSRRCI, MASK_CSRRCI)
+DECLARE_INSN(fadd_s, MATCH_FADD_S, MASK_FADD_S)
+DECLARE_INSN(fsub_s, MATCH_FSUB_S, MASK_FSUB_S)
+DECLARE_INSN(fmul_s, MATCH_FMUL_S, MASK_FMUL_S)
+DECLARE_INSN(fdiv_s, MATCH_FDIV_S, MASK_FDIV_S)
+DECLARE_INSN(fsgnj_s, MATCH_FSGNJ_S, MASK_FSGNJ_S)
+DECLARE_INSN(fsgnjn_s, MATCH_FSGNJN_S, MASK_FSGNJN_S)
+DECLARE_INSN(fsgnjx_s, MATCH_FSGNJX_S, MASK_FSGNJX_S)
+DECLARE_INSN(fmin_s, MATCH_FMIN_S, MASK_FMIN_S)
+DECLARE_INSN(fmax_s, MATCH_FMAX_S, MASK_FMAX_S)
+DECLARE_INSN(fsqrt_s, MATCH_FSQRT_S, MASK_FSQRT_S)
+DECLARE_INSN(fadd_d, MATCH_FADD_D, MASK_FADD_D)
+DECLARE_INSN(fsub_d, MATCH_FSUB_D, MASK_FSUB_D)
+DECLARE_INSN(fmul_d, MATCH_FMUL_D, MASK_FMUL_D)
+DECLARE_INSN(fdiv_d, MATCH_FDIV_D, MASK_FDIV_D)
+DECLARE_INSN(fsgnj_d, MATCH_FSGNJ_D, MASK_FSGNJ_D)
+DECLARE_INSN(fsgnjn_d, MATCH_FSGNJN_D, MASK_FSGNJN_D)
+DECLARE_INSN(fsgnjx_d, MATCH_FSGNJX_D, MASK_FSGNJX_D)
+DECLARE_INSN(fmin_d, MATCH_FMIN_D, MASK_FMIN_D)
+DECLARE_INSN(fmax_d, MATCH_FMAX_D, MASK_FMAX_D)
+DECLARE_INSN(fcvt_s_d, MATCH_FCVT_S_D, MASK_FCVT_S_D)
+DECLARE_INSN(fcvt_d_s, MATCH_FCVT_D_S, MASK_FCVT_D_S)
+DECLARE_INSN(fsqrt_d, MATCH_FSQRT_D, MASK_FSQRT_D)
+DECLARE_INSN(fadd_q, MATCH_FADD_Q, MASK_FADD_Q)
+DECLARE_INSN(fsub_q, MATCH_FSUB_Q, MASK_FSUB_Q)
+DECLARE_INSN(fmul_q, MATCH_FMUL_Q, MASK_FMUL_Q)
+DECLARE_INSN(fdiv_q, MATCH_FDIV_Q, MASK_FDIV_Q)
+DECLARE_INSN(fsgnj_q, MATCH_FSGNJ_Q, MASK_FSGNJ_Q)
+DECLARE_INSN(fsgnjn_q, MATCH_FSGNJN_Q, MASK_FSGNJN_Q)
+DECLARE_INSN(fsgnjx_q, MATCH_FSGNJX_Q, MASK_FSGNJX_Q)
+DECLARE_INSN(fmin_q, MATCH_FMIN_Q, MASK_FMIN_Q)
+DECLARE_INSN(fmax_q, MATCH_FMAX_Q, MASK_FMAX_Q)
+DECLARE_INSN(fcvt_s_q, MATCH_FCVT_S_Q, MASK_FCVT_S_Q)
+DECLARE_INSN(fcvt_q_s, MATCH_FCVT_Q_S, MASK_FCVT_Q_S)
+DECLARE_INSN(fcvt_d_q, MATCH_FCVT_D_Q, MASK_FCVT_D_Q)
+DECLARE_INSN(fcvt_q_d, MATCH_FCVT_Q_D, MASK_FCVT_Q_D)
+DECLARE_INSN(fsqrt_q, MATCH_FSQRT_Q, MASK_FSQRT_Q)
+DECLARE_INSN(fle_s, MATCH_FLE_S, MASK_FLE_S)
+DECLARE_INSN(flt_s, MATCH_FLT_S, MASK_FLT_S)
+DECLARE_INSN(feq_s, MATCH_FEQ_S, MASK_FEQ_S)
+DECLARE_INSN(fle_d, MATCH_FLE_D, MASK_FLE_D)
+DECLARE_INSN(flt_d, MATCH_FLT_D, MASK_FLT_D)
+DECLARE_INSN(feq_d, MATCH_FEQ_D, MASK_FEQ_D)
+DECLARE_INSN(fle_q, MATCH_FLE_Q, MASK_FLE_Q)
+DECLARE_INSN(flt_q, MATCH_FLT_Q, MASK_FLT_Q)
+DECLARE_INSN(feq_q, MATCH_FEQ_Q, MASK_FEQ_Q)
+DECLARE_INSN(fcvt_w_s, MATCH_FCVT_W_S, MASK_FCVT_W_S)
+DECLARE_INSN(fcvt_wu_s, MATCH_FCVT_WU_S, MASK_FCVT_WU_S)
+DECLARE_INSN(fcvt_l_s, MATCH_FCVT_L_S, MASK_FCVT_L_S)
+DECLARE_INSN(fcvt_lu_s, MATCH_FCVT_LU_S, MASK_FCVT_LU_S)
+DECLARE_INSN(fmv_x_s, MATCH_FMV_X_S, MASK_FMV_X_S)
+DECLARE_INSN(fclass_s, MATCH_FCLASS_S, MASK_FCLASS_S)
+DECLARE_INSN(fcvt_w_d, MATCH_FCVT_W_D, MASK_FCVT_W_D)
+DECLARE_INSN(fcvt_wu_d, MATCH_FCVT_WU_D, MASK_FCVT_WU_D)
+DECLARE_INSN(fcvt_l_d, MATCH_FCVT_L_D, MASK_FCVT_L_D)
+DECLARE_INSN(fcvt_lu_d, MATCH_FCVT_LU_D, MASK_FCVT_LU_D)
+DECLARE_INSN(fmv_x_d, MATCH_FMV_X_D, MASK_FMV_X_D)
+DECLARE_INSN(fclass_d, MATCH_FCLASS_D, MASK_FCLASS_D)
+DECLARE_INSN(fcvt_w_q, MATCH_FCVT_W_Q, MASK_FCVT_W_Q)
+DECLARE_INSN(fcvt_wu_q, MATCH_FCVT_WU_Q, MASK_FCVT_WU_Q)
+DECLARE_INSN(fcvt_l_q, MATCH_FCVT_L_Q, MASK_FCVT_L_Q)
+DECLARE_INSN(fcvt_lu_q, MATCH_FCVT_LU_Q, MASK_FCVT_LU_Q)
+DECLARE_INSN(fmv_x_q, MATCH_FMV_X_Q, MASK_FMV_X_Q)
+DECLARE_INSN(fclass_q, MATCH_FCLASS_Q, MASK_FCLASS_Q)
+DECLARE_INSN(fcvt_s_w, MATCH_FCVT_S_W, MASK_FCVT_S_W)
+DECLARE_INSN(fcvt_s_wu, MATCH_FCVT_S_WU, MASK_FCVT_S_WU)
+DECLARE_INSN(fcvt_s_l, MATCH_FCVT_S_L, MASK_FCVT_S_L)
+DECLARE_INSN(fcvt_s_lu, MATCH_FCVT_S_LU, MASK_FCVT_S_LU)
+DECLARE_INSN(fmv_s_x, MATCH_FMV_S_X, MASK_FMV_S_X)
+DECLARE_INSN(fcvt_d_w, MATCH_FCVT_D_W, MASK_FCVT_D_W)
+DECLARE_INSN(fcvt_d_wu, MATCH_FCVT_D_WU, MASK_FCVT_D_WU)
+DECLARE_INSN(fcvt_d_l, MATCH_FCVT_D_L, MASK_FCVT_D_L)
+DECLARE_INSN(fcvt_d_lu, MATCH_FCVT_D_LU, MASK_FCVT_D_LU)
+DECLARE_INSN(fmv_d_x, MATCH_FMV_D_X, MASK_FMV_D_X)
+DECLARE_INSN(fcvt_q_w, MATCH_FCVT_Q_W, MASK_FCVT_Q_W)
+DECLARE_INSN(fcvt_q_wu, MATCH_FCVT_Q_WU, MASK_FCVT_Q_WU)
+DECLARE_INSN(fcvt_q_l, MATCH_FCVT_Q_L, MASK_FCVT_Q_L)
+DECLARE_INSN(fcvt_q_lu, MATCH_FCVT_Q_LU, MASK_FCVT_Q_LU)
+DECLARE_INSN(fmv_q_x, MATCH_FMV_Q_X, MASK_FMV_Q_X)
+DECLARE_INSN(flw, MATCH_FLW, MASK_FLW)
+DECLARE_INSN(fld, MATCH_FLD, MASK_FLD)
+DECLARE_INSN(flq, MATCH_FLQ, MASK_FLQ)
+DECLARE_INSN(fsw, MATCH_FSW, MASK_FSW)
+DECLARE_INSN(fsd, MATCH_FSD, MASK_FSD)
+DECLARE_INSN(fsq, MATCH_FSQ, MASK_FSQ)
+DECLARE_INSN(fmadd_s, MATCH_FMADD_S, MASK_FMADD_S)
+DECLARE_INSN(fmsub_s, MATCH_FMSUB_S, MASK_FMSUB_S)
+DECLARE_INSN(fnmsub_s, MATCH_FNMSUB_S, MASK_FNMSUB_S)
+DECLARE_INSN(fnmadd_s, MATCH_FNMADD_S, MASK_FNMADD_S)
+DECLARE_INSN(fmadd_d, MATCH_FMADD_D, MASK_FMADD_D)
+DECLARE_INSN(fmsub_d, MATCH_FMSUB_D, MASK_FMSUB_D)
+DECLARE_INSN(fnmsub_d, MATCH_FNMSUB_D, MASK_FNMSUB_D)
+DECLARE_INSN(fnmadd_d, MATCH_FNMADD_D, MASK_FNMADD_D)
+DECLARE_INSN(fmadd_q, MATCH_FMADD_Q, MASK_FMADD_Q)
+DECLARE_INSN(fmsub_q, MATCH_FMSUB_Q, MASK_FMSUB_Q)
+DECLARE_INSN(fnmsub_q, MATCH_FNMSUB_Q, MASK_FNMSUB_Q)
+DECLARE_INSN(fnmadd_q, MATCH_FNMADD_Q, MASK_FNMADD_Q)
+DECLARE_INSN(c_addi4spn, MATCH_C_ADDI4SPN, MASK_C_ADDI4SPN)
+DECLARE_INSN(c_fld, MATCH_C_FLD, MASK_C_FLD)
+DECLARE_INSN(c_lw, MATCH_C_LW, MASK_C_LW)
+DECLARE_INSN(c_flw, MATCH_C_FLW, MASK_C_FLW)
+DECLARE_INSN(c_fsd, MATCH_C_FSD, MASK_C_FSD)
+DECLARE_INSN(c_sw, MATCH_C_SW, MASK_C_SW)
+DECLARE_INSN(c_fsw, MATCH_C_FSW, MASK_C_FSW)
+DECLARE_INSN(c_addi, MATCH_C_ADDI, MASK_C_ADDI)
+DECLARE_INSN(c_jal, MATCH_C_JAL, MASK_C_JAL)
+DECLARE_INSN(c_li, MATCH_C_LI, MASK_C_LI)
+DECLARE_INSN(c_lui, MATCH_C_LUI, MASK_C_LUI)
+DECLARE_INSN(c_srli, MATCH_C_SRLI, MASK_C_SRLI)
+DECLARE_INSN(c_srai, MATCH_C_SRAI, MASK_C_SRAI)
+DECLARE_INSN(c_andi, MATCH_C_ANDI, MASK_C_ANDI)
+DECLARE_INSN(c_sub, MATCH_C_SUB, MASK_C_SUB)
+DECLARE_INSN(c_xor, MATCH_C_XOR, MASK_C_XOR)
+DECLARE_INSN(c_or, MATCH_C_OR, MASK_C_OR)
+DECLARE_INSN(c_and, MATCH_C_AND, MASK_C_AND)
+DECLARE_INSN(c_subw, MATCH_C_SUBW, MASK_C_SUBW)
+DECLARE_INSN(c_addw, MATCH_C_ADDW, MASK_C_ADDW)
+DECLARE_INSN(c_j, MATCH_C_J, MASK_C_J)
+DECLARE_INSN(c_beqz, MATCH_C_BEQZ, MASK_C_BEQZ)
+DECLARE_INSN(c_bnez, MATCH_C_BNEZ, MASK_C_BNEZ)
+DECLARE_INSN(c_slli, MATCH_C_SLLI, MASK_C_SLLI)
+DECLARE_INSN(c_fldsp, MATCH_C_FLDSP, MASK_C_FLDSP)
+DECLARE_INSN(c_lwsp, MATCH_C_LWSP, MASK_C_LWSP)
+DECLARE_INSN(c_flwsp, MATCH_C_FLWSP, MASK_C_FLWSP)
+DECLARE_INSN(c_mv, MATCH_C_MV, MASK_C_MV)
+DECLARE_INSN(c_add, MATCH_C_ADD, MASK_C_ADD)
+DECLARE_INSN(c_fsdsp, MATCH_C_FSDSP, MASK_C_FSDSP)
+DECLARE_INSN(c_swsp, MATCH_C_SWSP, MASK_C_SWSP)
+DECLARE_INSN(c_fswsp, MATCH_C_FSWSP, MASK_C_FSWSP)
+DECLARE_INSN(c_nop, MATCH_C_NOP, MASK_C_NOP)
+DECLARE_INSN(c_addi16sp, MATCH_C_ADDI16SP, MASK_C_ADDI16SP)
+DECLARE_INSN(c_jr, MATCH_C_JR, MASK_C_JR)
+DECLARE_INSN(c_jalr, MATCH_C_JALR, MASK_C_JALR)
+DECLARE_INSN(c_ebreak, MATCH_C_EBREAK, MASK_C_EBREAK)
+DECLARE_INSN(c_ld, MATCH_C_LD, MASK_C_LD)
+DECLARE_INSN(c_sd, MATCH_C_SD, MASK_C_SD)
+DECLARE_INSN(c_addiw, MATCH_C_ADDIW, MASK_C_ADDIW)
+DECLARE_INSN(c_ldsp, MATCH_C_LDSP, MASK_C_LDSP)
+DECLARE_INSN(c_sdsp, MATCH_C_SDSP, MASK_C_SDSP)
+DECLARE_INSN(custom0, MATCH_CUSTOM0, MASK_CUSTOM0)
+DECLARE_INSN(custom0_rs1, MATCH_CUSTOM0_RS1, MASK_CUSTOM0_RS1)
+DECLARE_INSN(custom0_rs1_rs2, MATCH_CUSTOM0_RS1_RS2, MASK_CUSTOM0_RS1_RS2)
+DECLARE_INSN(custom0_rd, MATCH_CUSTOM0_RD, MASK_CUSTOM0_RD)
+DECLARE_INSN(custom0_rd_rs1, MATCH_CUSTOM0_RD_RS1, MASK_CUSTOM0_RD_RS1)
+DECLARE_INSN(custom0_rd_rs1_rs2, MATCH_CUSTOM0_RD_RS1_RS2, MASK_CUSTOM0_RD_RS1_RS2)
+DECLARE_INSN(custom1, MATCH_CUSTOM1, MASK_CUSTOM1)
+DECLARE_INSN(custom1_rs1, MATCH_CUSTOM1_RS1, MASK_CUSTOM1_RS1)
+DECLARE_INSN(custom1_rs1_rs2, MATCH_CUSTOM1_RS1_RS2, MASK_CUSTOM1_RS1_RS2)
+DECLARE_INSN(custom1_rd, MATCH_CUSTOM1_RD, MASK_CUSTOM1_RD)
+DECLARE_INSN(custom1_rd_rs1, MATCH_CUSTOM1_RD_RS1, MASK_CUSTOM1_RD_RS1)
+DECLARE_INSN(custom1_rd_rs1_rs2, MATCH_CUSTOM1_RD_RS1_RS2, MASK_CUSTOM1_RD_RS1_RS2)
+DECLARE_INSN(custom2, MATCH_CUSTOM2, MASK_CUSTOM2)
+DECLARE_INSN(custom2_rs1, MATCH_CUSTOM2_RS1, MASK_CUSTOM2_RS1)
+DECLARE_INSN(custom2_rs1_rs2, MATCH_CUSTOM2_RS1_RS2, MASK_CUSTOM2_RS1_RS2)
+DECLARE_INSN(custom2_rd, MATCH_CUSTOM2_RD, MASK_CUSTOM2_RD)
+DECLARE_INSN(custom2_rd_rs1, MATCH_CUSTOM2_RD_RS1, MASK_CUSTOM2_RD_RS1)
+DECLARE_INSN(custom2_rd_rs1_rs2, MATCH_CUSTOM2_RD_RS1_RS2, MASK_CUSTOM2_RD_RS1_RS2)
+DECLARE_INSN(custom3, MATCH_CUSTOM3, MASK_CUSTOM3)
+DECLARE_INSN(custom3_rs1, MATCH_CUSTOM3_RS1, MASK_CUSTOM3_RS1)
+DECLARE_INSN(custom3_rs1_rs2, MATCH_CUSTOM3_RS1_RS2, MASK_CUSTOM3_RS1_RS2)
+DECLARE_INSN(custom3_rd, MATCH_CUSTOM3_RD, MASK_CUSTOM3_RD)
+DECLARE_INSN(custom3_rd_rs1, MATCH_CUSTOM3_RD_RS1, MASK_CUSTOM3_RD_RS1)
+DECLARE_INSN(custom3_rd_rs1_rs2, MATCH_CUSTOM3_RD_RS1_RS2, MASK_CUSTOM3_RD_RS1_RS2)
+#endif
+#ifdef DECLARE_CSR
+DECLARE_CSR(ustatus, CSR_USTATUS)
+DECLARE_CSR(uie, CSR_UIE)
+DECLARE_CSR(utvec, CSR_UTVEC)
+DECLARE_CSR(uscratch, CSR_USCRATCH)
+DECLARE_CSR(uepc, CSR_UEPC)
+DECLARE_CSR(ucause, CSR_UCAUSE)
+DECLARE_CSR(utval, CSR_UTVAL)
+DECLARE_CSR(uip, CSR_UIP)
+DECLARE_CSR(fflags, CSR_FFLAGS)
+DECLARE_CSR(frm, CSR_FRM)
+DECLARE_CSR(fcsr, CSR_FCSR)
+DECLARE_CSR(cycle, CSR_CYCLE)
+DECLARE_CSR(time, CSR_TIME)
+DECLARE_CSR(instret, CSR_INSTRET)
+DECLARE_CSR(hpmcounter3, CSR_HPMCOUNTER3)
+DECLARE_CSR(hpmcounter4, CSR_HPMCOUNTER4)
+DECLARE_CSR(hpmcounter5, CSR_HPMCOUNTER5)
+DECLARE_CSR(hpmcounter6, CSR_HPMCOUNTER6)
+DECLARE_CSR(hpmcounter7, CSR_HPMCOUNTER7)
+DECLARE_CSR(hpmcounter8, CSR_HPMCOUNTER8)
+DECLARE_CSR(hpmcounter9, CSR_HPMCOUNTER9)
+DECLARE_CSR(hpmcounter10, CSR_HPMCOUNTER10)
+DECLARE_CSR(hpmcounter11, CSR_HPMCOUNTER11)
+DECLARE_CSR(hpmcounter12, CSR_HPMCOUNTER12)
+DECLARE_CSR(hpmcounter13, CSR_HPMCOUNTER13)
+DECLARE_CSR(hpmcounter14, CSR_HPMCOUNTER14)
+DECLARE_CSR(hpmcounter15, CSR_HPMCOUNTER15)
+DECLARE_CSR(hpmcounter16, CSR_HPMCOUNTER16)
+DECLARE_CSR(hpmcounter17, CSR_HPMCOUNTER17)
+DECLARE_CSR(hpmcounter18, CSR_HPMCOUNTER18)
+DECLARE_CSR(hpmcounter19, CSR_HPMCOUNTER19)
+DECLARE_CSR(hpmcounter20, CSR_HPMCOUNTER20)
+DECLARE_CSR(hpmcounter21, CSR_HPMCOUNTER21)
+DECLARE_CSR(hpmcounter22, CSR_HPMCOUNTER22)
+DECLARE_CSR(hpmcounter23, CSR_HPMCOUNTER23)
+DECLARE_CSR(hpmcounter24, CSR_HPMCOUNTER24)
+DECLARE_CSR(hpmcounter25, CSR_HPMCOUNTER25)
+DECLARE_CSR(hpmcounter26, CSR_HPMCOUNTER26)
+DECLARE_CSR(hpmcounter27, CSR_HPMCOUNTER27)
+DECLARE_CSR(hpmcounter28, CSR_HPMCOUNTER28)
+DECLARE_CSR(hpmcounter29, CSR_HPMCOUNTER29)
+DECLARE_CSR(hpmcounter30, CSR_HPMCOUNTER30)
+DECLARE_CSR(hpmcounter31, CSR_HPMCOUNTER31)
+DECLARE_CSR(cycleh, CSR_CYCLEH)
+DECLARE_CSR(timeh, CSR_TIMEH)
+DECLARE_CSR(instreth, CSR_INSTRETH)
+DECLARE_CSR(hpmcounter3h, CSR_HPMCOUNTER3H)
+DECLARE_CSR(hpmcounter4h, CSR_HPMCOUNTER4H)
+DECLARE_CSR(hpmcounter5h, CSR_HPMCOUNTER5H)
+DECLARE_CSR(hpmcounter6h, CSR_HPMCOUNTER6H)
+DECLARE_CSR(hpmcounter7h, CSR_HPMCOUNTER7H)
+DECLARE_CSR(hpmcounter8h, CSR_HPMCOUNTER8H)
+DECLARE_CSR(hpmcounter9h, CSR_HPMCOUNTER9H)
+DECLARE_CSR(hpmcounter10h, CSR_HPMCOUNTER10H)
+DECLARE_CSR(hpmcounter11h, CSR_HPMCOUNTER11H)
+DECLARE_CSR(hpmcounter12h, CSR_HPMCOUNTER12H)
+DECLARE_CSR(hpmcounter13h, CSR_HPMCOUNTER13H)
+DECLARE_CSR(hpmcounter14h, CSR_HPMCOUNTER14H)
+DECLARE_CSR(hpmcounter15h, CSR_HPMCOUNTER15H)
+DECLARE_CSR(hpmcounter16h, CSR_HPMCOUNTER16H)
+DECLARE_CSR(hpmcounter17h, CSR_HPMCOUNTER17H)
+DECLARE_CSR(hpmcounter18h, CSR_HPMCOUNTER18H)
+DECLARE_CSR(hpmcounter19h, CSR_HPMCOUNTER19H)
+DECLARE_CSR(hpmcounter20h, CSR_HPMCOUNTER20H)
+DECLARE_CSR(hpmcounter21h, CSR_HPMCOUNTER21H)
+DECLARE_CSR(hpmcounter22h, CSR_HPMCOUNTER22H)
+DECLARE_CSR(hpmcounter23h, CSR_HPMCOUNTER23H)
+DECLARE_CSR(hpmcounter24h, CSR_HPMCOUNTER24H)
+DECLARE_CSR(hpmcounter25h, CSR_HPMCOUNTER25H)
+DECLARE_CSR(hpmcounter26h, CSR_HPMCOUNTER26H)
+DECLARE_CSR(hpmcounter27h, CSR_HPMCOUNTER27H)
+DECLARE_CSR(hpmcounter28h, CSR_HPMCOUNTER28H)
+DECLARE_CSR(hpmcounter29h, CSR_HPMCOUNTER29H)
+DECLARE_CSR(hpmcounter30h, CSR_HPMCOUNTER30H)
+DECLARE_CSR(hpmcounter31h, CSR_HPMCOUNTER31H)
+DECLARE_CSR(sstatus, CSR_SSTATUS)
+DECLARE_CSR(sedeleg, CSR_SEDELEG)
+DECLARE_CSR(sideleg, CSR_SIDELEG)
+DECLARE_CSR(sie, CSR_SIE)
+DECLARE_CSR(stvec, CSR_STVEC)
+DECLARE_CSR(scounteren, CSR_SCOUNTEREN)
+DECLARE_CSR(sscratch, CSR_SSCRATCH)
+DECLARE_CSR(sepc, CSR_SEPC)
+DECLARE_CSR(scause, CSR_SCAUSE)
+DECLARE_CSR(stval, CSR_STVAL)
+DECLARE_CSR(sip, CSR_SIP)
+DECLARE_CSR(satp, CSR_SATP)
+DECLARE_CSR(mvendorid, CSR_MVENDORID)
+DECLARE_CSR(marchid, CSR_MARCHID)
+DECLARE_CSR(mimpid, CSR_MIMPID)
+DECLARE_CSR(mhartid, CSR_MHARTID)
+DECLARE_CSR(mstatus, CSR_MSTATUS)
+DECLARE_CSR(misa, CSR_MISA)
+DECLARE_CSR(medeleg, CSR_MEDELEG)
+DECLARE_CSR(mideleg, CSR_MIDELEG)
+DECLARE_CSR(mie, CSR_MIE)
+DECLARE_CSR(mtvec, CSR_MTVEC)
+DECLARE_CSR(mcounteren, CSR_MCOUNTEREN)
+DECLARE_CSR(mscratch, CSR_MSCRATCH)
+DECLARE_CSR(mepc, CSR_MEPC)
+DECLARE_CSR(mcause, CSR_MCAUSE)
+DECLARE_CSR(mtval, CSR_MTVAL)
+DECLARE_CSR(mip, CSR_MIP)
+DECLARE_CSR(pmpcfg0, CSR_PMPCFG0)
+DECLARE_CSR(pmpcfg1, CSR_PMPCFG1)
+DECLARE_CSR(pmpcfg2, CSR_PMPCFG2)
+DECLARE_CSR(pmpcfg3, CSR_PMPCFG3)
+DECLARE_CSR(pmpaddr0, CSR_PMPADDR0)
+DECLARE_CSR(pmpaddr1, CSR_PMPADDR1)
+DECLARE_CSR(pmpaddr2, CSR_PMPADDR2)
+DECLARE_CSR(pmpaddr3, CSR_PMPADDR3)
+DECLARE_CSR(pmpaddr4, CSR_PMPADDR4)
+DECLARE_CSR(pmpaddr5, CSR_PMPADDR5)
+DECLARE_CSR(pmpaddr6, CSR_PMPADDR6)
+DECLARE_CSR(pmpaddr7, CSR_PMPADDR7)
+DECLARE_CSR(pmpaddr8, CSR_PMPADDR8)
+DECLARE_CSR(pmpaddr9, CSR_PMPADDR9)
+DECLARE_CSR(pmpaddr10, CSR_PMPADDR10)
+DECLARE_CSR(pmpaddr11, CSR_PMPADDR11)
+DECLARE_CSR(pmpaddr12, CSR_PMPADDR12)
+DECLARE_CSR(pmpaddr13, CSR_PMPADDR13)
+DECLARE_CSR(pmpaddr14, CSR_PMPADDR14)
+DECLARE_CSR(pmpaddr15, CSR_PMPADDR15)
+DECLARE_CSR(mcycle, CSR_MCYCLE)
+DECLARE_CSR(minstret, CSR_MINSTRET)
+DECLARE_CSR(mhpmcounter3, CSR_MHPMCOUNTER3)
+DECLARE_CSR(mhpmcounter4, CSR_MHPMCOUNTER4)
+DECLARE_CSR(mhpmcounter5, CSR_MHPMCOUNTER5)
+DECLARE_CSR(mhpmcounter6, CSR_MHPMCOUNTER6)
+DECLARE_CSR(mhpmcounter7, CSR_MHPMCOUNTER7)
+DECLARE_CSR(mhpmcounter8, CSR_MHPMCOUNTER8)
+DECLARE_CSR(mhpmcounter9, CSR_MHPMCOUNTER9)
+DECLARE_CSR(mhpmcounter10, CSR_MHPMCOUNTER10)
+DECLARE_CSR(mhpmcounter11, CSR_MHPMCOUNTER11)
+DECLARE_CSR(mhpmcounter12, CSR_MHPMCOUNTER12)
+DECLARE_CSR(mhpmcounter13, CSR_MHPMCOUNTER13)
+DECLARE_CSR(mhpmcounter14, CSR_MHPMCOUNTER14)
+DECLARE_CSR(mhpmcounter15, CSR_MHPMCOUNTER15)
+DECLARE_CSR(mhpmcounter16, CSR_MHPMCOUNTER16)
+DECLARE_CSR(mhpmcounter17, CSR_MHPMCOUNTER17)
+DECLARE_CSR(mhpmcounter18, CSR_MHPMCOUNTER18)
+DECLARE_CSR(mhpmcounter19, CSR_MHPMCOUNTER19)
+DECLARE_CSR(mhpmcounter20, CSR_MHPMCOUNTER20)
+DECLARE_CSR(mhpmcounter21, CSR_MHPMCOUNTER21)
+DECLARE_CSR(mhpmcounter22, CSR_MHPMCOUNTER22)
+DECLARE_CSR(mhpmcounter23, CSR_MHPMCOUNTER23)
+DECLARE_CSR(mhpmcounter24, CSR_MHPMCOUNTER24)
+DECLARE_CSR(mhpmcounter25, CSR_MHPMCOUNTER25)
+DECLARE_CSR(mhpmcounter26, CSR_MHPMCOUNTER26)
+DECLARE_CSR(mhpmcounter27, CSR_MHPMCOUNTER27)
+DECLARE_CSR(mhpmcounter28, CSR_MHPMCOUNTER28)
+DECLARE_CSR(mhpmcounter29, CSR_MHPMCOUNTER29)
+DECLARE_CSR(mhpmcounter30, CSR_MHPMCOUNTER30)
+DECLARE_CSR(mhpmcounter31, CSR_MHPMCOUNTER31)
+DECLARE_CSR(mcycleh, CSR_MCYCLEH)
+DECLARE_CSR(minstreth, CSR_MINSTRETH)
+DECLARE_CSR(mhpmcounter3h, CSR_MHPMCOUNTER3H)
+DECLARE_CSR(mhpmcounter4h, CSR_MHPMCOUNTER4H)
+DECLARE_CSR(mhpmcounter5h, CSR_MHPMCOUNTER5H)
+DECLARE_CSR(mhpmcounter6h, CSR_MHPMCOUNTER6H)
+DECLARE_CSR(mhpmcounter7h, CSR_MHPMCOUNTER7H)
+DECLARE_CSR(mhpmcounter8h, CSR_MHPMCOUNTER8H)
+DECLARE_CSR(mhpmcounter9h, CSR_MHPMCOUNTER9H)
+DECLARE_CSR(mhpmcounter10h, CSR_MHPMCOUNTER10H)
+DECLARE_CSR(mhpmcounter11h, CSR_MHPMCOUNTER11H)
+DECLARE_CSR(mhpmcounter12h, CSR_MHPMCOUNTER12H)
+DECLARE_CSR(mhpmcounter13h, CSR_MHPMCOUNTER13H)
+DECLARE_CSR(mhpmcounter14h, CSR_MHPMCOUNTER14H)
+DECLARE_CSR(mhpmcounter15h, CSR_MHPMCOUNTER15H)
+DECLARE_CSR(mhpmcounter16h, CSR_MHPMCOUNTER16H)
+DECLARE_CSR(mhpmcounter17h, CSR_MHPMCOUNTER17H)
+DECLARE_CSR(mhpmcounter18h, CSR_MHPMCOUNTER18H)
+DECLARE_CSR(mhpmcounter19h, CSR_MHPMCOUNTER19H)
+DECLARE_CSR(mhpmcounter20h, CSR_MHPMCOUNTER20H)
+DECLARE_CSR(mhpmcounter21h, CSR_MHPMCOUNTER21H)
+DECLARE_CSR(mhpmcounter22h, CSR_MHPMCOUNTER22H)
+DECLARE_CSR(mhpmcounter23h, CSR_MHPMCOUNTER23H)
+DECLARE_CSR(mhpmcounter24h, CSR_MHPMCOUNTER24H)
+DECLARE_CSR(mhpmcounter25h, CSR_MHPMCOUNTER25H)
+DECLARE_CSR(mhpmcounter26h, CSR_MHPMCOUNTER26H)
+DECLARE_CSR(mhpmcounter27h, CSR_MHPMCOUNTER27H)
+DECLARE_CSR(mhpmcounter28h, CSR_MHPMCOUNTER28H)
+DECLARE_CSR(mhpmcounter29h, CSR_MHPMCOUNTER29H)
+DECLARE_CSR(mhpmcounter30h, CSR_MHPMCOUNTER30H)
+DECLARE_CSR(mhpmcounter31h, CSR_MHPMCOUNTER31H)
+DECLARE_CSR(mhpmevent3, CSR_MHPMEVENT3)
+DECLARE_CSR(mhpmevent4, CSR_MHPMEVENT4)
+DECLARE_CSR(mhpmevent5, CSR_MHPMEVENT5)
+DECLARE_CSR(mhpmevent6, CSR_MHPMEVENT6)
+DECLARE_CSR(mhpmevent7, CSR_MHPMEVENT7)
+DECLARE_CSR(mhpmevent8, CSR_MHPMEVENT8)
+DECLARE_CSR(mhpmevent9, CSR_MHPMEVENT9)
+DECLARE_CSR(mhpmevent10, CSR_MHPMEVENT10)
+DECLARE_CSR(mhpmevent11, CSR_MHPMEVENT11)
+DECLARE_CSR(mhpmevent12, CSR_MHPMEVENT12)
+DECLARE_CSR(mhpmevent13, CSR_MHPMEVENT13)
+DECLARE_CSR(mhpmevent14, CSR_MHPMEVENT14)
+DECLARE_CSR(mhpmevent15, CSR_MHPMEVENT15)
+DECLARE_CSR(mhpmevent16, CSR_MHPMEVENT16)
+DECLARE_CSR(mhpmevent17, CSR_MHPMEVENT17)
+DECLARE_CSR(mhpmevent18, CSR_MHPMEVENT18)
+DECLARE_CSR(mhpmevent19, CSR_MHPMEVENT19)
+DECLARE_CSR(mhpmevent20, CSR_MHPMEVENT20)
+DECLARE_CSR(mhpmevent21, CSR_MHPMEVENT21)
+DECLARE_CSR(mhpmevent22, CSR_MHPMEVENT22)
+DECLARE_CSR(mhpmevent23, CSR_MHPMEVENT23)
+DECLARE_CSR(mhpmevent24, CSR_MHPMEVENT24)
+DECLARE_CSR(mhpmevent25, CSR_MHPMEVENT25)
+DECLARE_CSR(mhpmevent26, CSR_MHPMEVENT26)
+DECLARE_CSR(mhpmevent27, CSR_MHPMEVENT27)
+DECLARE_CSR(mhpmevent28, CSR_MHPMEVENT28)
+DECLARE_CSR(mhpmevent29, CSR_MHPMEVENT29)
+DECLARE_CSR(mhpmevent30, CSR_MHPMEVENT30)
+DECLARE_CSR(mhpmevent31, CSR_MHPMEVENT31)
+DECLARE_CSR(tselect, CSR_TSELECT)
+DECLARE_CSR(tdata1, CSR_TDATA1)
+DECLARE_CSR(tdata2, CSR_TDATA2)
+DECLARE_CSR(tdata3, CSR_TDATA3)
+DECLARE_CSR(dcsr, CSR_DCSR)
+DECLARE_CSR(dpc, CSR_DPC)
+DECLARE_CSR(dscratch, CSR_DSCRATCH)
+/* These registers are present in priv spec 1.9.1, dropped in 1.10. */
+DECLARE_CSR(hstatus, CSR_HSTATUS)
+DECLARE_CSR(hedeleg, CSR_HEDELEG)
+DECLARE_CSR(hideleg, CSR_HIDELEG)
+DECLARE_CSR(hie, CSR_HIE)
+DECLARE_CSR(htvec, CSR_HTVEC)
+DECLARE_CSR(hscratch, CSR_HSCRATCH)
+DECLARE_CSR(hepc, CSR_HEPC)
+DECLARE_CSR(hcause, CSR_HCAUSE)
+DECLARE_CSR(hbadaddr, CSR_HBADADDR)
+DECLARE_CSR(hip, CSR_HIP)
+DECLARE_CSR(mbase, CSR_MBASE)
+DECLARE_CSR(mbound, CSR_MBOUND)
+DECLARE_CSR(mibase, CSR_MIBASE)
+DECLARE_CSR(mibound, CSR_MIBOUND)
+DECLARE_CSR(mdbase, CSR_MDBASE)
+DECLARE_CSR(mdbound, CSR_MDBOUND)
+DECLARE_CSR(mucounteren, CSR_MUCOUNTEREN)
+DECLARE_CSR(mscounteren, CSR_MSCOUNTEREN)
+DECLARE_CSR(mhcounteren, CSR_MHCOUNTEREN)
+#endif
+#ifdef DECLARE_CSR_ALIAS
+/* Ubadaddr is 0x043 in 1.9.1, but 0x043 is utval in 1.10. */
+DECLARE_CSR_ALIAS(ubadaddr, CSR_UTVAL)
+/* Sbadaddr is 0x143 in 1.9.1, but 0x143 is stval in 1.10. */
+DECLARE_CSR_ALIAS(sbadaddr, CSR_STVAL)
+/* Sptbr is 0x180 in 1.9.1, but 0x180 is satp in 1.10. */
+DECLARE_CSR_ALIAS(sptbr, CSR_SATP)
+/* Mbadaddr is 0x343 in 1.9.1, but 0x343 is mtval in 1.10. */
+DECLARE_CSR_ALIAS(mbadaddr, CSR_MTVAL)
+#endif
+#ifdef DECLARE_CAUSE
+DECLARE_CAUSE("misaligned fetch", CAUSE_MISALIGNED_FETCH)
+DECLARE_CAUSE("fault fetch", CAUSE_FAULT_FETCH)
+DECLARE_CAUSE("illegal instruction", CAUSE_ILLEGAL_INSTRUCTION)
+DECLARE_CAUSE("breakpoint", CAUSE_BREAKPOINT)
+DECLARE_CAUSE("misaligned load", CAUSE_MISALIGNED_LOAD)
+DECLARE_CAUSE("fault load", CAUSE_FAULT_LOAD)
+DECLARE_CAUSE("misaligned store", CAUSE_MISALIGNED_STORE)
+DECLARE_CAUSE("fault store", CAUSE_FAULT_STORE)
+DECLARE_CAUSE("user_ecall", CAUSE_USER_ECALL)
+DECLARE_CAUSE("supervisor_ecall", CAUSE_SUPERVISOR_ECALL)
+DECLARE_CAUSE("hypervisor_ecall", CAUSE_HYPERVISOR_ECALL)
+DECLARE_CAUSE("machine_ecall", CAUSE_MACHINE_ECALL)
+#endif
diff --git a/include/riscv.h b/include/riscv.h
new file mode 100644
index 0000000..5062a49
--- /dev/null
+++ b/include/riscv.h
@@ -0,0 +1,135 @@
+/* RISC-V ELF support for BFD.
+ Copyright (C) 2011-2020 Free Software Foundation, Inc.
+
+ Contributed by Andrew Waterman (andrew@sifive.com).
+ Based on MIPS ELF support for BFD, by Ian Lance Taylor.
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; see the file COPYING3. If not,
+ see . */
+
+/* This file holds definitions specific to the RISCV ELF ABI. Note
+ that most of this is not actually implemented by BFD. */
+
+#ifndef _ELF_RISCV_H
+#define _ELF_RISCV_H
+
+#include "elf/reloc-macros.h"
+#include "libiberty.h"
+
+/* Relocation types. */
+START_RELOC_NUMBERS (elf_riscv_reloc_type)
+ /* Relocation types used by the dynamic linker. */
+ RELOC_NUMBER (R_RISCV_NONE, 0)
+ RELOC_NUMBER (R_RISCV_32, 1)
+ RELOC_NUMBER (R_RISCV_64, 2)
+ RELOC_NUMBER (R_RISCV_RELATIVE, 3)
+ RELOC_NUMBER (R_RISCV_COPY, 4)
+ RELOC_NUMBER (R_RISCV_JUMP_SLOT, 5)
+ RELOC_NUMBER (R_RISCV_TLS_DTPMOD32, 6)
+ RELOC_NUMBER (R_RISCV_TLS_DTPMOD64, 7)
+ RELOC_NUMBER (R_RISCV_TLS_DTPREL32, 8)
+ RELOC_NUMBER (R_RISCV_TLS_DTPREL64, 9)
+ RELOC_NUMBER (R_RISCV_TLS_TPREL32, 10)
+ RELOC_NUMBER (R_RISCV_TLS_TPREL64, 11)
+
+ /* Relocation types not used by the dynamic linker. */
+ RELOC_NUMBER (R_RISCV_BRANCH, 16)
+ RELOC_NUMBER (R_RISCV_JAL, 17)
+ RELOC_NUMBER (R_RISCV_CALL, 18)
+ RELOC_NUMBER (R_RISCV_CALL_PLT, 19)
+ RELOC_NUMBER (R_RISCV_GOT_HI20, 20)
+ RELOC_NUMBER (R_RISCV_TLS_GOT_HI20, 21)
+ RELOC_NUMBER (R_RISCV_TLS_GD_HI20, 22)
+ RELOC_NUMBER (R_RISCV_PCREL_HI20, 23)
+ RELOC_NUMBER (R_RISCV_PCREL_LO12_I, 24)
+ RELOC_NUMBER (R_RISCV_PCREL_LO12_S, 25)
+ RELOC_NUMBER (R_RISCV_HI20, 26)
+ RELOC_NUMBER (R_RISCV_LO12_I, 27)
+ RELOC_NUMBER (R_RISCV_LO12_S, 28)
+ RELOC_NUMBER (R_RISCV_TPREL_HI20, 29)
+ RELOC_NUMBER (R_RISCV_TPREL_LO12_I, 30)
+ RELOC_NUMBER (R_RISCV_TPREL_LO12_S, 31)
+ RELOC_NUMBER (R_RISCV_TPREL_ADD, 32)
+ RELOC_NUMBER (R_RISCV_ADD8, 33)
+ RELOC_NUMBER (R_RISCV_ADD16, 34)
+ RELOC_NUMBER (R_RISCV_ADD32, 35)
+ RELOC_NUMBER (R_RISCV_ADD64, 36)
+ RELOC_NUMBER (R_RISCV_SUB8, 37)
+ RELOC_NUMBER (R_RISCV_SUB16, 38)
+ RELOC_NUMBER (R_RISCV_SUB32, 39)
+ RELOC_NUMBER (R_RISCV_SUB64, 40)
+ RELOC_NUMBER (R_RISCV_GNU_VTINHERIT, 41)
+ RELOC_NUMBER (R_RISCV_GNU_VTENTRY, 42)
+ RELOC_NUMBER (R_RISCV_ALIGN, 43)
+ RELOC_NUMBER (R_RISCV_RVC_BRANCH, 44)
+ RELOC_NUMBER (R_RISCV_RVC_JUMP, 45)
+ RELOC_NUMBER (R_RISCV_RVC_LUI, 46)
+ RELOC_NUMBER (R_RISCV_GPREL_I, 47)
+ RELOC_NUMBER (R_RISCV_GPREL_S, 48)
+ RELOC_NUMBER (R_RISCV_TPREL_I, 49)
+ RELOC_NUMBER (R_RISCV_TPREL_S, 50)
+ RELOC_NUMBER (R_RISCV_RELAX, 51)
+ RELOC_NUMBER (R_RISCV_SUB6, 52)
+ RELOC_NUMBER (R_RISCV_SET6, 53)
+ RELOC_NUMBER (R_RISCV_SET8, 54)
+ RELOC_NUMBER (R_RISCV_SET16, 55)
+ RELOC_NUMBER (R_RISCV_SET32, 56)
+ RELOC_NUMBER (R_RISCV_32_PCREL, 57)
+END_RELOC_NUMBERS (R_RISCV_max)
+
+/* Processor specific flags for the ELF header e_flags field. */
+
+/* File may contain compressed instructions. */
+#define EF_RISCV_RVC 0x0001
+
+/* Which floating-point ABI a file uses. */
+#define EF_RISCV_FLOAT_ABI 0x0006
+
+/* File uses the soft-float ABI. */
+#define EF_RISCV_FLOAT_ABI_SOFT 0x0000
+
+/* File uses the single-float ABI. */
+#define EF_RISCV_FLOAT_ABI_SINGLE 0x0002
+
+/* File uses the double-float ABI. */
+#define EF_RISCV_FLOAT_ABI_DOUBLE 0x0004
+
+/* File uses the quad-float ABI. */
+#define EF_RISCV_FLOAT_ABI_QUAD 0x0006
+
+/* File uses the 32E base integer instruction. */
+#define EF_RISCV_RVE 0x0008
+
+/* The name of the global pointer symbol. */
+#define RISCV_GP_SYMBOL "__global_pointer$"
+
+/* Additional section types. */
+#define SHT_RISCV_ATTRIBUTES 0x70000003 /* Section holds attributes. */
+
+/* Object attributes. */
+
+enum
+{
+ /* 0-3 are generic. */
+ Tag_RISCV_stack_align = 4,
+ Tag_RISCV_arch = 5,
+ Tag_RISCV_unaligned_access = 6,
+ Tag_RISCV_priv_spec = 8,
+ Tag_RISCV_priv_spec_minor = 10,
+ Tag_RISCV_priv_spec_revision = 12
+};
+
+#endif /* _ELF_RISCV_H */
diff --git a/include/syscall64_nr.h b/include/syscall64_nr.h
new file mode 100644
index 0000000..cc82f32
--- /dev/null
+++ b/include/syscall64_nr.h
@@ -0,0 +1,301 @@
+/*
+ * This file contains the system call numbers.
+ */
+#ifndef LINUX_USER_RISCV_SYSCALL64_NR_H
+#define LINUX_USER_RISCV_SYSCALL64_NR_H
+
+#define TARGET_NR_io_setup 0
+#define TARGET_NR_io_destroy 1
+#define TARGET_NR_io_submit 2
+#define TARGET_NR_io_cancel 3
+#define TARGET_NR_io_getevents 4
+#define TARGET_NR_setxattr 5
+#define TARGET_NR_lsetxattr 6
+#define TARGET_NR_fsetxattr 7
+#define TARGET_NR_getxattr 8
+#define TARGET_NR_lgetxattr 9
+#define TARGET_NR_fgetxattr 10
+#define TARGET_NR_listxattr 11
+#define TARGET_NR_llistxattr 12
+#define TARGET_NR_flistxattr 13
+#define TARGET_NR_removexattr 14
+#define TARGET_NR_lremovexattr 15
+#define TARGET_NR_fremovexattr 16
+#define TARGET_NR_getcwd 17
+#define TARGET_NR_lookup_dcookie 18
+#define TARGET_NR_eventfd2 19
+#define TARGET_NR_epoll_create1 20
+#define TARGET_NR_epoll_ctl 21
+#define TARGET_NR_epoll_pwait 22
+#define TARGET_NR_dup 23
+#define TARGET_NR_dup3 24
+#define TARGET_NR_fcntl 25
+#define TARGET_NR_inotify_init1 26
+#define TARGET_NR_inotify_add_watch 27
+#define TARGET_NR_inotify_rm_watch 28
+#define TARGET_NR_ioctl 29
+#define TARGET_NR_ioprio_set 30
+#define TARGET_NR_ioprio_get 31
+#define TARGET_NR_flock 32
+#define TARGET_NR_mknodat 33
+#define TARGET_NR_mkdirat 34
+#define TARGET_NR_unlinkat 35
+#define TARGET_NR_symlinkat 36
+#define TARGET_NR_linkat 37
+#define TARGET_NR_umount2 39
+#define TARGET_NR_mount 40
+#define TARGET_NR_pivot_root 41
+#define TARGET_NR_nfsservctl 42
+#define TARGET_NR_statfs 43
+#define TARGET_NR_fstatfs 44
+#define TARGET_NR_truncate 45
+#define TARGET_NR_ftruncate 46
+#define TARGET_NR_fallocate 47
+#define TARGET_NR_faccessat 48
+#define TARGET_NR_chdir 49
+#define TARGET_NR_fchdir 50
+#define TARGET_NR_chroot 51
+#define TARGET_NR_fchmod 52
+#define TARGET_NR_fchmodat 53
+#define TARGET_NR_fchownat 54
+#define TARGET_NR_fchown 55
+#define TARGET_NR_openat 56
+#define TARGET_NR_close 57
+#define TARGET_NR_vhangup 58
+#define TARGET_NR_pipe2 59
+#define TARGET_NR_quotactl 60
+#define TARGET_NR_getdents64 61
+#define TARGET_NR_lseek 62
+#define TARGET_NR_read 63
+#define TARGET_NR_write 64
+#define TARGET_NR_readv 65
+#define TARGET_NR_writev 66
+#define TARGET_NR_pread64 67
+#define TARGET_NR_pwrite64 68
+#define TARGET_NR_preadv 69
+#define TARGET_NR_pwritev 70
+#define TARGET_NR_sendfile 71
+#define TARGET_NR_pselect6 72
+#define TARGET_NR_ppoll 73
+#define TARGET_NR_signalfd4 74
+#define TARGET_NR_vmsplice 75
+#define TARGET_NR_splice 76
+#define TARGET_NR_tee 77
+#define TARGET_NR_readlinkat 78
+#define TARGET_NR_newfstatat 79
+#define TARGET_NR_fstat 80
+#define TARGET_NR_sync 81
+#define TARGET_NR_fsync 82
+#define TARGET_NR_fdatasync 83
+#define TARGET_NR_sync_file_range 84
+#define TARGET_NR_timerfd_create 85
+#define TARGET_NR_timerfd_settime 86
+#define TARGET_NR_timerfd_gettime 87
+#define TARGET_NR_utimensat 88
+#define TARGET_NR_acct 89
+#define TARGET_NR_capget 90
+#define TARGET_NR_capset 91
+#define TARGET_NR_personality 92
+#define TARGET_NR_exit 93
+#define TARGET_NR_exit_group 94
+#define TARGET_NR_waitid 95
+#define TARGET_NR_set_tid_address 96
+#define TARGET_NR_unshare 97
+#define TARGET_NR_futex 98
+#define TARGET_NR_set_robust_list 99
+#define TARGET_NR_get_robust_list 100
+#define TARGET_NR_nanosleep 101
+#define TARGET_NR_getitimer 102
+#define TARGET_NR_setitimer 103
+#define TARGET_NR_kexec_load 104
+#define TARGET_NR_init_module 105
+#define TARGET_NR_delete_module 106
+#define TARGET_NR_timer_create 107
+#define TARGET_NR_timer_gettime 108
+#define TARGET_NR_timer_getoverrun 109
+#define TARGET_NR_timer_settime 110
+#define TARGET_NR_timer_delete 111
+#define TARGET_NR_clock_settime 112
+#define TARGET_NR_clock_gettime 113
+#define TARGET_NR_clock_getres 114
+#define TARGET_NR_clock_nanosleep 115
+#define TARGET_NR_syslog 116
+#define TARGET_NR_ptrace 117
+#define TARGET_NR_sched_setparam 118
+#define TARGET_NR_sched_setscheduler 119
+#define TARGET_NR_sched_getscheduler 120
+#define TARGET_NR_sched_getparam 121
+#define TARGET_NR_sched_setaffinity 122
+#define TARGET_NR_sched_getaffinity 123
+#define TARGET_NR_sched_yield 124
+#define TARGET_NR_sched_get_priority_max 125
+#define TARGET_NR_sched_get_priority_min 126
+#define TARGET_NR_sched_rr_get_interval 127
+#define TARGET_NR_restart_syscall 128
+#define TARGET_NR_kill 129
+#define TARGET_NR_tkill 130
+#define TARGET_NR_tgkill 131
+#define TARGET_NR_sigaltstack 132
+#define TARGET_NR_rt_sigsuspend 133
+#define TARGET_NR_rt_sigaction 134
+#define TARGET_NR_rt_sigprocmask 135
+#define TARGET_NR_rt_sigpending 136
+#define TARGET_NR_rt_sigtimedwait 137
+#define TARGET_NR_rt_sigqueueinfo 138
+#define TARGET_NR_rt_sigreturn 139
+#define TARGET_NR_setpriority 140
+#define TARGET_NR_getpriority 141
+#define TARGET_NR_reboot 142
+#define TARGET_NR_setregid 143
+#define TARGET_NR_setgid 144
+#define TARGET_NR_setreuid 145
+#define TARGET_NR_setuid 146
+#define TARGET_NR_setresuid 147
+#define TARGET_NR_getresuid 148
+#define TARGET_NR_setresgid 149
+#define TARGET_NR_getresgid 150
+#define TARGET_NR_setfsuid 151
+#define TARGET_NR_setfsgid 152
+#define TARGET_NR_times 153
+#define TARGET_NR_setpgid 154
+#define TARGET_NR_getpgid 155
+#define TARGET_NR_getsid 156
+#define TARGET_NR_setsid 157
+#define TARGET_NR_getgroups 158
+#define TARGET_NR_setgroups 159
+#define TARGET_NR_uname 160
+#define TARGET_NR_sethostname 161
+#define TARGET_NR_setdomainname 162
+#define TARGET_NR_getrlimit 163
+#define TARGET_NR_setrlimit 164
+#define TARGET_NR_getrusage 165
+#define TARGET_NR_umask 166
+#define TARGET_NR_prctl 167
+#define TARGET_NR_getcpu 168
+#define TARGET_NR_gettimeofday 169
+#define TARGET_NR_settimeofday 170
+#define TARGET_NR_adjtimex 171
+#define TARGET_NR_getpid 172
+#define TARGET_NR_getppid 173
+#define TARGET_NR_getuid 174
+#define TARGET_NR_geteuid 175
+#define TARGET_NR_getgid 176
+#define TARGET_NR_getegid 177
+#define TARGET_NR_gettid 178
+#define TARGET_NR_sysinfo 179
+#define TARGET_NR_mq_open 180
+#define TARGET_NR_mq_unlink 181
+#define TARGET_NR_mq_timedsend 182
+#define TARGET_NR_mq_timedreceive 183
+#define TARGET_NR_mq_notify 184
+#define TARGET_NR_mq_getsetattr 185
+#define TARGET_NR_msgget 186
+#define TARGET_NR_msgctl 187
+#define TARGET_NR_msgrcv 188
+#define TARGET_NR_msgsnd 189
+#define TARGET_NR_semget 190
+#define TARGET_NR_semctl 191
+#define TARGET_NR_semtimedop 192
+#define TARGET_NR_semop 193
+#define TARGET_NR_shmget 194
+#define TARGET_NR_shmctl 195
+#define TARGET_NR_shmat 196
+#define TARGET_NR_shmdt 197
+#define TARGET_NR_socket 198
+#define TARGET_NR_socketpair 199
+#define TARGET_NR_bind 200
+#define TARGET_NR_listen 201
+#define TARGET_NR_accept 202
+#define TARGET_NR_connect 203
+#define TARGET_NR_getsockname 204
+#define TARGET_NR_getpeername 205
+#define TARGET_NR_sendto 206
+#define TARGET_NR_recvfrom 207
+#define TARGET_NR_setsockopt 208
+#define TARGET_NR_getsockopt 209
+#define TARGET_NR_shutdown 210
+#define TARGET_NR_sendmsg 211
+#define TARGET_NR_recvmsg 212
+#define TARGET_NR_readahead 213
+#define TARGET_NR_brk 214
+#define TARGET_NR_munmap 215
+#define TARGET_NR_mremap 216
+#define TARGET_NR_add_key 217
+#define TARGET_NR_request_key 218
+#define TARGET_NR_keyctl 219
+#define TARGET_NR_clone 220
+#define TARGET_NR_execve 221
+#define TARGET_NR_mmap 222
+#define TARGET_NR_fadvise64 223
+#define TARGET_NR_swapon 224
+#define TARGET_NR_swapoff 225
+#define TARGET_NR_mprotect 226
+#define TARGET_NR_msync 227
+#define TARGET_NR_mlock 228
+#define TARGET_NR_munlock 229
+#define TARGET_NR_mlockall 230
+#define TARGET_NR_munlockall 231
+#define TARGET_NR_mincore 232
+#define TARGET_NR_madvise 233
+#define TARGET_NR_remap_file_pages 234
+#define TARGET_NR_mbind 235
+#define TARGET_NR_get_mempolicy 236
+#define TARGET_NR_set_mempolicy 237
+#define TARGET_NR_migrate_pages 238
+#define TARGET_NR_move_pages 239
+#define TARGET_NR_rt_tgsigqueueinfo 240
+#define TARGET_NR_perf_event_open 241
+#define TARGET_NR_accept4 242
+#define TARGET_NR_recvmmsg 243
+#define TARGET_NR_arch_specific_syscall 244
+#define TARGET_NR_riscv_flush_icache (TARGET_NR_arch_specific_syscall + 15)
+#define TARGET_NR_wait4 260
+#define TARGET_NR_prlimit64 261
+#define TARGET_NR_fanotify_init 262
+#define TARGET_NR_fanotify_mark 263
+#define TARGET_NR_name_to_handle_at 264
+#define TARGET_NR_open_by_handle_at 265
+#define TARGET_NR_clock_adjtime 266
+#define TARGET_NR_syncfs 267
+#define TARGET_NR_setns 268
+#define TARGET_NR_sendmmsg 269
+#define TARGET_NR_process_vm_readv 270
+#define TARGET_NR_process_vm_writev 271
+#define TARGET_NR_kcmp 272
+#define TARGET_NR_finit_module 273
+#define TARGET_NR_sched_setattr 274
+#define TARGET_NR_sched_getattr 275
+#define TARGET_NR_renameat2 276
+#define TARGET_NR_seccomp 277
+#define TARGET_NR_getrandom 278
+#define TARGET_NR_memfd_create 279
+#define TARGET_NR_bpf 280
+#define TARGET_NR_execveat 281
+#define TARGET_NR_userfaultfd 282
+#define TARGET_NR_membarrier 283
+#define TARGET_NR_mlock2 284
+#define TARGET_NR_copy_file_range 285
+#define TARGET_NR_preadv2 286
+#define TARGET_NR_pwritev2 287
+#define TARGET_NR_pkey_mprotect 288
+#define TARGET_NR_pkey_alloc 289
+#define TARGET_NR_pkey_free 290
+#define TARGET_NR_statx 291
+#define TARGET_NR_io_pgetevents 292
+#define TARGET_NR_rseq 293
+#define TARGET_NR_kexec_file_load 294
+#define TARGET_NR_pidfd_send_signal 424
+#define TARGET_NR_io_uring_setup 425
+#define TARGET_NR_io_uring_enter 426
+#define TARGET_NR_io_uring_register 427
+#define TARGET_NR_open_tree 428
+#define TARGET_NR_move_mount 429
+#define TARGET_NR_fsopen 430
+#define TARGET_NR_fsconfig 431
+#define TARGET_NR_fsmount 432
+#define TARGET_NR_fspick 433
+#define TARGET_NR_pidfd_open 434
+#define TARGET_NR_clone3 435
+#define TARGET_NR_syscalls 436
+
+#endif /* LINUX_USER_RISCV_SYSCALL64_NR_H */
diff --git a/pipesim/Makefile b/pipesim/Makefile
new file mode 100644
index 0000000..d72d2b0
--- /dev/null
+++ b/pipesim/Makefile
@@ -0,0 +1,77 @@
+# Path where things should be installed
+R = $(HOME)
+B = build
+
+_dummy := $(shell mkdir -p $B)
+
+# Object files for libcava.a
+aobj := perfctr.o cache.o
+aobj := $(addprefix $B/,$(aobj))
+
+# Object files for caveat not in libcava.a
+cobj := pipesim.o fast_pipe.o trace_pipe.o count_pipe.o trace_count_pipe.o
+cobj := $(addprefix $B/,$(cobj))
+
+# Include files for libcava.a
+incf := perfctr.h cache.h lru_fsm_1way.h lru_fsm_2way.h lru_fsm_3way.h lru_fsm_4way.h
+
+# Libraries
+libs := -lrt -lpthread -lm
+
+# Compiler flags
+CFLAGS := -I$R/include/cava -g -Ofast
+#CFLAGS := -I$R/include/cava -g -O0
+
+
+# Dependent headers
+hdrs := opcodes.h insn.h shmfifo.h caveat.h
+
+# Text substitutions
+hdrs := $(addprefix $R/include/cava/,$(hdrs))
+
+
+# Make targets
+
+all:
+
+install: $B/pipesim $R/lib/libcava.a $(incf)
+ -cp $B/pipesim $R/bin/pipesim
+ -cp $(incf) $R/include/cava
+
+.PHONY: clean
+
+$R/lib/libcava.a: $(aobj)
+ ar rcs $@ $^
+
+
+clean:
+ rm -f lru_fsm_?way.h *.o *~ ./#*#
+ rm -rf build
+
+
+# Pipeline simulator and library
+
+$B/pipesim: $(cobj) $R/lib/libcava.a
+ $(CC) $(CFLAGS) -o $@ $^ $(libs)
+
+
+# Dependencies
+
+$B/pipesim.o $B/fast_pipe.o $B/trace_pipe.o $B/count_pipe.o $B/trace_count_pipe.o: pipesim.h cache.h perfctr.h $(hdrs) $(incf)
+$B/fast_pipe.o $B/trace_pipe.o $B/count_pipe.o $B/trace_count_pipe.o: mainloop.h
+$B/perfctr.o: perfctr.h
+
+lru_fsm_1way.h: make_cache
+ ./make_cache 1
+
+lru_fsm_2way.h: make_cache
+ ./make_cache 2
+
+lru_fsm_3way.h: make_cache
+ ./make_cache 3
+
+lru_fsm_4way.h: make_cache
+ ./make_cache 4
+
+$B/%.o : %.c
+ $(CC) $(CFLAGS) -o $@ -c $<
diff --git a/pipesim/cache.c b/pipesim/cache.c
new file mode 100644
index 0000000..193383e
--- /dev/null
+++ b/pipesim/cache.c
@@ -0,0 +1,38 @@
+#include
+#include
+#include
+
+#include "cache.h"
+
+void flush_cache( struct cache_t* c )
+{
+ for (int k=0; kways; k++)
+ memset((char*)c->tags[k], 0, c->ways*sizeof(struct tag_t));
+ memset((char*)c->states, 0, c->rows*sizeof(unsigned short));
+}
+
+void init_cache( struct cache_t* c, struct lru_fsm_t* fsm, int writeable )
+{
+ c->fsm = fsm; /* note purposely point to [-1] */
+ c->line = 1 << c->lg_line;
+ c->rows = 1 << c->lg_rows;
+ c->ways = fsm->way;
+ c->row_mask = c->rows-1;
+ c->tags = (struct tag_t**)malloc(c->ways*sizeof(struct tag_t**));
+ for (int k=0; kways; k++)
+ c->tags[k] = (struct tag_t*)malloc(c->rows*sizeof(struct tag_t));
+ c->states = (unsigned short*)malloc(c->rows*sizeof(unsigned short));
+ flush_cache(c);
+ static long place =0;
+ c->evicted = writeable ? &place : 0;
+ c->refs = c->misses = 0;
+ c->updates = c->evictions = 0;
+}
+
+
+void show_cache( struct cache_t* c )
+{
+ fprintf(stderr, "lg_line=%ld lg_rows=%ld line=%ld rows=%ld ways=%ld row_mask=0x%lx\n",
+ c->lg_line, c->lg_rows, c->line, c->rows, c->ways, c->row_mask);
+}
+
diff --git a/pipesim/cache.h b/pipesim/cache.h
new file mode 100644
index 0000000..8b8ba06
--- /dev/null
+++ b/pipesim/cache.h
@@ -0,0 +1,84 @@
+/*
+ Copyright (c) 2020 Peter Hsu. All Rights Reserved. See LICENCE file for details.
+*/
+
+
+#ifndef CACHE_T
+#define CACHE_T
+
+
+struct tag_t { /* 16 byte object */
+ long addr ; /* 64-bit entry */
+ unsigned dirty : 1; /* 1 bit flag */
+ long ready : 63; /* 63 bit time */
+};
+
+struct lru_fsm_t {
+ unsigned short way; /* cache way to look up */
+ unsigned short next_state; /* number if hit */
+};
+
+struct cache_t { /* cache descriptor */
+ struct lru_fsm_t* fsm; /* LRU state transitions [ways!][ways] */
+ long line; /* line size in bytes */
+ long rows; /* number of rows */
+ long ways; /* number of ways */
+ long lg_line, lg_rows; /* specified in log-base-2 units */
+ long row_mask; /* row index mask = (1<[rows] */
+ unsigned short* states; /* LRU state vector [rows] */
+ long* evicted; /* tag of evicted line, 0 if clean, NULL if unwritable */
+ long penalty; /* cycles to refill line */
+ long refs, misses; /* count number of */
+ long updates, evictions; /* if writeable */
+};
+
+void flush_cache( struct cache_t* c );
+
+void init_cache( struct cache_t* c, struct lru_fsm_t* fsm, int writeable );
+
+void show_cache( struct cache_t* c );
+
+
+/* returns cycle when line available (may be in past)
+ cache miss if return value == when_miss_arrive */
+static inline long lookup_cache( struct cache_t* c, long addr, int write, long when_miss_arrive )
+{
+ c->refs++;
+ addr >>= c->lg_line; /* make proper tag (ok to include index) */
+ int index = addr & c->row_mask;
+ unsigned short* state = c->states + index;
+
+ struct lru_fsm_t* p = c->fsm + *state; /* recall c->fsm points to [-1] */
+ struct lru_fsm_t* end = p + c->ways; /* hence +ways = last entry */
+ struct tag_t* tag;
+ do {
+ p++;
+ tag = c->tags[p->way] + index;
+ if (addr == tag->addr)
+ goto cache_hit;
+ } while (p < end);
+
+ c->misses++;
+ if (tag->dirty) {
+ *c->evicted = tag->addr; /* will SEGV if not cache not writable */
+ c->evictions++; /* can conveniently point to your location */
+ tag->dirty = 0;
+ }
+ else if (c->evicted)
+ *c->evicted = 0;
+ tag->addr = addr;
+ tag->ready = when_miss_arrive;
+
+ cache_hit:
+ *state = p->next_state; /* already multiplied by c->ways */
+ if (write) {
+ tag->dirty = 1;
+ c->updates++;
+ }
+ return tag->ready;
+}
+
+
+
+#endif
diff --git a/pipesim/count_pipe.c b/pipesim/count_pipe.c
new file mode 100644
index 0000000..56154d8
--- /dev/null
+++ b/pipesim/count_pipe.c
@@ -0,0 +1,23 @@
+/*
+ Copyright (c) 2020 Peter Hsu. All Rights Reserved. See LICENCE file for details.
+*/
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "caveat.h"
+#include "opcodes.h"
+#include "insn.h"
+#include "shmfifo.h"
+#include "cache.h"
+#include "perfctr.h"
+#include "pipesim.h"
+
+void count_pipe(long next_report, long (*model_dcache)(long tr, const struct insn_t* p, long available))
+
+#define COUNT
+#include "mainloop.h"
diff --git a/pipesim/fast_pipe.c b/pipesim/fast_pipe.c
new file mode 100644
index 0000000..5b10da2
--- /dev/null
+++ b/pipesim/fast_pipe.c
@@ -0,0 +1,23 @@
+/*
+ Copyright (c) 2020 Peter Hsu. All Rights Reserved. See LICENCE file for details.
+*/
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "caveat.h"
+#include "opcodes.h"
+#include "insn.h"
+#include "shmfifo.h"
+#include "cache.h"
+//#include "perfctr.h"
+#include "pipesim.h"
+
+
+void fast_pipe(long next_report, long (*model_dcache)(long tr, const struct insn_t* p, long available))
+
+#include "mainloop.h"
diff --git a/pipesim/mainloop.h b/pipesim/mainloop.h
new file mode 100644
index 0000000..51cb713
--- /dev/null
+++ b/pipesim/mainloop.h
@@ -0,0 +1,114 @@
+/*
+ Copyright (c) 2020 Peter Hsu. All Rights Reserved. See LICENCE file for details.
+*/
+
+#define max(a, b) ( a > b ? a : b )
+
+{
+ static long busy[256]; /* cycle when register becomes available */
+ long pc =0;
+ long icount =0; /* instructions executed */
+ long now =0; /* current cycle */
+ int cursor =0; /* into mem_queue[] */
+
+ uint64_t tr = fifo_get(in);
+ for ( ;; ) {
+ while (!is_frame(tr)) {
+ if (is_mem(tr))
+ mem_queue[cursor++] = tr;
+ else if (is_bbk(tr)) {
+ long epc = pc + tr_delta(tr);
+ cursor = 0; /* read list of memory addresses */
+ while (pc < epc) {
+ long before_issue = now;
+
+ /* model instruction fetch */
+ long pctag = pc & ib.tag_mask;
+ long blkidx = (pc >> ib.blksize) & ib.blk_mask;
+ if (pctag != ib.tag[ib.mru]) {
+ if (pctag == ib.tag[1-ib.mru]) { /* hit LRU: reverse MRU, LRU */
+ ib.mru = 1 - ib.mru;
+ ib.curblk = pc & ib.subblockmask;
+ }
+ else { /* miss: shift MRU to LRU, fill MRU */
+ ib.misses++;
+#ifdef COUNT
+ *ibmiss(pc) += 1;
+#endif
+ now += ib.penalty;
+ ib.mru = 1 - ib.mru;
+ ib.tag[ib.mru] = pctag;
+ memset(ib.ready[ib.mru], 0, ib.numblks*sizeof(long));
+ ib.curblk = pc & ib.subblockmask;
+ long ready = lookup_cache(&ic, pc, 0, now+ic.penalty);
+ ib.ready[ib.mru][ib.curblk] = ready;
+ if (ready == now+ic.penalty) {
+#ifdef COUNT
+ *icmiss(pc) += 1;
+#endif
+#ifdef TRACE
+ fifo_put(out, trM(tr_i1get, pc));
+#endif
+ }
+ }
+ }
+ now = max(now, ib.ready[ib.mru][blkidx]);
+
+ /* scoreboarding: advance time until source registers not busy */
+ const struct insn_t* p = insn(pc);
+ now = max(now, busy[p->op_rs1]);
+ now = max(now, busy[p->op.rs2]);
+ if (threeOp(p->op_code))
+ now = max(now, busy[p->op.rs3]);
+
+ /* model loads and stores */
+ long ready = now;
+ if (memOp(p->op_code)) {
+#ifdef TRACE
+ if (model_dcache)
+ ready = model_dcache(mem_queue[cursor++], p, now+dc.penalty);
+ else
+#endif
+ ready = lookup_cache(&dc, tr_value(mem_queue[cursor++]), writeOp(p->op_code), now+dc.penalty);
+ /* note ready may be long in the past */
+#ifdef COUNT
+ if (ready == now+dc.penalty)
+ *dcmiss(pc) += 1;
+#endif
+ }
+ /* model function unit latency */
+ busy[p->op_rd] = ready + insnAttr[p->op_code].latency;
+ busy[NOREG] = 0; /* in case p->op_rd not valid */
+ now += 1; /* single issue machine */
+#ifdef COUNT
+ struct count_t* c = count(pc);
+ c->count++;
+ c->cycles += now - before_issue;
+#endif
+ if (++icount >= next_report) {
+ status_report(now, icount);
+ next_report += report;
+ }
+ pc += shortOp(p->op_code) ? 2 : 4;
+ } /* while (pc < epc) */
+ if (is_goto(tr)) { /* model taken branch */
+ pc = tr_pc(tr);
+ now += ib.delay;
+ }
+ } /* else if (is_bbk(tr)) */
+ cursor = 0; /* get ready to enqueue another list */
+ tr=fifo_get(in);
+ } /* while (!is_frame(tr) */
+
+ status_report(now, icount);
+ if (tr_code(tr) == tr_eof)
+ return;
+ /* model discontinous trace segment */
+ hart = tr_value(tr);
+ pc = tr_pc(tr);
+ ib.tag[0] = ib.tag[1] = 0L; /* flush instruction buffer */
+ flush_cache(&ic); /* should we flush? */
+ flush_cache(&dc); /* should we flush? */
+ tr=fifo_get(in);
+ }
+}
diff --git a/pipesim/make_cache b/pipesim/make_cache
new file mode 100755
index 0000000..2605893
--- /dev/null
+++ b/pipesim/make_cache
@@ -0,0 +1,75 @@
+#!/usr/bin/python3
+#
+# Copyright (c) 2020 Peter Hsu. All Rights Reserved. See LICENCE file for details.
+#
+
+import sys
+
+if len(sys.argv) != 2:
+ print("usage: ./make_cache ")
+ exit(0)
+
+N = int(sys.argv[1])
+filename = 'lru_fsm_{:d}way.h'.format(N)
+print('Making', N, 'way associative cache in file ', filename)
+
+def cacheHit(state, hit):
+ new = state.copy()
+# print("cacheHit(", state, hit, ")")
+ way = new.pop(hit)
+ new.insert(0, way)
+ return new
+
+def makeKey(state):
+ key = '-'
+ key = key.join(state)
+ return key
+
+def factorial(state):
+ key = makeKey(state)
+ for i in range(N):
+ nextState = cacheHit(state, i)
+ nextKey = makeKey(nextState)
+ if nextKey not in table:
+ table[nextKey] = [ None ]*N
+ factorial(nextState)
+ table[key][i] = nextKey
+
+initial = []
+for i in range(N-1, -1, -1):
+ initial.append(str(i))
+table = {}
+table[makeKey(initial)] = [ None ]*N
+factorial(initial)
+
+number = {}
+k = 0
+for key in sorted(table):
+ number[key] = k
+ k += 1
+
+
+
+f = open(filename, 'w');
+f.write('struct lru_fsm_t cache_fsm_{:d}way[] = {{\n'.format(N))
+f.write('/* Header */\t{{ {:d}, {:3d} }}, /* Ways, Number of states */\n'.format(int(sys.argv[1]), len(table)))
+
+k = 0
+for key in sorted(table):
+ ways = key.split('-')
+ for (i, ww) in enumerate(ways):
+ w = int(ww)
+ ns = number[table[key][i]]
+ if ns == k:
+ f.write('/* {:2d} */'.format(k))
+ else:
+ f.write('\t')
+ f.write('\t{{ {:d}, {:3d}*{:d} }}, /* {:s} */\n'.format(w, ns, N, table[key][i]))
+ lru_w = w
+ lru_i = i
+ k += 1
+
+f.write('};\n')
+
+f.close()
+exit(0)
diff --git a/pipesim/perfctr.c b/pipesim/perfctr.c
new file mode 100644
index 0000000..96dcc3c
--- /dev/null
+++ b/pipesim/perfctr.c
@@ -0,0 +1,74 @@
+/*
+ Copyright (c) 2020 Peter Hsu. All Rights Reserved. See LICENCE file for details.
+*/
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "caveat.h"
+#include "opcodes.h"
+#include "insn.h"
+#include "perfctr.h"
+
+
+struct perfCounters_t perf;
+
+
+void perf_create(const char* shm_name)
+{
+ dieif(!shm_name, "Must include --perf=");
+ int n = (insnSpace.bound - insnSpace.base) / 2;
+ long sz = sizeof(struct perf_header_t);
+ sz += n * sizeof(struct count_t);
+ sz += n * sizeof(long) * 3;
+ // sz += insnSpace.bound - insnSpace.base;
+ int fd = shm_open(shm_name, O_CREAT|O_TRUNC|O_RDWR, S_IRWXU);
+ dieif(fd<0, "shm_open() failed in perf_create");
+ dieif(ftruncate(fd, sz)<0, "ftruncate() failed in perf_create");
+ perf.h = (struct perf_header_t*)mmap(0, sz, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0);
+ dieif(perf.h==0, "mmap() failed in perf_create");
+ memset((char*)perf.h, 0, sz);
+ perf.h->base = insnSpace.base;
+ perf.h->bound = insnSpace.bound;
+ perf.h->size = sz;
+ perf.count_array = (struct count_t*)( (char*)perf.h + sizeof(struct perf_header_t) );
+ perf.ib_miss = (long*)&perf.count_array[n];
+ perf.ic_miss = (long*)&perf.ib_miss[n];
+ perf.dc_miss = (long*)&perf.ic_miss[n];
+ // perf.text_segment = (char*)&perf.dc_miss[n];
+ // memcpy(perf.text_segment, (char*)insnSpace.base, (insnSpace.bound-insnSpace.base));
+ for (Addr_t pc=perf.h->base; pcbound; pc+=2)
+ decode_instruction(&perf.count_array[(pc-perf.h->base)/2].i, pc);
+}
+
+void perf_open(const char* shm_name)
+{
+ int fd = shm_open(shm_name, O_RDONLY, 0);
+ dieif(fd<0, "shm_open() failed in perf_open");
+ perf.h = (struct perf_header_t*)mmap(0, sizeof(struct perf_header_t), PROT_READ, MAP_SHARED, fd, 0);
+ dieif(perf.h==0, "first mmap() failed in perf_open");
+ long sz = perf.h->size;
+ dieif(munmap(perf.h, sizeof(struct perf_header_t))<0, "munmap() failed in perf_open");
+ perf.h = (struct perf_header_t*)mmap(0, sz, PROT_READ, MAP_SHARED, fd, 0);
+ dieif(perf.h==0, "second mmap() failed in perf_open");
+ perf.count_array = (struct count_t*)( (char*)perf.h + sizeof(struct perf_header_t) );
+ long n = (perf.h->bound - perf.h->base) / 2;
+ perf.ib_miss = (long*)&perf.count_array[n];
+ perf.ic_miss = (long*)&perf.ib_miss[n];
+ perf.dc_miss = (long*)&perf.ic_miss[n];
+ // perf.text_segment = (char*)&perf.ic_miss[n];
+}
+
+void perf_close()
+{
+ dieif(munmap(perf.h, perf.h->size)<0, "munmap() failed in perf_close");
+}
diff --git a/pipesim/perfctr.h b/pipesim/perfctr.h
new file mode 100644
index 0000000..31f87a5
--- /dev/null
+++ b/pipesim/perfctr.h
@@ -0,0 +1,64 @@
+/*
+ Copyright (c) 2020 Peter Hsu. All Rights Reserved. See LICENCE file for details.
+*/
+
+
+
+struct count_t { /* together for cache locality */
+ struct insn_t i; /* decoded instruction */
+ long count; /* how many times executed */
+ long cycles; /* total including stalls */
+}; /* CPI = cycles/count */
+
+/*
+ The performance monitoring shared memory segment consists of:
+ 1. Header struct (128B, below)
+ 2. Array of pre-decoded instructions and counts (above)
+ 3. Array of per-instruction ib_miss
+ 4. Array of per-instruction ic_miss
+ 5. Array of per-instruction dc_miss
+ 6. Copy of text segment (size bound-base bytes)
+ All arrays of dimension (bound-base)/2
+*/
+struct perf_header_t {
+ long base, bound; /* text segment addresses */
+ long size; /* of shared memory segment */
+ long pad1[8-3]; /* read-only stuff in own 64B cache line */
+ long ib_misses; /* number of instruction buffer misses */
+ long ic_misses; /* number of instruction cache misses */
+ long dc_misses; /* number of data cache misses */
+ long insns; /* number of instructions executed */
+ long cycles; /* number of cycles simulated */
+ long segments; /* number of disjoint trace segments */
+ long pad2[8-6]; /* rapidly updated stuff in own cache line */
+};
+
+
+/*
+ Base pointers into shared memory segment.
+*/
+struct perfCounters_t {
+ struct perf_header_t* h; /* shared memory header */
+ struct count_t* count_array; /* predecoded instruction & counts */
+ long* ib_miss; /* counts instruction buffer miss */
+ long* ic_miss; /* counts instruction cache miss */
+ long* dc_miss; /* counts data cache miss */
+ // char* text_segment; /* copy of text segment in pipesim */
+ struct timeval start; /* time of day when program started */
+};
+
+extern struct perfCounters_t perf;
+
+#undef insn
+#define insn(pc) ( &perf.count_array[(pc-perf.h->base)/2].i )
+
+static inline struct count_t* count(long pc) { return &perf.count_array[(pc-perf.h->base)/2]; }
+static inline long* ibmiss(long pc) { return &perf.ib_miss[(pc-perf.h->base)/2]; }
+static inline long* icmiss(long pc) { return &perf.ic_miss[(pc-perf.h->base)/2]; }
+static inline long* dcmiss(long pc) { return &perf.dc_miss[(pc-perf.h->base)/2]; }
+//static inline const char* image(long pc) { return &perf.text_segment[pc-perf.h->base]; }
+
+void perf_create(const char* shm_name);
+void perf_open(const char* shm_name);
+void perf_close();
+
diff --git a/pipesim/pipesim.c b/pipesim/pipesim.c
new file mode 100644
index 0000000..accde3d
--- /dev/null
+++ b/pipesim/pipesim.c
@@ -0,0 +1,248 @@
+/*
+ Copyright (c) 2020 Peter Hsu. All Rights Reserved. See LICENCE file for details.
+*/
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "caveat.h"
+#include "opcodes.h"
+#include "insn.h"
+#include "shmfifo.h"
+#include "cache.h"
+#include "perfctr.h"
+#include "pipesim.h"
+
+#include "lru_fsm_1way.h"
+#include "lru_fsm_2way.h"
+#include "lru_fsm_3way.h"
+#include "lru_fsm_4way.h"
+
+unsigned char fu_latency[Number_of_units] =
+ { [Unit_a] = 4, /* FP Adder */
+ [Unit_b] = 1, /* Branch unit */
+ [Unit_f] = 4, /* FP fused Multiply-Add */
+ [Unit_i] = 1, /* Scalar Integer ALU */
+ [Unit_j] = 1, /* Media Integer ALU */
+ [Unit_m] = 4, /* FP Multipler*/
+ [Unit_n] = 8, /* Scalar Integer Multipler */
+ [Unit_r] = 2, /* Load unit */
+ [Unit_s] = 1, /* Scalar Shift unit */
+ [Unit_t] = 1, /* Media Shift unit */
+ [Unit_w] = 1, /* Store unit */
+ [Unit_x] = 5, /* Special unit */
+ };
+
+static const char *in_path, *out_path, *perf_path, *wflag;
+
+const struct options_t opt[] =
+ {
+ { "--in=s", .s=&in_path, .ds=0, .h="Trace file from caveat =name" },
+ { "--perf=s", .s=&perf_path, .ds=0, .h="Performance counters in shared memory =name" },
+
+ { "--bdelay=i", .i=&ib.delay, .di=2, .h="Taken branch delay is =number cycles" },
+ { "--bmiss=i", .i=&ib.penalty, .di=5, .h="L0 instruction buffer refill latency is =number cycles" },
+ { "--bufsz=i", .i=&ib.bufsz, .di=7, .h="L0 instruction buffer capacity is 2*2^ =n bytes" },
+ { "--blocksz=i", .i=&ib.blksize, .di=4, .h="L0 instruction buffer block size is 2^ =n bytes" },
+
+ { "--imiss=i", .i=&ic.penalty, .di=25, .h="L1 instruction cache miss latency is =number cycles" },
+ { "--iline=i", .i=&ic.lg_line, .di=6, .h="L1 instrucdtion cache line size is 2^ =n bytes" },
+ { "--iways=i", .i=&ic.ways, .di=4, .h="L1 instrucdtion cache is =n ways set associativity" },
+ { "--isets=i", .i=&ic.lg_rows, .di=6, .h="L1 instrucdtion cache has 2^ =n sets per way" },
+
+ { "--dmiss=i", .i=&dc.penalty, .di=25, .h="L1 data cache miss latency is =number cycles" },
+ { "--write=s", .s=&wflag, .ds="b", .h="L1 data cache is write=[back|thru]" },
+ { "--dline=i", .i=&dc.lg_line, .di=6, .h="L1 data cache line size is 2^ =n bytes" },
+ { "--dways=i", .i=&dc.ways, .di=4, .h="L1 data cache is =w ways set associativity" },
+ { "--dsets=i", .i=&dc.lg_rows, .di=6, .h="L1 data cache has 2^ =n sets per way" },
+
+ { "--out=s", .s=&out_path, .ds=0, .h="Create output trace file =name" },
+ { "--report=i", .i=&report, .di=100, .h="Progress report every =number million instructions" },
+ { "--quiet", .b=&quiet, .bv=1, .h="Don't report progress to stderr" },
+ { "-q", .b=&quiet, .bv=1, .h="short for --quiet" },
+ { 0 }
+ };
+const char* usage = "pipesim --in=trace --perf=counters [pipesim-options] target-program";
+
+long quiet, report;
+struct timeval start_time;
+long instructions_executed, cycles_simulated;
+
+struct ibuf_t ib;
+struct cache_t ic, dc;
+struct fifo_t* in;
+struct fifo_t* out;
+int hart;
+uint64_t mem_queue[tr_memq_len];
+
+
+
+
+int main(int argc, const char** argv)
+{
+ assert(sizeof(struct insn_t) == 8);
+ gettimeofday(&start_time, 0);
+ for (int i=0; iinsns = icount;
+ perf.h->cycles = now;
+ perf.h->ib_misses = ib.misses;
+ perf.h->ic_misses = ic.misses;
+ perf.h->dc_misses = dc.misses;
+ double kinsns = icount/1e3;
+ fprintf(stderr, " IB=%3.0f I$=%5.3f D$=%4.2f m/Ki",
+ ib.misses/kinsns, ic.misses/kinsns, dc.misses/kinsns);
+ }
+}
+
+
+long dcache_writethru(long tr, const struct insn_t* p, long available)
+{
+ long addr = tr_value(tr);
+ long tag = addr >> dc.lg_line;
+ long when = 0;
+ if (writeOp(p->op_code)) {
+ long sz = tr_size(tr);
+ if (sz < 8) { /* < 8B need L1 for ECC, 8B do not allocate */
+ when = lookup_cache(&dc, addr, 0, available);
+ if (when == available)
+ fifo_put(out, trM(tr_d1get, addr));
+ }
+ fifo_put(out, tr);
+ }
+ else
+ when = lookup_cache(&dc, addr, 0, available);
+ if (when == available) { /* cache miss */
+ fifo_put(out, trM(tr_d1get, addr));
+ }
+ return when;
+}
+
+
+long dcache_writeback(long tr, const struct insn_t* p, long available)
+{
+ long addr = tr_value(tr);
+ long tag = addr >> dc.lg_line;
+ long when = lookup_cache(&dc, addr, writeOp(p->op_code), available);
+ if (when == available) { /* cache miss */
+ if (*dc.evicted)
+ fifo_put(out, trM(tr_d1put, *dc.evicted<lg_blksize */
+ long curblk; /* pc of current ibuffer subblock */
+ long misses; /* number of misses */
+ long bufsz; /* log-base-2 of capacity (bytes) */
+ long blksize; /* log-base-2 of block size (bytes) */
+ long numblks; /* = (1<
+#include
+#include
+#include
+#include
+#include
+
+#include "caveat.h"
+#include "opcodes.h"
+#include "insn.h"
+#include "shmfifo.h"
+#include "cache.h"
+#include "perfctr.h"
+#include "pipesim.h"
+
+void trace_count_pipe(long next_report, long (*model_dcache)(long tr, const struct insn_t* p, long available))
+
+#define TRACE
+#define COUNT
+#include "mainloop.h"
diff --git a/pipesim/trace_pipe.c b/pipesim/trace_pipe.c
new file mode 100644
index 0000000..5f88770
--- /dev/null
+++ b/pipesim/trace_pipe.c
@@ -0,0 +1,24 @@
+/*
+ Copyright (c) 2020 Peter Hsu. All Rights Reserved. See LICENCE file for details.
+*/
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "caveat.h"
+#include "opcodes.h"
+#include "insn.h"
+#include "shmfifo.h"
+#include "cache.h"
+//#include "perfctr.h"
+#include "pipesim.h"
+
+
+void trace_pipe(long next_report, long (*model_dcache)(long tr, const struct insn_t* p, long available))
+
+#define TRACE
+#include "mainloop.h"
diff --git a/softfloat/COPYING.txt b/softfloat/COPYING.txt
new file mode 100644
index 0000000..b5690fa
--- /dev/null
+++ b/softfloat/COPYING.txt
@@ -0,0 +1,37 @@
+
+License for Berkeley SoftFloat Release 3e
+
+John R. Hauser
+2018 January 20
+
+The following applies to the whole of SoftFloat Release 3e as well as to
+each source file individually.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017, 2018 The Regents of the
+University of California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions, and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors
+ may be used to endorse or promote products derived from this software
+ without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
diff --git a/softfloat/README.html b/softfloat/README.html
new file mode 100644
index 0000000..e695c2b
--- /dev/null
+++ b/softfloat/README.html
@@ -0,0 +1,49 @@
+
+
+
+
+Berkeley SoftFloat Package Overview
+
+
+
+
+Package Overview for Berkeley SoftFloat Release 3e
+
+
+John R. Hauser
+2018 January 20
+
+
+
+Berkeley SoftFloat is a software implementation of binary floating-point that
+conforms to the IEEE Standard for Floating-Point Arithmetic.
+SoftFloat is distributed in the form of C source code.
+Building the SoftFloat sources generates a library file (typically
+softfloat.a
or libsoftfloat.a
) containing the
+floating-point subroutines.
+
+
+
+The SoftFloat package is documented in the following files in the
+doc
subdirectory:
+
+
+
+Other files in the package comprise the source code for SoftFloat.
+
+
+
+
diff --git a/softfloat/README.md b/softfloat/README.md
new file mode 100644
index 0000000..d468020
--- /dev/null
+++ b/softfloat/README.md
@@ -0,0 +1,24 @@
+
+Package Overview for Berkeley SoftFloat Release 3e
+==================================================
+
+John R. Hauser
+2018 January 20
+
+
+Berkeley SoftFloat is a software implementation of binary floating-point
+that conforms to the IEEE Standard for Floating-Point Arithmetic. SoftFloat
+is distributed in the form of C source code. Building the SoftFloat sources
+generates a library file (typically `softfloat.a` or `libsoftfloat.a`)
+containing the floating-point subroutines.
+
+
+The SoftFloat package is documented in the following files in the `doc`
+subdirectory:
+
+* [SoftFloat.html](http://www.jhauser.us/arithmetic/SoftFloat-3/doc/SoftFloat.html) Documentation for using the SoftFloat functions.
+* [SoftFloat-source.html](http://www.jhauser.us/arithmetic/SoftFloat-3/doc/SoftFloat-source.html) Documentation for building SoftFloat.
+* [SoftFloat-history.html](http://www.jhauser.us/arithmetic/SoftFloat-3/doc/SoftFloat-history.html) History of the major changes to SoftFloat.
+
+Other files in the package comprise the source code for SoftFloat.
+
diff --git a/softfloat/README.txt b/softfloat/README.txt
new file mode 100644
index 0000000..1613c76
--- /dev/null
+++ b/softfloat/README.txt
@@ -0,0 +1,21 @@
+
+Package Overview for Berkeley SoftFloat Release 3e
+
+John R. Hauser
+2018 January 20
+
+Berkeley SoftFloat is a software implementation of binary floating-point
+that conforms to the IEEE Standard for Floating-Point Arithmetic. SoftFloat
+is distributed in the form of C source code. Building the SoftFloat sources
+generates a library file (typically "softfloat.a" or "libsoftfloat.a")
+containing the floating-point subroutines.
+
+The SoftFloat package is documented in the following files in the "doc"
+subdirectory:
+
+ SoftFloat.html Documentation for using the SoftFloat functions.
+ SoftFloat-source.html Documentation for building SoftFloat.
+ SoftFloat-history.html History of the major changes to SoftFloat.
+
+Other files in the package comprise the source code for SoftFloat.
+
diff --git a/softfloat/build/Linux-386-GCC/Makefile b/softfloat/build/Linux-386-GCC/Makefile
new file mode 100644
index 0000000..faeb397
--- /dev/null
+++ b/softfloat/build/Linux-386-GCC/Makefile
@@ -0,0 +1,325 @@
+
+#=============================================================================
+#
+# This Makefile is part of the SoftFloat IEEE Floating-Point Arithmetic
+# Package, Release 3e, by John R. Hauser.
+#
+# Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the
+# University of California. All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+# 1. Redistributions of source code must retain the above copyright notice,
+# this list of conditions, and the following disclaimer.
+#
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions, and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+#
+# 3. Neither the name of the University nor the names of its contributors
+# may be used to endorse or promote products derived from this software
+# without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+# EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+# DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#=============================================================================
+
+SOURCE_DIR ?= ../../source
+SPECIALIZE_TYPE ?= 8086
+
+SOFTFLOAT_OPTS ?= \
+ -DSOFTFLOAT_ROUND_ODD -DINLINE_LEVEL=5 -DSOFTFLOAT_FAST_DIV32TO16 \
+ -DSOFTFLOAT_FAST_DIV64TO32
+
+DELETE = rm -f
+C_INCLUDES = -I. -I$(SOURCE_DIR)/$(SPECIALIZE_TYPE) -I$(SOURCE_DIR)/include
+COMPILE_C = \
+ gcc -c -Werror-implicit-function-declaration $(SOFTFLOAT_OPTS) \
+ $(C_INCLUDES) -O2 -o $@
+MAKELIB = ar crs $@
+
+OBJ = .o
+LIB = .a
+
+OTHER_HEADERS =
+
+.PHONY: all
+all: softfloat$(LIB)
+
+OBJS_PRIMITIVES = \
+ s_compare96M$(OBJ) \
+ s_compare128M$(OBJ) \
+ s_shortShiftLeft64To96M$(OBJ) \
+ s_shortShiftLeftM$(OBJ) \
+ s_shiftLeftM$(OBJ) \
+ s_shortShiftRightM$(OBJ) \
+ s_shortShiftRightJam64$(OBJ) \
+ s_shortShiftRightJamM$(OBJ) \
+ s_shiftRightJam32$(OBJ) \
+ s_shiftRightJam64$(OBJ) \
+ s_shiftRightJamM$(OBJ) \
+ s_shiftRightM$(OBJ) \
+ s_countLeadingZeros8$(OBJ) \
+ s_countLeadingZeros16$(OBJ) \
+ s_countLeadingZeros32$(OBJ) \
+ s_countLeadingZeros64$(OBJ) \
+ s_addM$(OBJ) \
+ s_addCarryM$(OBJ) \
+ s_addComplCarryM$(OBJ) \
+ s_negXM$(OBJ) \
+ s_sub1XM$(OBJ) \
+ s_subM$(OBJ) \
+ s_mul64To128M$(OBJ) \
+ s_mul128MTo256M$(OBJ) \
+ s_approxRecip_1Ks$(OBJ) \
+ s_approxRecip32_1$(OBJ) \
+ s_approxRecipSqrt_1Ks$(OBJ) \
+ s_approxRecipSqrt32_1$(OBJ) \
+ s_remStepMBy32$(OBJ) \
+
+OBJS_SPECIALIZE = \
+ softfloat_raiseFlags$(OBJ) \
+ s_f16UIToCommonNaN$(OBJ) \
+ s_commonNaNToF16UI$(OBJ) \
+ s_propagateNaNF16UI$(OBJ) \
+ s_f32UIToCommonNaN$(OBJ) \
+ s_commonNaNToF32UI$(OBJ) \
+ s_propagateNaNF32UI$(OBJ) \
+ s_f64UIToCommonNaN$(OBJ) \
+ s_commonNaNToF64UI$(OBJ) \
+ s_propagateNaNF64UI$(OBJ) \
+ extF80M_isSignalingNaN$(OBJ) \
+ s_extF80MToCommonNaN$(OBJ) \
+ s_commonNaNToExtF80M$(OBJ) \
+ s_propagateNaNExtF80M$(OBJ) \
+ f128M_isSignalingNaN$(OBJ) \
+ s_f128MToCommonNaN$(OBJ) \
+ s_commonNaNToF128M$(OBJ) \
+ s_propagateNaNF128M$(OBJ) \
+
+OBJS_OTHERS = \
+ s_roundToUI32$(OBJ) \
+ s_roundMToUI64$(OBJ) \
+ s_roundToI32$(OBJ) \
+ s_roundMToI64$(OBJ) \
+ s_normSubnormalF16Sig$(OBJ) \
+ s_roundPackToF16$(OBJ) \
+ s_normRoundPackToF16$(OBJ) \
+ s_addMagsF16$(OBJ) \
+ s_subMagsF16$(OBJ) \
+ s_mulAddF16$(OBJ) \
+ s_normSubnormalF32Sig$(OBJ) \
+ s_roundPackToF32$(OBJ) \
+ s_normRoundPackToF32$(OBJ) \
+ s_addMagsF32$(OBJ) \
+ s_subMagsF32$(OBJ) \
+ s_mulAddF32$(OBJ) \
+ s_normSubnormalF64Sig$(OBJ) \
+ s_roundPackToF64$(OBJ) \
+ s_normRoundPackToF64$(OBJ) \
+ s_addMagsF64$(OBJ) \
+ s_subMagsF64$(OBJ) \
+ s_mulAddF64$(OBJ) \
+ s_tryPropagateNaNExtF80M$(OBJ) \
+ s_invalidExtF80M$(OBJ) \
+ s_normExtF80SigM$(OBJ) \
+ s_roundPackMToExtF80M$(OBJ) \
+ s_normRoundPackMToExtF80M$(OBJ) \
+ s_addExtF80M$(OBJ) \
+ s_compareNonnormExtF80M$(OBJ) \
+ s_isNaNF128M$(OBJ) \
+ s_tryPropagateNaNF128M$(OBJ) \
+ s_invalidF128M$(OBJ) \
+ s_shiftNormSigF128M$(OBJ) \
+ s_roundPackMToF128M$(OBJ) \
+ s_normRoundPackMToF128M$(OBJ) \
+ s_addF128M$(OBJ) \
+ s_mulAddF128M$(OBJ) \
+ softfloat_state$(OBJ) \
+ ui32_to_f16$(OBJ) \
+ ui32_to_f32$(OBJ) \
+ ui32_to_f64$(OBJ) \
+ ui32_to_extF80M$(OBJ) \
+ ui32_to_f128M$(OBJ) \
+ ui64_to_f16$(OBJ) \
+ ui64_to_f32$(OBJ) \
+ ui64_to_f64$(OBJ) \
+ ui64_to_extF80M$(OBJ) \
+ ui64_to_f128M$(OBJ) \
+ i32_to_f16$(OBJ) \
+ i32_to_f32$(OBJ) \
+ i32_to_f64$(OBJ) \
+ i32_to_extF80M$(OBJ) \
+ i32_to_f128M$(OBJ) \
+ i64_to_f16$(OBJ) \
+ i64_to_f32$(OBJ) \
+ i64_to_f64$(OBJ) \
+ i64_to_extF80M$(OBJ) \
+ i64_to_f128M$(OBJ) \
+ f16_to_ui32$(OBJ) \
+ f16_to_ui64$(OBJ) \
+ f16_to_i32$(OBJ) \
+ f16_to_i64$(OBJ) \
+ f16_to_ui32_r_minMag$(OBJ) \
+ f16_to_ui64_r_minMag$(OBJ) \
+ f16_to_i32_r_minMag$(OBJ) \
+ f16_to_i64_r_minMag$(OBJ) \
+ f16_to_f32$(OBJ) \
+ f16_to_f64$(OBJ) \
+ f16_to_extF80M$(OBJ) \
+ f16_to_f128M$(OBJ) \
+ f16_roundToInt$(OBJ) \
+ f16_add$(OBJ) \
+ f16_sub$(OBJ) \
+ f16_mul$(OBJ) \
+ f16_mulAdd$(OBJ) \
+ f16_div$(OBJ) \
+ f16_rem$(OBJ) \
+ f16_sqrt$(OBJ) \
+ f16_eq$(OBJ) \
+ f16_le$(OBJ) \
+ f16_lt$(OBJ) \
+ f16_eq_signaling$(OBJ) \
+ f16_le_quiet$(OBJ) \
+ f16_lt_quiet$(OBJ) \
+ f16_isSignalingNaN$(OBJ) \
+ f32_to_ui32$(OBJ) \
+ f32_to_ui64$(OBJ) \
+ f32_to_i32$(OBJ) \
+ f32_to_i64$(OBJ) \
+ f32_to_ui32_r_minMag$(OBJ) \
+ f32_to_ui64_r_minMag$(OBJ) \
+ f32_to_i32_r_minMag$(OBJ) \
+ f32_to_i64_r_minMag$(OBJ) \
+ f32_to_f16$(OBJ) \
+ f32_to_f64$(OBJ) \
+ f32_to_extF80M$(OBJ) \
+ f32_to_f128M$(OBJ) \
+ f32_roundToInt$(OBJ) \
+ f32_add$(OBJ) \
+ f32_sub$(OBJ) \
+ f32_mul$(OBJ) \
+ f32_mulAdd$(OBJ) \
+ f32_div$(OBJ) \
+ f32_rem$(OBJ) \
+ f32_sqrt$(OBJ) \
+ f32_eq$(OBJ) \
+ f32_le$(OBJ) \
+ f32_lt$(OBJ) \
+ f32_eq_signaling$(OBJ) \
+ f32_le_quiet$(OBJ) \
+ f32_lt_quiet$(OBJ) \
+ f32_isSignalingNaN$(OBJ) \
+ f64_to_ui32$(OBJ) \
+ f64_to_ui64$(OBJ) \
+ f64_to_i32$(OBJ) \
+ f64_to_i64$(OBJ) \
+ f64_to_ui32_r_minMag$(OBJ) \
+ f64_to_ui64_r_minMag$(OBJ) \
+ f64_to_i32_r_minMag$(OBJ) \
+ f64_to_i64_r_minMag$(OBJ) \
+ f64_to_f16$(OBJ) \
+ f64_to_f32$(OBJ) \
+ f64_to_extF80M$(OBJ) \
+ f64_to_f128M$(OBJ) \
+ f64_roundToInt$(OBJ) \
+ f64_add$(OBJ) \
+ f64_sub$(OBJ) \
+ f64_mul$(OBJ) \
+ f64_mulAdd$(OBJ) \
+ f64_div$(OBJ) \
+ f64_rem$(OBJ) \
+ f64_sqrt$(OBJ) \
+ f64_eq$(OBJ) \
+ f64_le$(OBJ) \
+ f64_lt$(OBJ) \
+ f64_eq_signaling$(OBJ) \
+ f64_le_quiet$(OBJ) \
+ f64_lt_quiet$(OBJ) \
+ f64_isSignalingNaN$(OBJ) \
+ extF80M_to_ui32$(OBJ) \
+ extF80M_to_ui64$(OBJ) \
+ extF80M_to_i32$(OBJ) \
+ extF80M_to_i64$(OBJ) \
+ extF80M_to_ui32_r_minMag$(OBJ) \
+ extF80M_to_ui64_r_minMag$(OBJ) \
+ extF80M_to_i32_r_minMag$(OBJ) \
+ extF80M_to_i64_r_minMag$(OBJ) \
+ extF80M_to_f16$(OBJ) \
+ extF80M_to_f32$(OBJ) \
+ extF80M_to_f64$(OBJ) \
+ extF80M_to_f128M$(OBJ) \
+ extF80M_roundToInt$(OBJ) \
+ extF80M_add$(OBJ) \
+ extF80M_sub$(OBJ) \
+ extF80M_mul$(OBJ) \
+ extF80M_div$(OBJ) \
+ extF80M_rem$(OBJ) \
+ extF80M_sqrt$(OBJ) \
+ extF80M_eq$(OBJ) \
+ extF80M_le$(OBJ) \
+ extF80M_lt$(OBJ) \
+ extF80M_eq_signaling$(OBJ) \
+ extF80M_le_quiet$(OBJ) \
+ extF80M_lt_quiet$(OBJ) \
+ f128M_to_ui32$(OBJ) \
+ f128M_to_ui64$(OBJ) \
+ f128M_to_i32$(OBJ) \
+ f128M_to_i64$(OBJ) \
+ f128M_to_ui32_r_minMag$(OBJ) \
+ f128M_to_ui64_r_minMag$(OBJ) \
+ f128M_to_i32_r_minMag$(OBJ) \
+ f128M_to_i64_r_minMag$(OBJ) \
+ f128M_to_f16$(OBJ) \
+ f128M_to_f32$(OBJ) \
+ f128M_to_f64$(OBJ) \
+ f128M_to_extF80M$(OBJ) \
+ f128M_roundToInt$(OBJ) \
+ f128M_add$(OBJ) \
+ f128M_sub$(OBJ) \
+ f128M_mul$(OBJ) \
+ f128M_mulAdd$(OBJ) \
+ f128M_div$(OBJ) \
+ f128M_rem$(OBJ) \
+ f128M_sqrt$(OBJ) \
+ f128M_eq$(OBJ) \
+ f128M_le$(OBJ) \
+ f128M_lt$(OBJ) \
+ f128M_eq_signaling$(OBJ) \
+ f128M_le_quiet$(OBJ) \
+ f128M_lt_quiet$(OBJ) \
+
+OBJS_ALL = $(OBJS_PRIMITIVES) $(OBJS_SPECIALIZE) $(OBJS_OTHERS)
+
+$(OBJS_ALL): \
+ $(OTHER_HEADERS) platform.h $(SOURCE_DIR)/include/primitiveTypes.h \
+ $(SOURCE_DIR)/include/primitives.h
+$(OBJS_SPECIALIZE) $(OBJS_OTHERS): \
+ $(SOURCE_DIR)/include/softfloat_types.h $(SOURCE_DIR)/include/internals.h \
+ $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/specialize.h \
+ $(SOURCE_DIR)/include/softfloat.h
+
+$(OBJS_PRIMITIVES) $(OBJS_OTHERS): %$(OBJ): $(SOURCE_DIR)/%.c
+ $(COMPILE_C) $(SOURCE_DIR)/$*.c
+
+$(OBJS_SPECIALIZE): %$(OBJ): $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/%.c
+ $(COMPILE_C) $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/$*.c
+
+softfloat$(LIB): $(OBJS_ALL)
+ $(DELETE) $@
+ $(MAKELIB) $^
+
+.PHONY: clean
+clean:
+ $(DELETE) $(OBJS_ALL) softfloat$(LIB)
+
diff --git a/softfloat/build/Linux-386-GCC/platform.h b/softfloat/build/Linux-386-GCC/platform.h
new file mode 100644
index 0000000..d514dbc
--- /dev/null
+++ b/softfloat/build/Linux-386-GCC/platform.h
@@ -0,0 +1,53 @@
+
+/*============================================================================
+
+This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the
+University of California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+#define LITTLEENDIAN 1
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+#ifdef __GNUC_STDC_INLINE__
+#define INLINE inline
+#else
+#define INLINE extern inline
+#endif
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+#define SOFTFLOAT_BUILTIN_CLZ 1
+#include "opts-GCC.h"
+
diff --git a/softfloat/build/Linux-386-SSE2-GCC/Makefile b/softfloat/build/Linux-386-SSE2-GCC/Makefile
new file mode 100644
index 0000000..ced977b
--- /dev/null
+++ b/softfloat/build/Linux-386-SSE2-GCC/Makefile
@@ -0,0 +1,325 @@
+
+#=============================================================================
+#
+# This Makefile is part of the SoftFloat IEEE Floating-Point Arithmetic
+# Package, Release 3e, by John R. Hauser.
+#
+# Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the
+# University of California. All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+# 1. Redistributions of source code must retain the above copyright notice,
+# this list of conditions, and the following disclaimer.
+#
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions, and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+#
+# 3. Neither the name of the University nor the names of its contributors
+# may be used to endorse or promote products derived from this software
+# without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+# EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+# DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#=============================================================================
+
+SOURCE_DIR ?= ../../source
+SPECIALIZE_TYPE ?= 8086-SSE
+
+SOFTFLOAT_OPTS ?= \
+ -DSOFTFLOAT_ROUND_ODD -DINLINE_LEVEL=5 -DSOFTFLOAT_FAST_DIV32TO16 \
+ -DSOFTFLOAT_FAST_DIV64TO32
+
+DELETE = rm -f
+C_INCLUDES = -I. -I$(SOURCE_DIR)/$(SPECIALIZE_TYPE) -I$(SOURCE_DIR)/include
+COMPILE_C = \
+ gcc -c -Werror-implicit-function-declaration $(SOFTFLOAT_OPTS) \
+ $(C_INCLUDES) -O2 -o $@
+MAKELIB = ar crs $@
+
+OBJ = .o
+LIB = .a
+
+OTHER_HEADERS =
+
+.PHONY: all
+all: softfloat$(LIB)
+
+OBJS_PRIMITIVES = \
+ s_compare96M$(OBJ) \
+ s_compare128M$(OBJ) \
+ s_shortShiftLeft64To96M$(OBJ) \
+ s_shortShiftLeftM$(OBJ) \
+ s_shiftLeftM$(OBJ) \
+ s_shortShiftRightM$(OBJ) \
+ s_shortShiftRightJam64$(OBJ) \
+ s_shortShiftRightJamM$(OBJ) \
+ s_shiftRightJam32$(OBJ) \
+ s_shiftRightJam64$(OBJ) \
+ s_shiftRightJamM$(OBJ) \
+ s_shiftRightM$(OBJ) \
+ s_countLeadingZeros8$(OBJ) \
+ s_countLeadingZeros16$(OBJ) \
+ s_countLeadingZeros32$(OBJ) \
+ s_countLeadingZeros64$(OBJ) \
+ s_addM$(OBJ) \
+ s_addCarryM$(OBJ) \
+ s_addComplCarryM$(OBJ) \
+ s_negXM$(OBJ) \
+ s_sub1XM$(OBJ) \
+ s_subM$(OBJ) \
+ s_mul64To128M$(OBJ) \
+ s_mul128MTo256M$(OBJ) \
+ s_approxRecip_1Ks$(OBJ) \
+ s_approxRecip32_1$(OBJ) \
+ s_approxRecipSqrt_1Ks$(OBJ) \
+ s_approxRecipSqrt32_1$(OBJ) \
+ s_remStepMBy32$(OBJ) \
+
+OBJS_SPECIALIZE = \
+ softfloat_raiseFlags$(OBJ) \
+ s_f16UIToCommonNaN$(OBJ) \
+ s_commonNaNToF16UI$(OBJ) \
+ s_propagateNaNF16UI$(OBJ) \
+ s_f32UIToCommonNaN$(OBJ) \
+ s_commonNaNToF32UI$(OBJ) \
+ s_propagateNaNF32UI$(OBJ) \
+ s_f64UIToCommonNaN$(OBJ) \
+ s_commonNaNToF64UI$(OBJ) \
+ s_propagateNaNF64UI$(OBJ) \
+ extF80M_isSignalingNaN$(OBJ) \
+ s_extF80MToCommonNaN$(OBJ) \
+ s_commonNaNToExtF80M$(OBJ) \
+ s_propagateNaNExtF80M$(OBJ) \
+ f128M_isSignalingNaN$(OBJ) \
+ s_f128MToCommonNaN$(OBJ) \
+ s_commonNaNToF128M$(OBJ) \
+ s_propagateNaNF128M$(OBJ) \
+
+OBJS_OTHERS = \
+ s_roundToUI32$(OBJ) \
+ s_roundMToUI64$(OBJ) \
+ s_roundToI32$(OBJ) \
+ s_roundMToI64$(OBJ) \
+ s_normSubnormalF16Sig$(OBJ) \
+ s_roundPackToF16$(OBJ) \
+ s_normRoundPackToF16$(OBJ) \
+ s_addMagsF16$(OBJ) \
+ s_subMagsF16$(OBJ) \
+ s_mulAddF16$(OBJ) \
+ s_normSubnormalF32Sig$(OBJ) \
+ s_roundPackToF32$(OBJ) \
+ s_normRoundPackToF32$(OBJ) \
+ s_addMagsF32$(OBJ) \
+ s_subMagsF32$(OBJ) \
+ s_mulAddF32$(OBJ) \
+ s_normSubnormalF64Sig$(OBJ) \
+ s_roundPackToF64$(OBJ) \
+ s_normRoundPackToF64$(OBJ) \
+ s_addMagsF64$(OBJ) \
+ s_subMagsF64$(OBJ) \
+ s_mulAddF64$(OBJ) \
+ s_tryPropagateNaNExtF80M$(OBJ) \
+ s_invalidExtF80M$(OBJ) \
+ s_normExtF80SigM$(OBJ) \
+ s_roundPackMToExtF80M$(OBJ) \
+ s_normRoundPackMToExtF80M$(OBJ) \
+ s_addExtF80M$(OBJ) \
+ s_compareNonnormExtF80M$(OBJ) \
+ s_isNaNF128M$(OBJ) \
+ s_tryPropagateNaNF128M$(OBJ) \
+ s_invalidF128M$(OBJ) \
+ s_shiftNormSigF128M$(OBJ) \
+ s_roundPackMToF128M$(OBJ) \
+ s_normRoundPackMToF128M$(OBJ) \
+ s_addF128M$(OBJ) \
+ s_mulAddF128M$(OBJ) \
+ softfloat_state$(OBJ) \
+ ui32_to_f16$(OBJ) \
+ ui32_to_f32$(OBJ) \
+ ui32_to_f64$(OBJ) \
+ ui32_to_extF80M$(OBJ) \
+ ui32_to_f128M$(OBJ) \
+ ui64_to_f16$(OBJ) \
+ ui64_to_f32$(OBJ) \
+ ui64_to_f64$(OBJ) \
+ ui64_to_extF80M$(OBJ) \
+ ui64_to_f128M$(OBJ) \
+ i32_to_f16$(OBJ) \
+ i32_to_f32$(OBJ) \
+ i32_to_f64$(OBJ) \
+ i32_to_extF80M$(OBJ) \
+ i32_to_f128M$(OBJ) \
+ i64_to_f16$(OBJ) \
+ i64_to_f32$(OBJ) \
+ i64_to_f64$(OBJ) \
+ i64_to_extF80M$(OBJ) \
+ i64_to_f128M$(OBJ) \
+ f16_to_ui32$(OBJ) \
+ f16_to_ui64$(OBJ) \
+ f16_to_i32$(OBJ) \
+ f16_to_i64$(OBJ) \
+ f16_to_ui32_r_minMag$(OBJ) \
+ f16_to_ui64_r_minMag$(OBJ) \
+ f16_to_i32_r_minMag$(OBJ) \
+ f16_to_i64_r_minMag$(OBJ) \
+ f16_to_f32$(OBJ) \
+ f16_to_f64$(OBJ) \
+ f16_to_extF80M$(OBJ) \
+ f16_to_f128M$(OBJ) \
+ f16_roundToInt$(OBJ) \
+ f16_add$(OBJ) \
+ f16_sub$(OBJ) \
+ f16_mul$(OBJ) \
+ f16_mulAdd$(OBJ) \
+ f16_div$(OBJ) \
+ f16_rem$(OBJ) \
+ f16_sqrt$(OBJ) \
+ f16_eq$(OBJ) \
+ f16_le$(OBJ) \
+ f16_lt$(OBJ) \
+ f16_eq_signaling$(OBJ) \
+ f16_le_quiet$(OBJ) \
+ f16_lt_quiet$(OBJ) \
+ f16_isSignalingNaN$(OBJ) \
+ f32_to_ui32$(OBJ) \
+ f32_to_ui64$(OBJ) \
+ f32_to_i32$(OBJ) \
+ f32_to_i64$(OBJ) \
+ f32_to_ui32_r_minMag$(OBJ) \
+ f32_to_ui64_r_minMag$(OBJ) \
+ f32_to_i32_r_minMag$(OBJ) \
+ f32_to_i64_r_minMag$(OBJ) \
+ f32_to_f16$(OBJ) \
+ f32_to_f64$(OBJ) \
+ f32_to_extF80M$(OBJ) \
+ f32_to_f128M$(OBJ) \
+ f32_roundToInt$(OBJ) \
+ f32_add$(OBJ) \
+ f32_sub$(OBJ) \
+ f32_mul$(OBJ) \
+ f32_mulAdd$(OBJ) \
+ f32_div$(OBJ) \
+ f32_rem$(OBJ) \
+ f32_sqrt$(OBJ) \
+ f32_eq$(OBJ) \
+ f32_le$(OBJ) \
+ f32_lt$(OBJ) \
+ f32_eq_signaling$(OBJ) \
+ f32_le_quiet$(OBJ) \
+ f32_lt_quiet$(OBJ) \
+ f32_isSignalingNaN$(OBJ) \
+ f64_to_ui32$(OBJ) \
+ f64_to_ui64$(OBJ) \
+ f64_to_i32$(OBJ) \
+ f64_to_i64$(OBJ) \
+ f64_to_ui32_r_minMag$(OBJ) \
+ f64_to_ui64_r_minMag$(OBJ) \
+ f64_to_i32_r_minMag$(OBJ) \
+ f64_to_i64_r_minMag$(OBJ) \
+ f64_to_f16$(OBJ) \
+ f64_to_f32$(OBJ) \
+ f64_to_extF80M$(OBJ) \
+ f64_to_f128M$(OBJ) \
+ f64_roundToInt$(OBJ) \
+ f64_add$(OBJ) \
+ f64_sub$(OBJ) \
+ f64_mul$(OBJ) \
+ f64_mulAdd$(OBJ) \
+ f64_div$(OBJ) \
+ f64_rem$(OBJ) \
+ f64_sqrt$(OBJ) \
+ f64_eq$(OBJ) \
+ f64_le$(OBJ) \
+ f64_lt$(OBJ) \
+ f64_eq_signaling$(OBJ) \
+ f64_le_quiet$(OBJ) \
+ f64_lt_quiet$(OBJ) \
+ f64_isSignalingNaN$(OBJ) \
+ extF80M_to_ui32$(OBJ) \
+ extF80M_to_ui64$(OBJ) \
+ extF80M_to_i32$(OBJ) \
+ extF80M_to_i64$(OBJ) \
+ extF80M_to_ui32_r_minMag$(OBJ) \
+ extF80M_to_ui64_r_minMag$(OBJ) \
+ extF80M_to_i32_r_minMag$(OBJ) \
+ extF80M_to_i64_r_minMag$(OBJ) \
+ extF80M_to_f16$(OBJ) \
+ extF80M_to_f32$(OBJ) \
+ extF80M_to_f64$(OBJ) \
+ extF80M_to_f128M$(OBJ) \
+ extF80M_roundToInt$(OBJ) \
+ extF80M_add$(OBJ) \
+ extF80M_sub$(OBJ) \
+ extF80M_mul$(OBJ) \
+ extF80M_div$(OBJ) \
+ extF80M_rem$(OBJ) \
+ extF80M_sqrt$(OBJ) \
+ extF80M_eq$(OBJ) \
+ extF80M_le$(OBJ) \
+ extF80M_lt$(OBJ) \
+ extF80M_eq_signaling$(OBJ) \
+ extF80M_le_quiet$(OBJ) \
+ extF80M_lt_quiet$(OBJ) \
+ f128M_to_ui32$(OBJ) \
+ f128M_to_ui64$(OBJ) \
+ f128M_to_i32$(OBJ) \
+ f128M_to_i64$(OBJ) \
+ f128M_to_ui32_r_minMag$(OBJ) \
+ f128M_to_ui64_r_minMag$(OBJ) \
+ f128M_to_i32_r_minMag$(OBJ) \
+ f128M_to_i64_r_minMag$(OBJ) \
+ f128M_to_f16$(OBJ) \
+ f128M_to_f32$(OBJ) \
+ f128M_to_f64$(OBJ) \
+ f128M_to_extF80M$(OBJ) \
+ f128M_roundToInt$(OBJ) \
+ f128M_add$(OBJ) \
+ f128M_sub$(OBJ) \
+ f128M_mul$(OBJ) \
+ f128M_mulAdd$(OBJ) \
+ f128M_div$(OBJ) \
+ f128M_rem$(OBJ) \
+ f128M_sqrt$(OBJ) \
+ f128M_eq$(OBJ) \
+ f128M_le$(OBJ) \
+ f128M_lt$(OBJ) \
+ f128M_eq_signaling$(OBJ) \
+ f128M_le_quiet$(OBJ) \
+ f128M_lt_quiet$(OBJ) \
+
+OBJS_ALL = $(OBJS_PRIMITIVES) $(OBJS_SPECIALIZE) $(OBJS_OTHERS)
+
+$(OBJS_ALL): \
+ $(OTHER_HEADERS) platform.h $(SOURCE_DIR)/include/primitiveTypes.h \
+ $(SOURCE_DIR)/include/primitives.h
+$(OBJS_SPECIALIZE) $(OBJS_OTHERS): \
+ $(SOURCE_DIR)/include/softfloat_types.h $(SOURCE_DIR)/include/internals.h \
+ $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/specialize.h \
+ $(SOURCE_DIR)/include/softfloat.h
+
+$(OBJS_PRIMITIVES) $(OBJS_OTHERS): %$(OBJ): $(SOURCE_DIR)/%.c
+ $(COMPILE_C) $(SOURCE_DIR)/$*.c
+
+$(OBJS_SPECIALIZE): %$(OBJ): $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/%.c
+ $(COMPILE_C) $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/$*.c
+
+softfloat$(LIB): $(OBJS_ALL)
+ $(DELETE) $@
+ $(MAKELIB) $^
+
+.PHONY: clean
+clean:
+ $(DELETE) $(OBJS_ALL) softfloat$(LIB)
+
diff --git a/softfloat/build/Linux-386-SSE2-GCC/platform.h b/softfloat/build/Linux-386-SSE2-GCC/platform.h
new file mode 100644
index 0000000..d514dbc
--- /dev/null
+++ b/softfloat/build/Linux-386-SSE2-GCC/platform.h
@@ -0,0 +1,53 @@
+
+/*============================================================================
+
+This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the
+University of California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+#define LITTLEENDIAN 1
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+#ifdef __GNUC_STDC_INLINE__
+#define INLINE inline
+#else
+#define INLINE extern inline
+#endif
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+#define SOFTFLOAT_BUILTIN_CLZ 1
+#include "opts-GCC.h"
+
diff --git a/softfloat/build/Linux-ARM-VFPv2-GCC/Makefile b/softfloat/build/Linux-ARM-VFPv2-GCC/Makefile
new file mode 100644
index 0000000..a1e7c83
--- /dev/null
+++ b/softfloat/build/Linux-ARM-VFPv2-GCC/Makefile
@@ -0,0 +1,323 @@
+
+#=============================================================================
+#
+# This Makefile is part of the SoftFloat IEEE Floating-Point Arithmetic
+# Package, Release 3e, by John R. Hauser.
+#
+# Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the
+# University of California. All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+# 1. Redistributions of source code must retain the above copyright notice,
+# this list of conditions, and the following disclaimer.
+#
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions, and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+#
+# 3. Neither the name of the University nor the names of its contributors
+# may be used to endorse or promote products derived from this software
+# without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+# EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+# DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#=============================================================================
+
+SOURCE_DIR ?= ../../source
+SPECIALIZE_TYPE ?= ARM-VFPv2
+
+SOFTFLOAT_OPTS ?= -DSOFTFLOAT_ROUND_ODD -DINLINE_LEVEL=5
+
+DELETE = rm -f
+C_INCLUDES = -I. -I$(SOURCE_DIR)/$(SPECIALIZE_TYPE) -I$(SOURCE_DIR)/include
+COMPILE_C = \
+ gcc -c -Werror-implicit-function-declaration $(SOFTFLOAT_OPTS) \
+ $(C_INCLUDES) -O2 -o $@
+MAKELIB = ar crs $@
+
+OBJ = .o
+LIB = .a
+
+OTHER_HEADERS =
+
+.PHONY: all
+all: softfloat$(LIB)
+
+OBJS_PRIMITIVES = \
+ s_compare96M$(OBJ) \
+ s_compare128M$(OBJ) \
+ s_shortShiftLeft64To96M$(OBJ) \
+ s_shortShiftLeftM$(OBJ) \
+ s_shiftLeftM$(OBJ) \
+ s_shortShiftRightM$(OBJ) \
+ s_shortShiftRightJam64$(OBJ) \
+ s_shortShiftRightJamM$(OBJ) \
+ s_shiftRightJam32$(OBJ) \
+ s_shiftRightJam64$(OBJ) \
+ s_shiftRightJamM$(OBJ) \
+ s_shiftRightM$(OBJ) \
+ s_countLeadingZeros8$(OBJ) \
+ s_countLeadingZeros16$(OBJ) \
+ s_countLeadingZeros32$(OBJ) \
+ s_countLeadingZeros64$(OBJ) \
+ s_addM$(OBJ) \
+ s_addCarryM$(OBJ) \
+ s_addComplCarryM$(OBJ) \
+ s_negXM$(OBJ) \
+ s_sub1XM$(OBJ) \
+ s_subM$(OBJ) \
+ s_mul64To128M$(OBJ) \
+ s_mul128MTo256M$(OBJ) \
+ s_approxRecip_1Ks$(OBJ) \
+ s_approxRecip32_1$(OBJ) \
+ s_approxRecipSqrt_1Ks$(OBJ) \
+ s_approxRecipSqrt32_1$(OBJ) \
+ s_remStepMBy32$(OBJ) \
+
+OBJS_SPECIALIZE = \
+ softfloat_raiseFlags$(OBJ) \
+ s_f16UIToCommonNaN$(OBJ) \
+ s_commonNaNToF16UI$(OBJ) \
+ s_propagateNaNF16UI$(OBJ) \
+ s_f32UIToCommonNaN$(OBJ) \
+ s_commonNaNToF32UI$(OBJ) \
+ s_propagateNaNF32UI$(OBJ) \
+ s_f64UIToCommonNaN$(OBJ) \
+ s_commonNaNToF64UI$(OBJ) \
+ s_propagateNaNF64UI$(OBJ) \
+ extF80M_isSignalingNaN$(OBJ) \
+ s_extF80MToCommonNaN$(OBJ) \
+ s_commonNaNToExtF80M$(OBJ) \
+ s_propagateNaNExtF80M$(OBJ) \
+ f128M_isSignalingNaN$(OBJ) \
+ s_f128MToCommonNaN$(OBJ) \
+ s_commonNaNToF128M$(OBJ) \
+ s_propagateNaNF128M$(OBJ) \
+
+OBJS_OTHERS = \
+ s_roundToUI32$(OBJ) \
+ s_roundMToUI64$(OBJ) \
+ s_roundToI32$(OBJ) \
+ s_roundMToI64$(OBJ) \
+ s_normSubnormalF16Sig$(OBJ) \
+ s_roundPackToF16$(OBJ) \
+ s_normRoundPackToF16$(OBJ) \
+ s_addMagsF16$(OBJ) \
+ s_subMagsF16$(OBJ) \
+ s_mulAddF16$(OBJ) \
+ s_normSubnormalF32Sig$(OBJ) \
+ s_roundPackToF32$(OBJ) \
+ s_normRoundPackToF32$(OBJ) \
+ s_addMagsF32$(OBJ) \
+ s_subMagsF32$(OBJ) \
+ s_mulAddF32$(OBJ) \
+ s_normSubnormalF64Sig$(OBJ) \
+ s_roundPackToF64$(OBJ) \
+ s_normRoundPackToF64$(OBJ) \
+ s_addMagsF64$(OBJ) \
+ s_subMagsF64$(OBJ) \
+ s_mulAddF64$(OBJ) \
+ s_tryPropagateNaNExtF80M$(OBJ) \
+ s_invalidExtF80M$(OBJ) \
+ s_normExtF80SigM$(OBJ) \
+ s_roundPackMToExtF80M$(OBJ) \
+ s_normRoundPackMToExtF80M$(OBJ) \
+ s_addExtF80M$(OBJ) \
+ s_compareNonnormExtF80M$(OBJ) \
+ s_isNaNF128M$(OBJ) \
+ s_tryPropagateNaNF128M$(OBJ) \
+ s_invalidF128M$(OBJ) \
+ s_shiftNormSigF128M$(OBJ) \
+ s_roundPackMToF128M$(OBJ) \
+ s_normRoundPackMToF128M$(OBJ) \
+ s_addF128M$(OBJ) \
+ s_mulAddF128M$(OBJ) \
+ softfloat_state$(OBJ) \
+ ui32_to_f16$(OBJ) \
+ ui32_to_f32$(OBJ) \
+ ui32_to_f64$(OBJ) \
+ ui32_to_extF80M$(OBJ) \
+ ui32_to_f128M$(OBJ) \
+ ui64_to_f16$(OBJ) \
+ ui64_to_f32$(OBJ) \
+ ui64_to_f64$(OBJ) \
+ ui64_to_extF80M$(OBJ) \
+ ui64_to_f128M$(OBJ) \
+ i32_to_f16$(OBJ) \
+ i32_to_f32$(OBJ) \
+ i32_to_f64$(OBJ) \
+ i32_to_extF80M$(OBJ) \
+ i32_to_f128M$(OBJ) \
+ i64_to_f16$(OBJ) \
+ i64_to_f32$(OBJ) \
+ i64_to_f64$(OBJ) \
+ i64_to_extF80M$(OBJ) \
+ i64_to_f128M$(OBJ) \
+ f16_to_ui32$(OBJ) \
+ f16_to_ui64$(OBJ) \
+ f16_to_i32$(OBJ) \
+ f16_to_i64$(OBJ) \
+ f16_to_ui32_r_minMag$(OBJ) \
+ f16_to_ui64_r_minMag$(OBJ) \
+ f16_to_i32_r_minMag$(OBJ) \
+ f16_to_i64_r_minMag$(OBJ) \
+ f16_to_f32$(OBJ) \
+ f16_to_f64$(OBJ) \
+ f16_to_extF80M$(OBJ) \
+ f16_to_f128M$(OBJ) \
+ f16_roundToInt$(OBJ) \
+ f16_add$(OBJ) \
+ f16_sub$(OBJ) \
+ f16_mul$(OBJ) \
+ f16_mulAdd$(OBJ) \
+ f16_div$(OBJ) \
+ f16_rem$(OBJ) \
+ f16_sqrt$(OBJ) \
+ f16_eq$(OBJ) \
+ f16_le$(OBJ) \
+ f16_lt$(OBJ) \
+ f16_eq_signaling$(OBJ) \
+ f16_le_quiet$(OBJ) \
+ f16_lt_quiet$(OBJ) \
+ f16_isSignalingNaN$(OBJ) \
+ f32_to_ui32$(OBJ) \
+ f32_to_ui64$(OBJ) \
+ f32_to_i32$(OBJ) \
+ f32_to_i64$(OBJ) \
+ f32_to_ui32_r_minMag$(OBJ) \
+ f32_to_ui64_r_minMag$(OBJ) \
+ f32_to_i32_r_minMag$(OBJ) \
+ f32_to_i64_r_minMag$(OBJ) \
+ f32_to_f16$(OBJ) \
+ f32_to_f64$(OBJ) \
+ f32_to_extF80M$(OBJ) \
+ f32_to_f128M$(OBJ) \
+ f32_roundToInt$(OBJ) \
+ f32_add$(OBJ) \
+ f32_sub$(OBJ) \
+ f32_mul$(OBJ) \
+ f32_mulAdd$(OBJ) \
+ f32_div$(OBJ) \
+ f32_rem$(OBJ) \
+ f32_sqrt$(OBJ) \
+ f32_eq$(OBJ) \
+ f32_le$(OBJ) \
+ f32_lt$(OBJ) \
+ f32_eq_signaling$(OBJ) \
+ f32_le_quiet$(OBJ) \
+ f32_lt_quiet$(OBJ) \
+ f32_isSignalingNaN$(OBJ) \
+ f64_to_ui32$(OBJ) \
+ f64_to_ui64$(OBJ) \
+ f64_to_i32$(OBJ) \
+ f64_to_i64$(OBJ) \
+ f64_to_ui32_r_minMag$(OBJ) \
+ f64_to_ui64_r_minMag$(OBJ) \
+ f64_to_i32_r_minMag$(OBJ) \
+ f64_to_i64_r_minMag$(OBJ) \
+ f64_to_f16$(OBJ) \
+ f64_to_f32$(OBJ) \
+ f64_to_extF80M$(OBJ) \
+ f64_to_f128M$(OBJ) \
+ f64_roundToInt$(OBJ) \
+ f64_add$(OBJ) \
+ f64_sub$(OBJ) \
+ f64_mul$(OBJ) \
+ f64_mulAdd$(OBJ) \
+ f64_div$(OBJ) \
+ f64_rem$(OBJ) \
+ f64_sqrt$(OBJ) \
+ f64_eq$(OBJ) \
+ f64_le$(OBJ) \
+ f64_lt$(OBJ) \
+ f64_eq_signaling$(OBJ) \
+ f64_le_quiet$(OBJ) \
+ f64_lt_quiet$(OBJ) \
+ f64_isSignalingNaN$(OBJ) \
+ extF80M_to_ui32$(OBJ) \
+ extF80M_to_ui64$(OBJ) \
+ extF80M_to_i32$(OBJ) \
+ extF80M_to_i64$(OBJ) \
+ extF80M_to_ui32_r_minMag$(OBJ) \
+ extF80M_to_ui64_r_minMag$(OBJ) \
+ extF80M_to_i32_r_minMag$(OBJ) \
+ extF80M_to_i64_r_minMag$(OBJ) \
+ extF80M_to_f16$(OBJ) \
+ extF80M_to_f32$(OBJ) \
+ extF80M_to_f64$(OBJ) \
+ extF80M_to_f128M$(OBJ) \
+ extF80M_roundToInt$(OBJ) \
+ extF80M_add$(OBJ) \
+ extF80M_sub$(OBJ) \
+ extF80M_mul$(OBJ) \
+ extF80M_div$(OBJ) \
+ extF80M_rem$(OBJ) \
+ extF80M_sqrt$(OBJ) \
+ extF80M_eq$(OBJ) \
+ extF80M_le$(OBJ) \
+ extF80M_lt$(OBJ) \
+ extF80M_eq_signaling$(OBJ) \
+ extF80M_le_quiet$(OBJ) \
+ extF80M_lt_quiet$(OBJ) \
+ f128M_to_ui32$(OBJ) \
+ f128M_to_ui64$(OBJ) \
+ f128M_to_i32$(OBJ) \
+ f128M_to_i64$(OBJ) \
+ f128M_to_ui32_r_minMag$(OBJ) \
+ f128M_to_ui64_r_minMag$(OBJ) \
+ f128M_to_i32_r_minMag$(OBJ) \
+ f128M_to_i64_r_minMag$(OBJ) \
+ f128M_to_f16$(OBJ) \
+ f128M_to_f32$(OBJ) \
+ f128M_to_f64$(OBJ) \
+ f128M_to_extF80M$(OBJ) \
+ f128M_roundToInt$(OBJ) \
+ f128M_add$(OBJ) \
+ f128M_sub$(OBJ) \
+ f128M_mul$(OBJ) \
+ f128M_mulAdd$(OBJ) \
+ f128M_div$(OBJ) \
+ f128M_rem$(OBJ) \
+ f128M_sqrt$(OBJ) \
+ f128M_eq$(OBJ) \
+ f128M_le$(OBJ) \
+ f128M_lt$(OBJ) \
+ f128M_eq_signaling$(OBJ) \
+ f128M_le_quiet$(OBJ) \
+ f128M_lt_quiet$(OBJ) \
+
+OBJS_ALL = $(OBJS_PRIMITIVES) $(OBJS_SPECIALIZE) $(OBJS_OTHERS)
+
+$(OBJS_ALL): \
+ $(OTHER_HEADERS) platform.h $(SOURCE_DIR)/include/primitiveTypes.h \
+ $(SOURCE_DIR)/include/primitives.h
+$(OBJS_SPECIALIZE) $(OBJS_OTHERS): \
+ $(SOURCE_DIR)/include/softfloat_types.h $(SOURCE_DIR)/include/internals.h \
+ $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/specialize.h \
+ $(SOURCE_DIR)/include/softfloat.h
+
+$(OBJS_PRIMITIVES) $(OBJS_OTHERS): %$(OBJ): $(SOURCE_DIR)/%.c
+ $(COMPILE_C) $(SOURCE_DIR)/$*.c
+
+$(OBJS_SPECIALIZE): %$(OBJ): $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/%.c
+ $(COMPILE_C) $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/$*.c
+
+softfloat$(LIB): $(OBJS_ALL)
+ $(DELETE) $@
+ $(MAKELIB) $^
+
+.PHONY: clean
+clean:
+ $(DELETE) $(OBJS_ALL) softfloat$(LIB)
+
diff --git a/softfloat/build/Linux-ARM-VFPv2-GCC/platform.h b/softfloat/build/Linux-ARM-VFPv2-GCC/platform.h
new file mode 100644
index 0000000..d514dbc
--- /dev/null
+++ b/softfloat/build/Linux-ARM-VFPv2-GCC/platform.h
@@ -0,0 +1,53 @@
+
+/*============================================================================
+
+This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the
+University of California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+#define LITTLEENDIAN 1
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+#ifdef __GNUC_STDC_INLINE__
+#define INLINE inline
+#else
+#define INLINE extern inline
+#endif
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+#define SOFTFLOAT_BUILTIN_CLZ 1
+#include "opts-GCC.h"
+
diff --git a/softfloat/build/Linux-x86_64-GCC/Makefile b/softfloat/build/Linux-x86_64-GCC/Makefile
new file mode 100644
index 0000000..2ee5dad
--- /dev/null
+++ b/softfloat/build/Linux-x86_64-GCC/Makefile
@@ -0,0 +1,390 @@
+
+#=============================================================================
+#
+# This Makefile is part of the SoftFloat IEEE Floating-Point Arithmetic
+# Package, Release 3e, by John R. Hauser.
+#
+# Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the
+# University of California. All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+# 1. Redistributions of source code must retain the above copyright notice,
+# this list of conditions, and the following disclaimer.
+#
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions, and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+#
+# 3. Neither the name of the University nor the names of its contributors
+# may be used to endorse or promote products derived from this software
+# without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+# EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+# DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#=============================================================================
+
+SOURCE_DIR ?= ../../source
+SPECIALIZE_TYPE ?= 8086-SSE
+
+SOFTFLOAT_OPTS ?= \
+ -DSOFTFLOAT_ROUND_ODD -DINLINE_LEVEL=5 -DSOFTFLOAT_FAST_DIV32TO16 \
+ -DSOFTFLOAT_FAST_DIV64TO32
+
+DELETE = rm -f
+C_INCLUDES = -I. -I$(SOURCE_DIR)/$(SPECIALIZE_TYPE) -I$(SOURCE_DIR)/include
+COMPILE_C = \
+ gcc -c -Werror-implicit-function-declaration -DSOFTFLOAT_FAST_INT64 \
+ $(SOFTFLOAT_OPTS) $(C_INCLUDES) -O2 -o $@
+MAKELIB = ar crs $@
+
+OBJ = .o
+LIB = .a
+
+OTHER_HEADERS = $(SOURCE_DIR)/include/opts-GCC.h
+
+.PHONY: all
+all: softfloat$(LIB)
+
+OBJS_PRIMITIVES = \
+ s_eq128$(OBJ) \
+ s_le128$(OBJ) \
+ s_lt128$(OBJ) \
+ s_shortShiftLeft128$(OBJ) \
+ s_shortShiftRight128$(OBJ) \
+ s_shortShiftRightJam64$(OBJ) \
+ s_shortShiftRightJam64Extra$(OBJ) \
+ s_shortShiftRightJam128$(OBJ) \
+ s_shortShiftRightJam128Extra$(OBJ) \
+ s_shiftRightJam32$(OBJ) \
+ s_shiftRightJam64$(OBJ) \
+ s_shiftRightJam64Extra$(OBJ) \
+ s_shiftRightJam128$(OBJ) \
+ s_shiftRightJam128Extra$(OBJ) \
+ s_shiftRightJam256M$(OBJ) \
+ s_countLeadingZeros8$(OBJ) \
+ s_countLeadingZeros16$(OBJ) \
+ s_countLeadingZeros32$(OBJ) \
+ s_countLeadingZeros64$(OBJ) \
+ s_add128$(OBJ) \
+ s_add256M$(OBJ) \
+ s_sub128$(OBJ) \
+ s_sub256M$(OBJ) \
+ s_mul64ByShifted32To128$(OBJ) \
+ s_mul64To128$(OBJ) \
+ s_mul128By32$(OBJ) \
+ s_mul128To256M$(OBJ) \
+ s_approxRecip_1Ks$(OBJ) \
+ s_approxRecip32_1$(OBJ) \
+ s_approxRecipSqrt_1Ks$(OBJ) \
+ s_approxRecipSqrt32_1$(OBJ) \
+
+OBJS_SPECIALIZE = \
+ softfloat_raiseFlags$(OBJ) \
+ s_f16UIToCommonNaN$(OBJ) \
+ s_commonNaNToF16UI$(OBJ) \
+ s_propagateNaNF16UI$(OBJ) \
+ s_f32UIToCommonNaN$(OBJ) \
+ s_commonNaNToF32UI$(OBJ) \
+ s_propagateNaNF32UI$(OBJ) \
+ s_f64UIToCommonNaN$(OBJ) \
+ s_commonNaNToF64UI$(OBJ) \
+ s_propagateNaNF64UI$(OBJ) \
+ extF80M_isSignalingNaN$(OBJ) \
+ s_extF80UIToCommonNaN$(OBJ) \
+ s_commonNaNToExtF80UI$(OBJ) \
+ s_propagateNaNExtF80UI$(OBJ) \
+ f128M_isSignalingNaN$(OBJ) \
+ s_f128UIToCommonNaN$(OBJ) \
+ s_commonNaNToF128UI$(OBJ) \
+ s_propagateNaNF128UI$(OBJ) \
+
+OBJS_OTHERS = \
+ s_roundToUI32$(OBJ) \
+ s_roundToUI64$(OBJ) \
+ s_roundToI32$(OBJ) \
+ s_roundToI64$(OBJ) \
+ s_normSubnormalF16Sig$(OBJ) \
+ s_roundPackToF16$(OBJ) \
+ s_normRoundPackToF16$(OBJ) \
+ s_addMagsF16$(OBJ) \
+ s_subMagsF16$(OBJ) \
+ s_mulAddF16$(OBJ) \
+ s_normSubnormalF32Sig$(OBJ) \
+ s_roundPackToF32$(OBJ) \
+ s_normRoundPackToF32$(OBJ) \
+ s_addMagsF32$(OBJ) \
+ s_subMagsF32$(OBJ) \
+ s_mulAddF32$(OBJ) \
+ s_normSubnormalF64Sig$(OBJ) \
+ s_roundPackToF64$(OBJ) \
+ s_normRoundPackToF64$(OBJ) \
+ s_addMagsF64$(OBJ) \
+ s_subMagsF64$(OBJ) \
+ s_mulAddF64$(OBJ) \
+ s_normSubnormalExtF80Sig$(OBJ) \
+ s_roundPackToExtF80$(OBJ) \
+ s_normRoundPackToExtF80$(OBJ) \
+ s_addMagsExtF80$(OBJ) \
+ s_subMagsExtF80$(OBJ) \
+ s_normSubnormalF128Sig$(OBJ) \
+ s_roundPackToF128$(OBJ) \
+ s_normRoundPackToF128$(OBJ) \
+ s_addMagsF128$(OBJ) \
+ s_subMagsF128$(OBJ) \
+ s_mulAddF128$(OBJ) \
+ softfloat_state$(OBJ) \
+ ui32_to_f16$(OBJ) \
+ ui32_to_f32$(OBJ) \
+ ui32_to_f64$(OBJ) \
+ ui32_to_extF80$(OBJ) \
+ ui32_to_extF80M$(OBJ) \
+ ui32_to_f128$(OBJ) \
+ ui32_to_f128M$(OBJ) \
+ ui64_to_f16$(OBJ) \
+ ui64_to_f32$(OBJ) \
+ ui64_to_f64$(OBJ) \
+ ui64_to_extF80$(OBJ) \
+ ui64_to_extF80M$(OBJ) \
+ ui64_to_f128$(OBJ) \
+ ui64_to_f128M$(OBJ) \
+ i32_to_f16$(OBJ) \
+ i32_to_f32$(OBJ) \
+ i32_to_f64$(OBJ) \
+ i32_to_extF80$(OBJ) \
+ i32_to_extF80M$(OBJ) \
+ i32_to_f128$(OBJ) \
+ i32_to_f128M$(OBJ) \
+ i64_to_f16$(OBJ) \
+ i64_to_f32$(OBJ) \
+ i64_to_f64$(OBJ) \
+ i64_to_extF80$(OBJ) \
+ i64_to_extF80M$(OBJ) \
+ i64_to_f128$(OBJ) \
+ i64_to_f128M$(OBJ) \
+ f16_to_ui32$(OBJ) \
+ f16_to_ui64$(OBJ) \
+ f16_to_i32$(OBJ) \
+ f16_to_i64$(OBJ) \
+ f16_to_ui32_r_minMag$(OBJ) \
+ f16_to_ui64_r_minMag$(OBJ) \
+ f16_to_i32_r_minMag$(OBJ) \
+ f16_to_i64_r_minMag$(OBJ) \
+ f16_to_f32$(OBJ) \
+ f16_to_f64$(OBJ) \
+ f16_to_extF80$(OBJ) \
+ f16_to_extF80M$(OBJ) \
+ f16_to_f128$(OBJ) \
+ f16_to_f128M$(OBJ) \
+ f16_roundToInt$(OBJ) \
+ f16_add$(OBJ) \
+ f16_sub$(OBJ) \
+ f16_mul$(OBJ) \
+ f16_mulAdd$(OBJ) \
+ f16_div$(OBJ) \
+ f16_rem$(OBJ) \
+ f16_sqrt$(OBJ) \
+ f16_eq$(OBJ) \
+ f16_le$(OBJ) \
+ f16_lt$(OBJ) \
+ f16_eq_signaling$(OBJ) \
+ f16_le_quiet$(OBJ) \
+ f16_lt_quiet$(OBJ) \
+ f16_isSignalingNaN$(OBJ) \
+ f32_to_ui32$(OBJ) \
+ f32_to_ui64$(OBJ) \
+ f32_to_i32$(OBJ) \
+ f32_to_i64$(OBJ) \
+ f32_to_ui32_r_minMag$(OBJ) \
+ f32_to_ui64_r_minMag$(OBJ) \
+ f32_to_i32_r_minMag$(OBJ) \
+ f32_to_i64_r_minMag$(OBJ) \
+ f32_to_f16$(OBJ) \
+ f32_to_f64$(OBJ) \
+ f32_to_extF80$(OBJ) \
+ f32_to_extF80M$(OBJ) \
+ f32_to_f128$(OBJ) \
+ f32_to_f128M$(OBJ) \
+ f32_roundToInt$(OBJ) \
+ f32_add$(OBJ) \
+ f32_sub$(OBJ) \
+ f32_mul$(OBJ) \
+ f32_mulAdd$(OBJ) \
+ f32_div$(OBJ) \
+ f32_rem$(OBJ) \
+ f32_sqrt$(OBJ) \
+ f32_eq$(OBJ) \
+ f32_le$(OBJ) \
+ f32_lt$(OBJ) \
+ f32_eq_signaling$(OBJ) \
+ f32_le_quiet$(OBJ) \
+ f32_lt_quiet$(OBJ) \
+ f32_isSignalingNaN$(OBJ) \
+ f64_to_ui32$(OBJ) \
+ f64_to_ui64$(OBJ) \
+ f64_to_i32$(OBJ) \
+ f64_to_i64$(OBJ) \
+ f64_to_ui32_r_minMag$(OBJ) \
+ f64_to_ui64_r_minMag$(OBJ) \
+ f64_to_i32_r_minMag$(OBJ) \
+ f64_to_i64_r_minMag$(OBJ) \
+ f64_to_f16$(OBJ) \
+ f64_to_f32$(OBJ) \
+ f64_to_extF80$(OBJ) \
+ f64_to_extF80M$(OBJ) \
+ f64_to_f128$(OBJ) \
+ f64_to_f128M$(OBJ) \
+ f64_roundToInt$(OBJ) \
+ f64_add$(OBJ) \
+ f64_sub$(OBJ) \
+ f64_mul$(OBJ) \
+ f64_mulAdd$(OBJ) \
+ f64_div$(OBJ) \
+ f64_rem$(OBJ) \
+ f64_sqrt$(OBJ) \
+ f64_eq$(OBJ) \
+ f64_le$(OBJ) \
+ f64_lt$(OBJ) \
+ f64_eq_signaling$(OBJ) \
+ f64_le_quiet$(OBJ) \
+ f64_lt_quiet$(OBJ) \
+ f64_isSignalingNaN$(OBJ) \
+ extF80_to_ui32$(OBJ) \
+ extF80_to_ui64$(OBJ) \
+ extF80_to_i32$(OBJ) \
+ extF80_to_i64$(OBJ) \
+ extF80_to_ui32_r_minMag$(OBJ) \
+ extF80_to_ui64_r_minMag$(OBJ) \
+ extF80_to_i32_r_minMag$(OBJ) \
+ extF80_to_i64_r_minMag$(OBJ) \
+ extF80_to_f16$(OBJ) \
+ extF80_to_f32$(OBJ) \
+ extF80_to_f64$(OBJ) \
+ extF80_to_f128$(OBJ) \
+ extF80_roundToInt$(OBJ) \
+ extF80_add$(OBJ) \
+ extF80_sub$(OBJ) \
+ extF80_mul$(OBJ) \
+ extF80_div$(OBJ) \
+ extF80_rem$(OBJ) \
+ extF80_sqrt$(OBJ) \
+ extF80_eq$(OBJ) \
+ extF80_le$(OBJ) \
+ extF80_lt$(OBJ) \
+ extF80_eq_signaling$(OBJ) \
+ extF80_le_quiet$(OBJ) \
+ extF80_lt_quiet$(OBJ) \
+ extF80_isSignalingNaN$(OBJ) \
+ extF80M_to_ui32$(OBJ) \
+ extF80M_to_ui64$(OBJ) \
+ extF80M_to_i32$(OBJ) \
+ extF80M_to_i64$(OBJ) \
+ extF80M_to_ui32_r_minMag$(OBJ) \
+ extF80M_to_ui64_r_minMag$(OBJ) \
+ extF80M_to_i32_r_minMag$(OBJ) \
+ extF80M_to_i64_r_minMag$(OBJ) \
+ extF80M_to_f16$(OBJ) \
+ extF80M_to_f32$(OBJ) \
+ extF80M_to_f64$(OBJ) \
+ extF80M_to_f128M$(OBJ) \
+ extF80M_roundToInt$(OBJ) \
+ extF80M_add$(OBJ) \
+ extF80M_sub$(OBJ) \
+ extF80M_mul$(OBJ) \
+ extF80M_div$(OBJ) \
+ extF80M_rem$(OBJ) \
+ extF80M_sqrt$(OBJ) \
+ extF80M_eq$(OBJ) \
+ extF80M_le$(OBJ) \
+ extF80M_lt$(OBJ) \
+ extF80M_eq_signaling$(OBJ) \
+ extF80M_le_quiet$(OBJ) \
+ extF80M_lt_quiet$(OBJ) \
+ f128_to_ui32$(OBJ) \
+ f128_to_ui64$(OBJ) \
+ f128_to_i32$(OBJ) \
+ f128_to_i64$(OBJ) \
+ f128_to_ui32_r_minMag$(OBJ) \
+ f128_to_ui64_r_minMag$(OBJ) \
+ f128_to_i32_r_minMag$(OBJ) \
+ f128_to_i64_r_minMag$(OBJ) \
+ f128_to_f16$(OBJ) \
+ f128_to_f32$(OBJ) \
+ f128_to_extF80$(OBJ) \
+ f128_to_f64$(OBJ) \
+ f128_roundToInt$(OBJ) \
+ f128_add$(OBJ) \
+ f128_sub$(OBJ) \
+ f128_mul$(OBJ) \
+ f128_mulAdd$(OBJ) \
+ f128_div$(OBJ) \
+ f128_rem$(OBJ) \
+ f128_sqrt$(OBJ) \
+ f128_eq$(OBJ) \
+ f128_le$(OBJ) \
+ f128_lt$(OBJ) \
+ f128_eq_signaling$(OBJ) \
+ f128_le_quiet$(OBJ) \
+ f128_lt_quiet$(OBJ) \
+ f128_isSignalingNaN$(OBJ) \
+ f128M_to_ui32$(OBJ) \
+ f128M_to_ui64$(OBJ) \
+ f128M_to_i32$(OBJ) \
+ f128M_to_i64$(OBJ) \
+ f128M_to_ui32_r_minMag$(OBJ) \
+ f128M_to_ui64_r_minMag$(OBJ) \
+ f128M_to_i32_r_minMag$(OBJ) \
+ f128M_to_i64_r_minMag$(OBJ) \
+ f128M_to_f16$(OBJ) \
+ f128M_to_f32$(OBJ) \
+ f128M_to_extF80M$(OBJ) \
+ f128M_to_f64$(OBJ) \
+ f128M_roundToInt$(OBJ) \
+ f128M_add$(OBJ) \
+ f128M_sub$(OBJ) \
+ f128M_mul$(OBJ) \
+ f128M_mulAdd$(OBJ) \
+ f128M_div$(OBJ) \
+ f128M_rem$(OBJ) \
+ f128M_sqrt$(OBJ) \
+ f128M_eq$(OBJ) \
+ f128M_le$(OBJ) \
+ f128M_lt$(OBJ) \
+ f128M_eq_signaling$(OBJ) \
+ f128M_le_quiet$(OBJ) \
+ f128M_lt_quiet$(OBJ) \
+
+OBJS_ALL = $(OBJS_PRIMITIVES) $(OBJS_SPECIALIZE) $(OBJS_OTHERS)
+
+$(OBJS_ALL): \
+ $(OTHER_HEADERS) platform.h $(SOURCE_DIR)/include/primitiveTypes.h \
+ $(SOURCE_DIR)/include/primitives.h
+$(OBJS_SPECIALIZE) $(OBJS_OTHERS): \
+ $(SOURCE_DIR)/include/softfloat_types.h $(SOURCE_DIR)/include/internals.h \
+ $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/specialize.h \
+ $(SOURCE_DIR)/include/softfloat.h
+
+$(OBJS_PRIMITIVES) $(OBJS_OTHERS): %$(OBJ): $(SOURCE_DIR)/%.c
+ $(COMPILE_C) $(SOURCE_DIR)/$*.c
+
+$(OBJS_SPECIALIZE): %$(OBJ): $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/%.c
+ $(COMPILE_C) $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/$*.c
+
+softfloat$(LIB): $(OBJS_ALL)
+ $(DELETE) $@
+ $(MAKELIB) $^
+
+.PHONY: clean
+clean:
+ $(DELETE) $(OBJS_ALL) softfloat$(LIB)
+
diff --git a/softfloat/build/Linux-x86_64-GCC/platform.h b/softfloat/build/Linux-x86_64-GCC/platform.h
new file mode 100644
index 0000000..c5e06f8
--- /dev/null
+++ b/softfloat/build/Linux-x86_64-GCC/platform.h
@@ -0,0 +1,54 @@
+
+/*============================================================================
+
+This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the
+University of California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+#define LITTLEENDIAN 1
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+#ifdef __GNUC_STDC_INLINE__
+#define INLINE inline
+#else
+#define INLINE extern inline
+#endif
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+#define SOFTFLOAT_BUILTIN_CLZ 1
+#define SOFTFLOAT_INTRINSIC_INT128 1
+#include "opts-GCC.h"
+
diff --git a/softfloat/build/Win32-MinGW/Makefile b/softfloat/build/Win32-MinGW/Makefile
new file mode 100644
index 0000000..faeb397
--- /dev/null
+++ b/softfloat/build/Win32-MinGW/Makefile
@@ -0,0 +1,325 @@
+
+#=============================================================================
+#
+# This Makefile is part of the SoftFloat IEEE Floating-Point Arithmetic
+# Package, Release 3e, by John R. Hauser.
+#
+# Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the
+# University of California. All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+# 1. Redistributions of source code must retain the above copyright notice,
+# this list of conditions, and the following disclaimer.
+#
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions, and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+#
+# 3. Neither the name of the University nor the names of its contributors
+# may be used to endorse or promote products derived from this software
+# without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+# EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+# DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#=============================================================================
+
+SOURCE_DIR ?= ../../source
+SPECIALIZE_TYPE ?= 8086
+
+SOFTFLOAT_OPTS ?= \
+ -DSOFTFLOAT_ROUND_ODD -DINLINE_LEVEL=5 -DSOFTFLOAT_FAST_DIV32TO16 \
+ -DSOFTFLOAT_FAST_DIV64TO32
+
+DELETE = rm -f
+C_INCLUDES = -I. -I$(SOURCE_DIR)/$(SPECIALIZE_TYPE) -I$(SOURCE_DIR)/include
+COMPILE_C = \
+ gcc -c -Werror-implicit-function-declaration $(SOFTFLOAT_OPTS) \
+ $(C_INCLUDES) -O2 -o $@
+MAKELIB = ar crs $@
+
+OBJ = .o
+LIB = .a
+
+OTHER_HEADERS =
+
+.PHONY: all
+all: softfloat$(LIB)
+
+OBJS_PRIMITIVES = \
+ s_compare96M$(OBJ) \
+ s_compare128M$(OBJ) \
+ s_shortShiftLeft64To96M$(OBJ) \
+ s_shortShiftLeftM$(OBJ) \
+ s_shiftLeftM$(OBJ) \
+ s_shortShiftRightM$(OBJ) \
+ s_shortShiftRightJam64$(OBJ) \
+ s_shortShiftRightJamM$(OBJ) \
+ s_shiftRightJam32$(OBJ) \
+ s_shiftRightJam64$(OBJ) \
+ s_shiftRightJamM$(OBJ) \
+ s_shiftRightM$(OBJ) \
+ s_countLeadingZeros8$(OBJ) \
+ s_countLeadingZeros16$(OBJ) \
+ s_countLeadingZeros32$(OBJ) \
+ s_countLeadingZeros64$(OBJ) \
+ s_addM$(OBJ) \
+ s_addCarryM$(OBJ) \
+ s_addComplCarryM$(OBJ) \
+ s_negXM$(OBJ) \
+ s_sub1XM$(OBJ) \
+ s_subM$(OBJ) \
+ s_mul64To128M$(OBJ) \
+ s_mul128MTo256M$(OBJ) \
+ s_approxRecip_1Ks$(OBJ) \
+ s_approxRecip32_1$(OBJ) \
+ s_approxRecipSqrt_1Ks$(OBJ) \
+ s_approxRecipSqrt32_1$(OBJ) \
+ s_remStepMBy32$(OBJ) \
+
+OBJS_SPECIALIZE = \
+ softfloat_raiseFlags$(OBJ) \
+ s_f16UIToCommonNaN$(OBJ) \
+ s_commonNaNToF16UI$(OBJ) \
+ s_propagateNaNF16UI$(OBJ) \
+ s_f32UIToCommonNaN$(OBJ) \
+ s_commonNaNToF32UI$(OBJ) \
+ s_propagateNaNF32UI$(OBJ) \
+ s_f64UIToCommonNaN$(OBJ) \
+ s_commonNaNToF64UI$(OBJ) \
+ s_propagateNaNF64UI$(OBJ) \
+ extF80M_isSignalingNaN$(OBJ) \
+ s_extF80MToCommonNaN$(OBJ) \
+ s_commonNaNToExtF80M$(OBJ) \
+ s_propagateNaNExtF80M$(OBJ) \
+ f128M_isSignalingNaN$(OBJ) \
+ s_f128MToCommonNaN$(OBJ) \
+ s_commonNaNToF128M$(OBJ) \
+ s_propagateNaNF128M$(OBJ) \
+
+OBJS_OTHERS = \
+ s_roundToUI32$(OBJ) \
+ s_roundMToUI64$(OBJ) \
+ s_roundToI32$(OBJ) \
+ s_roundMToI64$(OBJ) \
+ s_normSubnormalF16Sig$(OBJ) \
+ s_roundPackToF16$(OBJ) \
+ s_normRoundPackToF16$(OBJ) \
+ s_addMagsF16$(OBJ) \
+ s_subMagsF16$(OBJ) \
+ s_mulAddF16$(OBJ) \
+ s_normSubnormalF32Sig$(OBJ) \
+ s_roundPackToF32$(OBJ) \
+ s_normRoundPackToF32$(OBJ) \
+ s_addMagsF32$(OBJ) \
+ s_subMagsF32$(OBJ) \
+ s_mulAddF32$(OBJ) \
+ s_normSubnormalF64Sig$(OBJ) \
+ s_roundPackToF64$(OBJ) \
+ s_normRoundPackToF64$(OBJ) \
+ s_addMagsF64$(OBJ) \
+ s_subMagsF64$(OBJ) \
+ s_mulAddF64$(OBJ) \
+ s_tryPropagateNaNExtF80M$(OBJ) \
+ s_invalidExtF80M$(OBJ) \
+ s_normExtF80SigM$(OBJ) \
+ s_roundPackMToExtF80M$(OBJ) \
+ s_normRoundPackMToExtF80M$(OBJ) \
+ s_addExtF80M$(OBJ) \
+ s_compareNonnormExtF80M$(OBJ) \
+ s_isNaNF128M$(OBJ) \
+ s_tryPropagateNaNF128M$(OBJ) \
+ s_invalidF128M$(OBJ) \
+ s_shiftNormSigF128M$(OBJ) \
+ s_roundPackMToF128M$(OBJ) \
+ s_normRoundPackMToF128M$(OBJ) \
+ s_addF128M$(OBJ) \
+ s_mulAddF128M$(OBJ) \
+ softfloat_state$(OBJ) \
+ ui32_to_f16$(OBJ) \
+ ui32_to_f32$(OBJ) \
+ ui32_to_f64$(OBJ) \
+ ui32_to_extF80M$(OBJ) \
+ ui32_to_f128M$(OBJ) \
+ ui64_to_f16$(OBJ) \
+ ui64_to_f32$(OBJ) \
+ ui64_to_f64$(OBJ) \
+ ui64_to_extF80M$(OBJ) \
+ ui64_to_f128M$(OBJ) \
+ i32_to_f16$(OBJ) \
+ i32_to_f32$(OBJ) \
+ i32_to_f64$(OBJ) \
+ i32_to_extF80M$(OBJ) \
+ i32_to_f128M$(OBJ) \
+ i64_to_f16$(OBJ) \
+ i64_to_f32$(OBJ) \
+ i64_to_f64$(OBJ) \
+ i64_to_extF80M$(OBJ) \
+ i64_to_f128M$(OBJ) \
+ f16_to_ui32$(OBJ) \
+ f16_to_ui64$(OBJ) \
+ f16_to_i32$(OBJ) \
+ f16_to_i64$(OBJ) \
+ f16_to_ui32_r_minMag$(OBJ) \
+ f16_to_ui64_r_minMag$(OBJ) \
+ f16_to_i32_r_minMag$(OBJ) \
+ f16_to_i64_r_minMag$(OBJ) \
+ f16_to_f32$(OBJ) \
+ f16_to_f64$(OBJ) \
+ f16_to_extF80M$(OBJ) \
+ f16_to_f128M$(OBJ) \
+ f16_roundToInt$(OBJ) \
+ f16_add$(OBJ) \
+ f16_sub$(OBJ) \
+ f16_mul$(OBJ) \
+ f16_mulAdd$(OBJ) \
+ f16_div$(OBJ) \
+ f16_rem$(OBJ) \
+ f16_sqrt$(OBJ) \
+ f16_eq$(OBJ) \
+ f16_le$(OBJ) \
+ f16_lt$(OBJ) \
+ f16_eq_signaling$(OBJ) \
+ f16_le_quiet$(OBJ) \
+ f16_lt_quiet$(OBJ) \
+ f16_isSignalingNaN$(OBJ) \
+ f32_to_ui32$(OBJ) \
+ f32_to_ui64$(OBJ) \
+ f32_to_i32$(OBJ) \
+ f32_to_i64$(OBJ) \
+ f32_to_ui32_r_minMag$(OBJ) \
+ f32_to_ui64_r_minMag$(OBJ) \
+ f32_to_i32_r_minMag$(OBJ) \
+ f32_to_i64_r_minMag$(OBJ) \
+ f32_to_f16$(OBJ) \
+ f32_to_f64$(OBJ) \
+ f32_to_extF80M$(OBJ) \
+ f32_to_f128M$(OBJ) \
+ f32_roundToInt$(OBJ) \
+ f32_add$(OBJ) \
+ f32_sub$(OBJ) \
+ f32_mul$(OBJ) \
+ f32_mulAdd$(OBJ) \
+ f32_div$(OBJ) \
+ f32_rem$(OBJ) \
+ f32_sqrt$(OBJ) \
+ f32_eq$(OBJ) \
+ f32_le$(OBJ) \
+ f32_lt$(OBJ) \
+ f32_eq_signaling$(OBJ) \
+ f32_le_quiet$(OBJ) \
+ f32_lt_quiet$(OBJ) \
+ f32_isSignalingNaN$(OBJ) \
+ f64_to_ui32$(OBJ) \
+ f64_to_ui64$(OBJ) \
+ f64_to_i32$(OBJ) \
+ f64_to_i64$(OBJ) \
+ f64_to_ui32_r_minMag$(OBJ) \
+ f64_to_ui64_r_minMag$(OBJ) \
+ f64_to_i32_r_minMag$(OBJ) \
+ f64_to_i64_r_minMag$(OBJ) \
+ f64_to_f16$(OBJ) \
+ f64_to_f32$(OBJ) \
+ f64_to_extF80M$(OBJ) \
+ f64_to_f128M$(OBJ) \
+ f64_roundToInt$(OBJ) \
+ f64_add$(OBJ) \
+ f64_sub$(OBJ) \
+ f64_mul$(OBJ) \
+ f64_mulAdd$(OBJ) \
+ f64_div$(OBJ) \
+ f64_rem$(OBJ) \
+ f64_sqrt$(OBJ) \
+ f64_eq$(OBJ) \
+ f64_le$(OBJ) \
+ f64_lt$(OBJ) \
+ f64_eq_signaling$(OBJ) \
+ f64_le_quiet$(OBJ) \
+ f64_lt_quiet$(OBJ) \
+ f64_isSignalingNaN$(OBJ) \
+ extF80M_to_ui32$(OBJ) \
+ extF80M_to_ui64$(OBJ) \
+ extF80M_to_i32$(OBJ) \
+ extF80M_to_i64$(OBJ) \
+ extF80M_to_ui32_r_minMag$(OBJ) \
+ extF80M_to_ui64_r_minMag$(OBJ) \
+ extF80M_to_i32_r_minMag$(OBJ) \
+ extF80M_to_i64_r_minMag$(OBJ) \
+ extF80M_to_f16$(OBJ) \
+ extF80M_to_f32$(OBJ) \
+ extF80M_to_f64$(OBJ) \
+ extF80M_to_f128M$(OBJ) \
+ extF80M_roundToInt$(OBJ) \
+ extF80M_add$(OBJ) \
+ extF80M_sub$(OBJ) \
+ extF80M_mul$(OBJ) \
+ extF80M_div$(OBJ) \
+ extF80M_rem$(OBJ) \
+ extF80M_sqrt$(OBJ) \
+ extF80M_eq$(OBJ) \
+ extF80M_le$(OBJ) \
+ extF80M_lt$(OBJ) \
+ extF80M_eq_signaling$(OBJ) \
+ extF80M_le_quiet$(OBJ) \
+ extF80M_lt_quiet$(OBJ) \
+ f128M_to_ui32$(OBJ) \
+ f128M_to_ui64$(OBJ) \
+ f128M_to_i32$(OBJ) \
+ f128M_to_i64$(OBJ) \
+ f128M_to_ui32_r_minMag$(OBJ) \
+ f128M_to_ui64_r_minMag$(OBJ) \
+ f128M_to_i32_r_minMag$(OBJ) \
+ f128M_to_i64_r_minMag$(OBJ) \
+ f128M_to_f16$(OBJ) \
+ f128M_to_f32$(OBJ) \
+ f128M_to_f64$(OBJ) \
+ f128M_to_extF80M$(OBJ) \
+ f128M_roundToInt$(OBJ) \
+ f128M_add$(OBJ) \
+ f128M_sub$(OBJ) \
+ f128M_mul$(OBJ) \
+ f128M_mulAdd$(OBJ) \
+ f128M_div$(OBJ) \
+ f128M_rem$(OBJ) \
+ f128M_sqrt$(OBJ) \
+ f128M_eq$(OBJ) \
+ f128M_le$(OBJ) \
+ f128M_lt$(OBJ) \
+ f128M_eq_signaling$(OBJ) \
+ f128M_le_quiet$(OBJ) \
+ f128M_lt_quiet$(OBJ) \
+
+OBJS_ALL = $(OBJS_PRIMITIVES) $(OBJS_SPECIALIZE) $(OBJS_OTHERS)
+
+$(OBJS_ALL): \
+ $(OTHER_HEADERS) platform.h $(SOURCE_DIR)/include/primitiveTypes.h \
+ $(SOURCE_DIR)/include/primitives.h
+$(OBJS_SPECIALIZE) $(OBJS_OTHERS): \
+ $(SOURCE_DIR)/include/softfloat_types.h $(SOURCE_DIR)/include/internals.h \
+ $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/specialize.h \
+ $(SOURCE_DIR)/include/softfloat.h
+
+$(OBJS_PRIMITIVES) $(OBJS_OTHERS): %$(OBJ): $(SOURCE_DIR)/%.c
+ $(COMPILE_C) $(SOURCE_DIR)/$*.c
+
+$(OBJS_SPECIALIZE): %$(OBJ): $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/%.c
+ $(COMPILE_C) $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/$*.c
+
+softfloat$(LIB): $(OBJS_ALL)
+ $(DELETE) $@
+ $(MAKELIB) $^
+
+.PHONY: clean
+clean:
+ $(DELETE) $(OBJS_ALL) softfloat$(LIB)
+
diff --git a/softfloat/build/Win32-MinGW/platform.h b/softfloat/build/Win32-MinGW/platform.h
new file mode 100644
index 0000000..d514dbc
--- /dev/null
+++ b/softfloat/build/Win32-MinGW/platform.h
@@ -0,0 +1,53 @@
+
+/*============================================================================
+
+This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the
+University of California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+#define LITTLEENDIAN 1
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+#ifdef __GNUC_STDC_INLINE__
+#define INLINE inline
+#else
+#define INLINE extern inline
+#endif
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+#define SOFTFLOAT_BUILTIN_CLZ 1
+#include "opts-GCC.h"
+
diff --git a/softfloat/build/Win32-SSE2-MinGW/Makefile b/softfloat/build/Win32-SSE2-MinGW/Makefile
new file mode 100644
index 0000000..ced977b
--- /dev/null
+++ b/softfloat/build/Win32-SSE2-MinGW/Makefile
@@ -0,0 +1,325 @@
+
+#=============================================================================
+#
+# This Makefile is part of the SoftFloat IEEE Floating-Point Arithmetic
+# Package, Release 3e, by John R. Hauser.
+#
+# Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the
+# University of California. All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+# 1. Redistributions of source code must retain the above copyright notice,
+# this list of conditions, and the following disclaimer.
+#
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions, and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+#
+# 3. Neither the name of the University nor the names of its contributors
+# may be used to endorse or promote products derived from this software
+# without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+# EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+# DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#=============================================================================
+
+SOURCE_DIR ?= ../../source
+SPECIALIZE_TYPE ?= 8086-SSE
+
+SOFTFLOAT_OPTS ?= \
+ -DSOFTFLOAT_ROUND_ODD -DINLINE_LEVEL=5 -DSOFTFLOAT_FAST_DIV32TO16 \
+ -DSOFTFLOAT_FAST_DIV64TO32
+
+DELETE = rm -f
+C_INCLUDES = -I. -I$(SOURCE_DIR)/$(SPECIALIZE_TYPE) -I$(SOURCE_DIR)/include
+COMPILE_C = \
+ gcc -c -Werror-implicit-function-declaration $(SOFTFLOAT_OPTS) \
+ $(C_INCLUDES) -O2 -o $@
+MAKELIB = ar crs $@
+
+OBJ = .o
+LIB = .a
+
+OTHER_HEADERS =
+
+.PHONY: all
+all: softfloat$(LIB)
+
+OBJS_PRIMITIVES = \
+ s_compare96M$(OBJ) \
+ s_compare128M$(OBJ) \
+ s_shortShiftLeft64To96M$(OBJ) \
+ s_shortShiftLeftM$(OBJ) \
+ s_shiftLeftM$(OBJ) \
+ s_shortShiftRightM$(OBJ) \
+ s_shortShiftRightJam64$(OBJ) \
+ s_shortShiftRightJamM$(OBJ) \
+ s_shiftRightJam32$(OBJ) \
+ s_shiftRightJam64$(OBJ) \
+ s_shiftRightJamM$(OBJ) \
+ s_shiftRightM$(OBJ) \
+ s_countLeadingZeros8$(OBJ) \
+ s_countLeadingZeros16$(OBJ) \
+ s_countLeadingZeros32$(OBJ) \
+ s_countLeadingZeros64$(OBJ) \
+ s_addM$(OBJ) \
+ s_addCarryM$(OBJ) \
+ s_addComplCarryM$(OBJ) \
+ s_negXM$(OBJ) \
+ s_sub1XM$(OBJ) \
+ s_subM$(OBJ) \
+ s_mul64To128M$(OBJ) \
+ s_mul128MTo256M$(OBJ) \
+ s_approxRecip_1Ks$(OBJ) \
+ s_approxRecip32_1$(OBJ) \
+ s_approxRecipSqrt_1Ks$(OBJ) \
+ s_approxRecipSqrt32_1$(OBJ) \
+ s_remStepMBy32$(OBJ) \
+
+OBJS_SPECIALIZE = \
+ softfloat_raiseFlags$(OBJ) \
+ s_f16UIToCommonNaN$(OBJ) \
+ s_commonNaNToF16UI$(OBJ) \
+ s_propagateNaNF16UI$(OBJ) \
+ s_f32UIToCommonNaN$(OBJ) \
+ s_commonNaNToF32UI$(OBJ) \
+ s_propagateNaNF32UI$(OBJ) \
+ s_f64UIToCommonNaN$(OBJ) \
+ s_commonNaNToF64UI$(OBJ) \
+ s_propagateNaNF64UI$(OBJ) \
+ extF80M_isSignalingNaN$(OBJ) \
+ s_extF80MToCommonNaN$(OBJ) \
+ s_commonNaNToExtF80M$(OBJ) \
+ s_propagateNaNExtF80M$(OBJ) \
+ f128M_isSignalingNaN$(OBJ) \
+ s_f128MToCommonNaN$(OBJ) \
+ s_commonNaNToF128M$(OBJ) \
+ s_propagateNaNF128M$(OBJ) \
+
+OBJS_OTHERS = \
+ s_roundToUI32$(OBJ) \
+ s_roundMToUI64$(OBJ) \
+ s_roundToI32$(OBJ) \
+ s_roundMToI64$(OBJ) \
+ s_normSubnormalF16Sig$(OBJ) \
+ s_roundPackToF16$(OBJ) \
+ s_normRoundPackToF16$(OBJ) \
+ s_addMagsF16$(OBJ) \
+ s_subMagsF16$(OBJ) \
+ s_mulAddF16$(OBJ) \
+ s_normSubnormalF32Sig$(OBJ) \
+ s_roundPackToF32$(OBJ) \
+ s_normRoundPackToF32$(OBJ) \
+ s_addMagsF32$(OBJ) \
+ s_subMagsF32$(OBJ) \
+ s_mulAddF32$(OBJ) \
+ s_normSubnormalF64Sig$(OBJ) \
+ s_roundPackToF64$(OBJ) \
+ s_normRoundPackToF64$(OBJ) \
+ s_addMagsF64$(OBJ) \
+ s_subMagsF64$(OBJ) \
+ s_mulAddF64$(OBJ) \
+ s_tryPropagateNaNExtF80M$(OBJ) \
+ s_invalidExtF80M$(OBJ) \
+ s_normExtF80SigM$(OBJ) \
+ s_roundPackMToExtF80M$(OBJ) \
+ s_normRoundPackMToExtF80M$(OBJ) \
+ s_addExtF80M$(OBJ) \
+ s_compareNonnormExtF80M$(OBJ) \
+ s_isNaNF128M$(OBJ) \
+ s_tryPropagateNaNF128M$(OBJ) \
+ s_invalidF128M$(OBJ) \
+ s_shiftNormSigF128M$(OBJ) \
+ s_roundPackMToF128M$(OBJ) \
+ s_normRoundPackMToF128M$(OBJ) \
+ s_addF128M$(OBJ) \
+ s_mulAddF128M$(OBJ) \
+ softfloat_state$(OBJ) \
+ ui32_to_f16$(OBJ) \
+ ui32_to_f32$(OBJ) \
+ ui32_to_f64$(OBJ) \
+ ui32_to_extF80M$(OBJ) \
+ ui32_to_f128M$(OBJ) \
+ ui64_to_f16$(OBJ) \
+ ui64_to_f32$(OBJ) \
+ ui64_to_f64$(OBJ) \
+ ui64_to_extF80M$(OBJ) \
+ ui64_to_f128M$(OBJ) \
+ i32_to_f16$(OBJ) \
+ i32_to_f32$(OBJ) \
+ i32_to_f64$(OBJ) \
+ i32_to_extF80M$(OBJ) \
+ i32_to_f128M$(OBJ) \
+ i64_to_f16$(OBJ) \
+ i64_to_f32$(OBJ) \
+ i64_to_f64$(OBJ) \
+ i64_to_extF80M$(OBJ) \
+ i64_to_f128M$(OBJ) \
+ f16_to_ui32$(OBJ) \
+ f16_to_ui64$(OBJ) \
+ f16_to_i32$(OBJ) \
+ f16_to_i64$(OBJ) \
+ f16_to_ui32_r_minMag$(OBJ) \
+ f16_to_ui64_r_minMag$(OBJ) \
+ f16_to_i32_r_minMag$(OBJ) \
+ f16_to_i64_r_minMag$(OBJ) \
+ f16_to_f32$(OBJ) \
+ f16_to_f64$(OBJ) \
+ f16_to_extF80M$(OBJ) \
+ f16_to_f128M$(OBJ) \
+ f16_roundToInt$(OBJ) \
+ f16_add$(OBJ) \
+ f16_sub$(OBJ) \
+ f16_mul$(OBJ) \
+ f16_mulAdd$(OBJ) \
+ f16_div$(OBJ) \
+ f16_rem$(OBJ) \
+ f16_sqrt$(OBJ) \
+ f16_eq$(OBJ) \
+ f16_le$(OBJ) \
+ f16_lt$(OBJ) \
+ f16_eq_signaling$(OBJ) \
+ f16_le_quiet$(OBJ) \
+ f16_lt_quiet$(OBJ) \
+ f16_isSignalingNaN$(OBJ) \
+ f32_to_ui32$(OBJ) \
+ f32_to_ui64$(OBJ) \
+ f32_to_i32$(OBJ) \
+ f32_to_i64$(OBJ) \
+ f32_to_ui32_r_minMag$(OBJ) \
+ f32_to_ui64_r_minMag$(OBJ) \
+ f32_to_i32_r_minMag$(OBJ) \
+ f32_to_i64_r_minMag$(OBJ) \
+ f32_to_f16$(OBJ) \
+ f32_to_f64$(OBJ) \
+ f32_to_extF80M$(OBJ) \
+ f32_to_f128M$(OBJ) \
+ f32_roundToInt$(OBJ) \
+ f32_add$(OBJ) \
+ f32_sub$(OBJ) \
+ f32_mul$(OBJ) \
+ f32_mulAdd$(OBJ) \
+ f32_div$(OBJ) \
+ f32_rem$(OBJ) \
+ f32_sqrt$(OBJ) \
+ f32_eq$(OBJ) \
+ f32_le$(OBJ) \
+ f32_lt$(OBJ) \
+ f32_eq_signaling$(OBJ) \
+ f32_le_quiet$(OBJ) \
+ f32_lt_quiet$(OBJ) \
+ f32_isSignalingNaN$(OBJ) \
+ f64_to_ui32$(OBJ) \
+ f64_to_ui64$(OBJ) \
+ f64_to_i32$(OBJ) \
+ f64_to_i64$(OBJ) \
+ f64_to_ui32_r_minMag$(OBJ) \
+ f64_to_ui64_r_minMag$(OBJ) \
+ f64_to_i32_r_minMag$(OBJ) \
+ f64_to_i64_r_minMag$(OBJ) \
+ f64_to_f16$(OBJ) \
+ f64_to_f32$(OBJ) \
+ f64_to_extF80M$(OBJ) \
+ f64_to_f128M$(OBJ) \
+ f64_roundToInt$(OBJ) \
+ f64_add$(OBJ) \
+ f64_sub$(OBJ) \
+ f64_mul$(OBJ) \
+ f64_mulAdd$(OBJ) \
+ f64_div$(OBJ) \
+ f64_rem$(OBJ) \
+ f64_sqrt$(OBJ) \
+ f64_eq$(OBJ) \
+ f64_le$(OBJ) \
+ f64_lt$(OBJ) \
+ f64_eq_signaling$(OBJ) \
+ f64_le_quiet$(OBJ) \
+ f64_lt_quiet$(OBJ) \
+ f64_isSignalingNaN$(OBJ) \
+ extF80M_to_ui32$(OBJ) \
+ extF80M_to_ui64$(OBJ) \
+ extF80M_to_i32$(OBJ) \
+ extF80M_to_i64$(OBJ) \
+ extF80M_to_ui32_r_minMag$(OBJ) \
+ extF80M_to_ui64_r_minMag$(OBJ) \
+ extF80M_to_i32_r_minMag$(OBJ) \
+ extF80M_to_i64_r_minMag$(OBJ) \
+ extF80M_to_f16$(OBJ) \
+ extF80M_to_f32$(OBJ) \
+ extF80M_to_f64$(OBJ) \
+ extF80M_to_f128M$(OBJ) \
+ extF80M_roundToInt$(OBJ) \
+ extF80M_add$(OBJ) \
+ extF80M_sub$(OBJ) \
+ extF80M_mul$(OBJ) \
+ extF80M_div$(OBJ) \
+ extF80M_rem$(OBJ) \
+ extF80M_sqrt$(OBJ) \
+ extF80M_eq$(OBJ) \
+ extF80M_le$(OBJ) \
+ extF80M_lt$(OBJ) \
+ extF80M_eq_signaling$(OBJ) \
+ extF80M_le_quiet$(OBJ) \
+ extF80M_lt_quiet$(OBJ) \
+ f128M_to_ui32$(OBJ) \
+ f128M_to_ui64$(OBJ) \
+ f128M_to_i32$(OBJ) \
+ f128M_to_i64$(OBJ) \
+ f128M_to_ui32_r_minMag$(OBJ) \
+ f128M_to_ui64_r_minMag$(OBJ) \
+ f128M_to_i32_r_minMag$(OBJ) \
+ f128M_to_i64_r_minMag$(OBJ) \
+ f128M_to_f16$(OBJ) \
+ f128M_to_f32$(OBJ) \
+ f128M_to_f64$(OBJ) \
+ f128M_to_extF80M$(OBJ) \
+ f128M_roundToInt$(OBJ) \
+ f128M_add$(OBJ) \
+ f128M_sub$(OBJ) \
+ f128M_mul$(OBJ) \
+ f128M_mulAdd$(OBJ) \
+ f128M_div$(OBJ) \
+ f128M_rem$(OBJ) \
+ f128M_sqrt$(OBJ) \
+ f128M_eq$(OBJ) \
+ f128M_le$(OBJ) \
+ f128M_lt$(OBJ) \
+ f128M_eq_signaling$(OBJ) \
+ f128M_le_quiet$(OBJ) \
+ f128M_lt_quiet$(OBJ) \
+
+OBJS_ALL = $(OBJS_PRIMITIVES) $(OBJS_SPECIALIZE) $(OBJS_OTHERS)
+
+$(OBJS_ALL): \
+ $(OTHER_HEADERS) platform.h $(SOURCE_DIR)/include/primitiveTypes.h \
+ $(SOURCE_DIR)/include/primitives.h
+$(OBJS_SPECIALIZE) $(OBJS_OTHERS): \
+ $(SOURCE_DIR)/include/softfloat_types.h $(SOURCE_DIR)/include/internals.h \
+ $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/specialize.h \
+ $(SOURCE_DIR)/include/softfloat.h
+
+$(OBJS_PRIMITIVES) $(OBJS_OTHERS): %$(OBJ): $(SOURCE_DIR)/%.c
+ $(COMPILE_C) $(SOURCE_DIR)/$*.c
+
+$(OBJS_SPECIALIZE): %$(OBJ): $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/%.c
+ $(COMPILE_C) $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/$*.c
+
+softfloat$(LIB): $(OBJS_ALL)
+ $(DELETE) $@
+ $(MAKELIB) $^
+
+.PHONY: clean
+clean:
+ $(DELETE) $(OBJS_ALL) softfloat$(LIB)
+
diff --git a/softfloat/build/Win32-SSE2-MinGW/platform.h b/softfloat/build/Win32-SSE2-MinGW/platform.h
new file mode 100644
index 0000000..d514dbc
--- /dev/null
+++ b/softfloat/build/Win32-SSE2-MinGW/platform.h
@@ -0,0 +1,53 @@
+
+/*============================================================================
+
+This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the
+University of California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+#define LITTLEENDIAN 1
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+#ifdef __GNUC_STDC_INLINE__
+#define INLINE inline
+#else
+#define INLINE extern inline
+#endif
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+#define SOFTFLOAT_BUILTIN_CLZ 1
+#include "opts-GCC.h"
+
diff --git a/softfloat/build/Win64-MinGW-w64/Makefile b/softfloat/build/Win64-MinGW-w64/Makefile
new file mode 100644
index 0000000..cc5bc0c
--- /dev/null
+++ b/softfloat/build/Win64-MinGW-w64/Makefile
@@ -0,0 +1,390 @@
+
+#=============================================================================
+#
+# This Makefile is part of the SoftFloat IEEE Floating-Point Arithmetic
+# Package, Release 3e, by John R. Hauser.
+#
+# Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the
+# University of California. All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+# 1. Redistributions of source code must retain the above copyright notice,
+# this list of conditions, and the following disclaimer.
+#
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions, and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+#
+# 3. Neither the name of the University nor the names of its contributors
+# may be used to endorse or promote products derived from this software
+# without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+# EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+# DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#=============================================================================
+
+SOURCE_DIR ?= ../../source
+SPECIALIZE_TYPE ?= 8086-SSE
+
+SOFTFLOAT_OPTS ?= \
+ -DSOFTFLOAT_ROUND_ODD -DINLINE_LEVEL=5 -DSOFTFLOAT_FAST_DIV32TO16 \
+ -DSOFTFLOAT_FAST_DIV64TO32
+
+DELETE = rm -f
+C_INCLUDES = -I. -I$(SOURCE_DIR)/$(SPECIALIZE_TYPE) -I$(SOURCE_DIR)/include
+COMPILE_C = \
+ x86_64-w64-mingw32-gcc -c -Werror-implicit-function-declaration \
+ -DSOFTFLOAT_FAST_INT64 $(SOFTFLOAT_OPTS) $(C_INCLUDES) -O2 -o $@
+MAKELIB = x86_64-w64-mingw32-ar crs $@
+
+OBJ = .o
+LIB = .a
+
+OTHER_HEADERS = $(SOURCE_DIR)/include/opts-GCC.h
+
+.PHONY: all
+all: softfloat$(LIB)
+
+OBJS_PRIMITIVES = \
+ s_eq128$(OBJ) \
+ s_le128$(OBJ) \
+ s_lt128$(OBJ) \
+ s_shortShiftLeft128$(OBJ) \
+ s_shortShiftRight128$(OBJ) \
+ s_shortShiftRightJam64$(OBJ) \
+ s_shortShiftRightJam64Extra$(OBJ) \
+ s_shortShiftRightJam128$(OBJ) \
+ s_shortShiftRightJam128Extra$(OBJ) \
+ s_shiftRightJam32$(OBJ) \
+ s_shiftRightJam64$(OBJ) \
+ s_shiftRightJam64Extra$(OBJ) \
+ s_shiftRightJam128$(OBJ) \
+ s_shiftRightJam128Extra$(OBJ) \
+ s_shiftRightJam256M$(OBJ) \
+ s_countLeadingZeros8$(OBJ) \
+ s_countLeadingZeros16$(OBJ) \
+ s_countLeadingZeros32$(OBJ) \
+ s_countLeadingZeros64$(OBJ) \
+ s_add128$(OBJ) \
+ s_add256M$(OBJ) \
+ s_sub128$(OBJ) \
+ s_sub256M$(OBJ) \
+ s_mul64ByShifted32To128$(OBJ) \
+ s_mul64To128$(OBJ) \
+ s_mul128By32$(OBJ) \
+ s_mul128To256M$(OBJ) \
+ s_approxRecip_1Ks$(OBJ) \
+ s_approxRecip32_1$(OBJ) \
+ s_approxRecipSqrt_1Ks$(OBJ) \
+ s_approxRecipSqrt32_1$(OBJ) \
+
+OBJS_SPECIALIZE = \
+ softfloat_raiseFlags$(OBJ) \
+ s_f16UIToCommonNaN$(OBJ) \
+ s_commonNaNToF16UI$(OBJ) \
+ s_propagateNaNF16UI$(OBJ) \
+ s_f32UIToCommonNaN$(OBJ) \
+ s_commonNaNToF32UI$(OBJ) \
+ s_propagateNaNF32UI$(OBJ) \
+ s_f64UIToCommonNaN$(OBJ) \
+ s_commonNaNToF64UI$(OBJ) \
+ s_propagateNaNF64UI$(OBJ) \
+ extF80M_isSignalingNaN$(OBJ) \
+ s_extF80UIToCommonNaN$(OBJ) \
+ s_commonNaNToExtF80UI$(OBJ) \
+ s_propagateNaNExtF80UI$(OBJ) \
+ f128M_isSignalingNaN$(OBJ) \
+ s_f128UIToCommonNaN$(OBJ) \
+ s_commonNaNToF128UI$(OBJ) \
+ s_propagateNaNF128UI$(OBJ) \
+
+OBJS_OTHERS = \
+ s_roundToUI32$(OBJ) \
+ s_roundToUI64$(OBJ) \
+ s_roundToI32$(OBJ) \
+ s_roundToI64$(OBJ) \
+ s_normSubnormalF16Sig$(OBJ) \
+ s_roundPackToF16$(OBJ) \
+ s_normRoundPackToF16$(OBJ) \
+ s_addMagsF16$(OBJ) \
+ s_subMagsF16$(OBJ) \
+ s_mulAddF16$(OBJ) \
+ s_normSubnormalF32Sig$(OBJ) \
+ s_roundPackToF32$(OBJ) \
+ s_normRoundPackToF32$(OBJ) \
+ s_addMagsF32$(OBJ) \
+ s_subMagsF32$(OBJ) \
+ s_mulAddF32$(OBJ) \
+ s_normSubnormalF64Sig$(OBJ) \
+ s_roundPackToF64$(OBJ) \
+ s_normRoundPackToF64$(OBJ) \
+ s_addMagsF64$(OBJ) \
+ s_subMagsF64$(OBJ) \
+ s_mulAddF64$(OBJ) \
+ s_normSubnormalExtF80Sig$(OBJ) \
+ s_roundPackToExtF80$(OBJ) \
+ s_normRoundPackToExtF80$(OBJ) \
+ s_addMagsExtF80$(OBJ) \
+ s_subMagsExtF80$(OBJ) \
+ s_normSubnormalF128Sig$(OBJ) \
+ s_roundPackToF128$(OBJ) \
+ s_normRoundPackToF128$(OBJ) \
+ s_addMagsF128$(OBJ) \
+ s_subMagsF128$(OBJ) \
+ s_mulAddF128$(OBJ) \
+ softfloat_state$(OBJ) \
+ ui32_to_f16$(OBJ) \
+ ui32_to_f32$(OBJ) \
+ ui32_to_f64$(OBJ) \
+ ui32_to_extF80$(OBJ) \
+ ui32_to_extF80M$(OBJ) \
+ ui32_to_f128$(OBJ) \
+ ui32_to_f128M$(OBJ) \
+ ui64_to_f16$(OBJ) \
+ ui64_to_f32$(OBJ) \
+ ui64_to_f64$(OBJ) \
+ ui64_to_extF80$(OBJ) \
+ ui64_to_extF80M$(OBJ) \
+ ui64_to_f128$(OBJ) \
+ ui64_to_f128M$(OBJ) \
+ i32_to_f16$(OBJ) \
+ i32_to_f32$(OBJ) \
+ i32_to_f64$(OBJ) \
+ i32_to_extF80$(OBJ) \
+ i32_to_extF80M$(OBJ) \
+ i32_to_f128$(OBJ) \
+ i32_to_f128M$(OBJ) \
+ i64_to_f16$(OBJ) \
+ i64_to_f32$(OBJ) \
+ i64_to_f64$(OBJ) \
+ i64_to_extF80$(OBJ) \
+ i64_to_extF80M$(OBJ) \
+ i64_to_f128$(OBJ) \
+ i64_to_f128M$(OBJ) \
+ f16_to_ui32$(OBJ) \
+ f16_to_ui64$(OBJ) \
+ f16_to_i32$(OBJ) \
+ f16_to_i64$(OBJ) \
+ f16_to_ui32_r_minMag$(OBJ) \
+ f16_to_ui64_r_minMag$(OBJ) \
+ f16_to_i32_r_minMag$(OBJ) \
+ f16_to_i64_r_minMag$(OBJ) \
+ f16_to_f32$(OBJ) \
+ f16_to_f64$(OBJ) \
+ f16_to_extF80$(OBJ) \
+ f16_to_extF80M$(OBJ) \
+ f16_to_f128$(OBJ) \
+ f16_to_f128M$(OBJ) \
+ f16_roundToInt$(OBJ) \
+ f16_add$(OBJ) \
+ f16_sub$(OBJ) \
+ f16_mul$(OBJ) \
+ f16_mulAdd$(OBJ) \
+ f16_div$(OBJ) \
+ f16_rem$(OBJ) \
+ f16_sqrt$(OBJ) \
+ f16_eq$(OBJ) \
+ f16_le$(OBJ) \
+ f16_lt$(OBJ) \
+ f16_eq_signaling$(OBJ) \
+ f16_le_quiet$(OBJ) \
+ f16_lt_quiet$(OBJ) \
+ f16_isSignalingNaN$(OBJ) \
+ f32_to_ui32$(OBJ) \
+ f32_to_ui64$(OBJ) \
+ f32_to_i32$(OBJ) \
+ f32_to_i64$(OBJ) \
+ f32_to_ui32_r_minMag$(OBJ) \
+ f32_to_ui64_r_minMag$(OBJ) \
+ f32_to_i32_r_minMag$(OBJ) \
+ f32_to_i64_r_minMag$(OBJ) \
+ f32_to_f16$(OBJ) \
+ f32_to_f64$(OBJ) \
+ f32_to_extF80$(OBJ) \
+ f32_to_extF80M$(OBJ) \
+ f32_to_f128$(OBJ) \
+ f32_to_f128M$(OBJ) \
+ f32_roundToInt$(OBJ) \
+ f32_add$(OBJ) \
+ f32_sub$(OBJ) \
+ f32_mul$(OBJ) \
+ f32_mulAdd$(OBJ) \
+ f32_div$(OBJ) \
+ f32_rem$(OBJ) \
+ f32_sqrt$(OBJ) \
+ f32_eq$(OBJ) \
+ f32_le$(OBJ) \
+ f32_lt$(OBJ) \
+ f32_eq_signaling$(OBJ) \
+ f32_le_quiet$(OBJ) \
+ f32_lt_quiet$(OBJ) \
+ f32_isSignalingNaN$(OBJ) \
+ f64_to_ui32$(OBJ) \
+ f64_to_ui64$(OBJ) \
+ f64_to_i32$(OBJ) \
+ f64_to_i64$(OBJ) \
+ f64_to_ui32_r_minMag$(OBJ) \
+ f64_to_ui64_r_minMag$(OBJ) \
+ f64_to_i32_r_minMag$(OBJ) \
+ f64_to_i64_r_minMag$(OBJ) \
+ f64_to_f16$(OBJ) \
+ f64_to_f32$(OBJ) \
+ f64_to_extF80$(OBJ) \
+ f64_to_extF80M$(OBJ) \
+ f64_to_f128$(OBJ) \
+ f64_to_f128M$(OBJ) \
+ f64_roundToInt$(OBJ) \
+ f64_add$(OBJ) \
+ f64_sub$(OBJ) \
+ f64_mul$(OBJ) \
+ f64_mulAdd$(OBJ) \
+ f64_div$(OBJ) \
+ f64_rem$(OBJ) \
+ f64_sqrt$(OBJ) \
+ f64_eq$(OBJ) \
+ f64_le$(OBJ) \
+ f64_lt$(OBJ) \
+ f64_eq_signaling$(OBJ) \
+ f64_le_quiet$(OBJ) \
+ f64_lt_quiet$(OBJ) \
+ f64_isSignalingNaN$(OBJ) \
+ extF80_to_ui32$(OBJ) \
+ extF80_to_ui64$(OBJ) \
+ extF80_to_i32$(OBJ) \
+ extF80_to_i64$(OBJ) \
+ extF80_to_ui32_r_minMag$(OBJ) \
+ extF80_to_ui64_r_minMag$(OBJ) \
+ extF80_to_i32_r_minMag$(OBJ) \
+ extF80_to_i64_r_minMag$(OBJ) \
+ extF80_to_f16$(OBJ) \
+ extF80_to_f32$(OBJ) \
+ extF80_to_f64$(OBJ) \
+ extF80_to_f128$(OBJ) \
+ extF80_roundToInt$(OBJ) \
+ extF80_add$(OBJ) \
+ extF80_sub$(OBJ) \
+ extF80_mul$(OBJ) \
+ extF80_div$(OBJ) \
+ extF80_rem$(OBJ) \
+ extF80_sqrt$(OBJ) \
+ extF80_eq$(OBJ) \
+ extF80_le$(OBJ) \
+ extF80_lt$(OBJ) \
+ extF80_eq_signaling$(OBJ) \
+ extF80_le_quiet$(OBJ) \
+ extF80_lt_quiet$(OBJ) \
+ extF80_isSignalingNaN$(OBJ) \
+ extF80M_to_ui32$(OBJ) \
+ extF80M_to_ui64$(OBJ) \
+ extF80M_to_i32$(OBJ) \
+ extF80M_to_i64$(OBJ) \
+ extF80M_to_ui32_r_minMag$(OBJ) \
+ extF80M_to_ui64_r_minMag$(OBJ) \
+ extF80M_to_i32_r_minMag$(OBJ) \
+ extF80M_to_i64_r_minMag$(OBJ) \
+ extF80M_to_f16$(OBJ) \
+ extF80M_to_f32$(OBJ) \
+ extF80M_to_f64$(OBJ) \
+ extF80M_to_f128M$(OBJ) \
+ extF80M_roundToInt$(OBJ) \
+ extF80M_add$(OBJ) \
+ extF80M_sub$(OBJ) \
+ extF80M_mul$(OBJ) \
+ extF80M_div$(OBJ) \
+ extF80M_rem$(OBJ) \
+ extF80M_sqrt$(OBJ) \
+ extF80M_eq$(OBJ) \
+ extF80M_le$(OBJ) \
+ extF80M_lt$(OBJ) \
+ extF80M_eq_signaling$(OBJ) \
+ extF80M_le_quiet$(OBJ) \
+ extF80M_lt_quiet$(OBJ) \
+ f128_to_ui32$(OBJ) \
+ f128_to_ui64$(OBJ) \
+ f128_to_i32$(OBJ) \
+ f128_to_i64$(OBJ) \
+ f128_to_ui32_r_minMag$(OBJ) \
+ f128_to_ui64_r_minMag$(OBJ) \
+ f128_to_i32_r_minMag$(OBJ) \
+ f128_to_i64_r_minMag$(OBJ) \
+ f128_to_f16$(OBJ) \
+ f128_to_f32$(OBJ) \
+ f128_to_extF80$(OBJ) \
+ f128_to_f64$(OBJ) \
+ f128_roundToInt$(OBJ) \
+ f128_add$(OBJ) \
+ f128_sub$(OBJ) \
+ f128_mul$(OBJ) \
+ f128_mulAdd$(OBJ) \
+ f128_div$(OBJ) \
+ f128_rem$(OBJ) \
+ f128_sqrt$(OBJ) \
+ f128_eq$(OBJ) \
+ f128_le$(OBJ) \
+ f128_lt$(OBJ) \
+ f128_eq_signaling$(OBJ) \
+ f128_le_quiet$(OBJ) \
+ f128_lt_quiet$(OBJ) \
+ f128_isSignalingNaN$(OBJ) \
+ f128M_to_ui32$(OBJ) \
+ f128M_to_ui64$(OBJ) \
+ f128M_to_i32$(OBJ) \
+ f128M_to_i64$(OBJ) \
+ f128M_to_ui32_r_minMag$(OBJ) \
+ f128M_to_ui64_r_minMag$(OBJ) \
+ f128M_to_i32_r_minMag$(OBJ) \
+ f128M_to_i64_r_minMag$(OBJ) \
+ f128M_to_f16$(OBJ) \
+ f128M_to_f32$(OBJ) \
+ f128M_to_extF80M$(OBJ) \
+ f128M_to_f64$(OBJ) \
+ f128M_roundToInt$(OBJ) \
+ f128M_add$(OBJ) \
+ f128M_sub$(OBJ) \
+ f128M_mul$(OBJ) \
+ f128M_mulAdd$(OBJ) \
+ f128M_div$(OBJ) \
+ f128M_rem$(OBJ) \
+ f128M_sqrt$(OBJ) \
+ f128M_eq$(OBJ) \
+ f128M_le$(OBJ) \
+ f128M_lt$(OBJ) \
+ f128M_eq_signaling$(OBJ) \
+ f128M_le_quiet$(OBJ) \
+ f128M_lt_quiet$(OBJ) \
+
+OBJS_ALL = $(OBJS_PRIMITIVES) $(OBJS_SPECIALIZE) $(OBJS_OTHERS)
+
+$(OBJS_ALL): \
+ $(OTHER_HEADERS) platform.h $(SOURCE_DIR)/include/primitiveTypes.h \
+ $(SOURCE_DIR)/include/primitives.h
+$(OBJS_SPECIALIZE) $(OBJS_OTHERS): \
+ $(SOURCE_DIR)/include/softfloat_types.h $(SOURCE_DIR)/include/internals.h \
+ $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/specialize.h \
+ $(SOURCE_DIR)/include/softfloat.h
+
+$(OBJS_PRIMITIVES) $(OBJS_OTHERS): %$(OBJ): $(SOURCE_DIR)/%.c
+ $(COMPILE_C) $(SOURCE_DIR)/$*.c
+
+$(OBJS_SPECIALIZE): %$(OBJ): $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/%.c
+ $(COMPILE_C) $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/$*.c
+
+softfloat$(LIB): $(OBJS_ALL)
+ $(DELETE) $@
+ $(MAKELIB) $^
+
+.PHONY: clean
+clean:
+ $(DELETE) $(OBJS_ALL) softfloat$(LIB)
+
diff --git a/softfloat/build/Win64-MinGW-w64/platform.h b/softfloat/build/Win64-MinGW-w64/platform.h
new file mode 100644
index 0000000..c5e06f8
--- /dev/null
+++ b/softfloat/build/Win64-MinGW-w64/platform.h
@@ -0,0 +1,54 @@
+
+/*============================================================================
+
+This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the
+University of California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+#define LITTLEENDIAN 1
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+#ifdef __GNUC_STDC_INLINE__
+#define INLINE inline
+#else
+#define INLINE extern inline
+#endif
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+#define SOFTFLOAT_BUILTIN_CLZ 1
+#define SOFTFLOAT_INTRINSIC_INT128 1
+#include "opts-GCC.h"
+
diff --git a/softfloat/build/template-FAST_INT64/Makefile b/softfloat/build/template-FAST_INT64/Makefile
new file mode 100644
index 0000000..78e7ff5
--- /dev/null
+++ b/softfloat/build/template-FAST_INT64/Makefile
@@ -0,0 +1,391 @@
+
+#=============================================================================
+#
+# This Makefile template is part of the SoftFloat IEEE Floating-Point
+# Arithmetic Package, Release 3e, by John R. Hauser.
+#
+# Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the
+# University of California. All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+# 1. Redistributions of source code must retain the above copyright notice,
+# this list of conditions, and the following disclaimer.
+#
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions, and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+#
+# 3. Neither the name of the University nor the names of its contributors
+# may be used to endorse or promote products derived from this software
+# without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+# EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+# DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#=============================================================================
+
+# Edit lines marked with `==>'. See "SoftFloat-source.html".
+
+==> SOURCE_DIR ?= ../../source
+==> SPECIALIZE_TYPE ?= 8086
+
+==> SOFTFLOAT_OPTS ?= \
+==> -DSOFTFLOAT_ROUND_ODD -DINLINE_LEVEL=5 -DSOFTFLOAT_FAST_DIV32TO16 \
+==> -DSOFTFLOAT_FAST_DIV64TO32
+
+==> DELETE = rm -f
+==> C_INCLUDES = -I. -I$(SOURCE_DIR)/$(SPECIALIZE_TYPE) -I$(SOURCE_DIR)/include
+==> COMPILE_C = \
+==> cc -c -DSOFTFLOAT_FAST_INT64 $(SOFTFLOAT_OPTS) $(C_INCLUDES) -O2 -o $@
+==> MAKELIB = ar crs $@
+
+==> OBJ = .o
+==> LIB = .a
+
+==> OTHER_HEADERS =
+
+.PHONY: all
+all: softfloat$(LIB)
+
+OBJS_PRIMITIVES = \
+ s_eq128$(OBJ) \
+ s_le128$(OBJ) \
+ s_lt128$(OBJ) \
+ s_shortShiftLeft128$(OBJ) \
+ s_shortShiftRight128$(OBJ) \
+ s_shortShiftRightJam64$(OBJ) \
+ s_shortShiftRightJam64Extra$(OBJ) \
+ s_shortShiftRightJam128$(OBJ) \
+ s_shortShiftRightJam128Extra$(OBJ) \
+ s_shiftRightJam32$(OBJ) \
+ s_shiftRightJam64$(OBJ) \
+ s_shiftRightJam64Extra$(OBJ) \
+ s_shiftRightJam128$(OBJ) \
+ s_shiftRightJam128Extra$(OBJ) \
+ s_shiftRightJam256M$(OBJ) \
+ s_countLeadingZeros8$(OBJ) \
+ s_countLeadingZeros16$(OBJ) \
+ s_countLeadingZeros32$(OBJ) \
+ s_countLeadingZeros64$(OBJ) \
+ s_add128$(OBJ) \
+ s_add256M$(OBJ) \
+ s_sub128$(OBJ) \
+ s_sub256M$(OBJ) \
+ s_mul64ByShifted32To128$(OBJ) \
+ s_mul64To128$(OBJ) \
+ s_mul128By32$(OBJ) \
+ s_mul128To256M$(OBJ) \
+ s_approxRecip_1Ks$(OBJ) \
+ s_approxRecip32_1$(OBJ) \
+ s_approxRecipSqrt_1Ks$(OBJ) \
+ s_approxRecipSqrt32_1$(OBJ) \
+
+OBJS_SPECIALIZE = \
+ softfloat_raiseFlags$(OBJ) \
+ s_f16UIToCommonNaN$(OBJ) \
+ s_commonNaNToF16UI$(OBJ) \
+ s_propagateNaNF16UI$(OBJ) \
+ s_f32UIToCommonNaN$(OBJ) \
+ s_commonNaNToF32UI$(OBJ) \
+ s_propagateNaNF32UI$(OBJ) \
+ s_f64UIToCommonNaN$(OBJ) \
+ s_commonNaNToF64UI$(OBJ) \
+ s_propagateNaNF64UI$(OBJ) \
+ extF80M_isSignalingNaN$(OBJ) \
+ s_extF80UIToCommonNaN$(OBJ) \
+ s_commonNaNToExtF80UI$(OBJ) \
+ s_propagateNaNExtF80UI$(OBJ) \
+ f128M_isSignalingNaN$(OBJ) \
+ s_f128UIToCommonNaN$(OBJ) \
+ s_commonNaNToF128UI$(OBJ) \
+ s_propagateNaNF128UI$(OBJ) \
+
+OBJS_OTHERS = \
+ s_roundToUI32$(OBJ) \
+ s_roundToUI64$(OBJ) \
+ s_roundToI32$(OBJ) \
+ s_roundToI64$(OBJ) \
+ s_normSubnormalF16Sig$(OBJ) \
+ s_roundPackToF16$(OBJ) \
+ s_normRoundPackToF16$(OBJ) \
+ s_addMagsF16$(OBJ) \
+ s_subMagsF16$(OBJ) \
+ s_mulAddF16$(OBJ) \
+ s_normSubnormalF32Sig$(OBJ) \
+ s_roundPackToF32$(OBJ) \
+ s_normRoundPackToF32$(OBJ) \
+ s_addMagsF32$(OBJ) \
+ s_subMagsF32$(OBJ) \
+ s_mulAddF32$(OBJ) \
+ s_normSubnormalF64Sig$(OBJ) \
+ s_roundPackToF64$(OBJ) \
+ s_normRoundPackToF64$(OBJ) \
+ s_addMagsF64$(OBJ) \
+ s_subMagsF64$(OBJ) \
+ s_mulAddF64$(OBJ) \
+ s_normSubnormalExtF80Sig$(OBJ) \
+ s_roundPackToExtF80$(OBJ) \
+ s_normRoundPackToExtF80$(OBJ) \
+ s_addMagsExtF80$(OBJ) \
+ s_subMagsExtF80$(OBJ) \
+ s_normSubnormalF128Sig$(OBJ) \
+ s_roundPackToF128$(OBJ) \
+ s_normRoundPackToF128$(OBJ) \
+ s_addMagsF128$(OBJ) \
+ s_subMagsF128$(OBJ) \
+ s_mulAddF128$(OBJ) \
+ softfloat_state$(OBJ) \
+ ui32_to_f16$(OBJ) \
+ ui32_to_f32$(OBJ) \
+ ui32_to_f64$(OBJ) \
+ ui32_to_extF80$(OBJ) \
+ ui32_to_extF80M$(OBJ) \
+ ui32_to_f128$(OBJ) \
+ ui32_to_f128M$(OBJ) \
+ ui64_to_f16$(OBJ) \
+ ui64_to_f32$(OBJ) \
+ ui64_to_f64$(OBJ) \
+ ui64_to_extF80$(OBJ) \
+ ui64_to_extF80M$(OBJ) \
+ ui64_to_f128$(OBJ) \
+ ui64_to_f128M$(OBJ) \
+ i32_to_f16$(OBJ) \
+ i32_to_f32$(OBJ) \
+ i32_to_f64$(OBJ) \
+ i32_to_extF80$(OBJ) \
+ i32_to_extF80M$(OBJ) \
+ i32_to_f128$(OBJ) \
+ i32_to_f128M$(OBJ) \
+ i64_to_f16$(OBJ) \
+ i64_to_f32$(OBJ) \
+ i64_to_f64$(OBJ) \
+ i64_to_extF80$(OBJ) \
+ i64_to_extF80M$(OBJ) \
+ i64_to_f128$(OBJ) \
+ i64_to_f128M$(OBJ) \
+ f16_to_ui32$(OBJ) \
+ f16_to_ui64$(OBJ) \
+ f16_to_i32$(OBJ) \
+ f16_to_i64$(OBJ) \
+ f16_to_ui32_r_minMag$(OBJ) \
+ f16_to_ui64_r_minMag$(OBJ) \
+ f16_to_i32_r_minMag$(OBJ) \
+ f16_to_i64_r_minMag$(OBJ) \
+ f16_to_f32$(OBJ) \
+ f16_to_f64$(OBJ) \
+ f16_to_extF80$(OBJ) \
+ f16_to_extF80M$(OBJ) \
+ f16_to_f128$(OBJ) \
+ f16_to_f128M$(OBJ) \
+ f16_roundToInt$(OBJ) \
+ f16_add$(OBJ) \
+ f16_sub$(OBJ) \
+ f16_mul$(OBJ) \
+ f16_mulAdd$(OBJ) \
+ f16_div$(OBJ) \
+ f16_rem$(OBJ) \
+ f16_sqrt$(OBJ) \
+ f16_eq$(OBJ) \
+ f16_le$(OBJ) \
+ f16_lt$(OBJ) \
+ f16_eq_signaling$(OBJ) \
+ f16_le_quiet$(OBJ) \
+ f16_lt_quiet$(OBJ) \
+ f16_isSignalingNaN$(OBJ) \
+ f32_to_ui32$(OBJ) \
+ f32_to_ui64$(OBJ) \
+ f32_to_i32$(OBJ) \
+ f32_to_i64$(OBJ) \
+ f32_to_ui32_r_minMag$(OBJ) \
+ f32_to_ui64_r_minMag$(OBJ) \
+ f32_to_i32_r_minMag$(OBJ) \
+ f32_to_i64_r_minMag$(OBJ) \
+ f32_to_f16$(OBJ) \
+ f32_to_f64$(OBJ) \
+ f32_to_extF80$(OBJ) \
+ f32_to_extF80M$(OBJ) \
+ f32_to_f128$(OBJ) \
+ f32_to_f128M$(OBJ) \
+ f32_roundToInt$(OBJ) \
+ f32_add$(OBJ) \
+ f32_sub$(OBJ) \
+ f32_mul$(OBJ) \
+ f32_mulAdd$(OBJ) \
+ f32_div$(OBJ) \
+ f32_rem$(OBJ) \
+ f32_sqrt$(OBJ) \
+ f32_eq$(OBJ) \
+ f32_le$(OBJ) \
+ f32_lt$(OBJ) \
+ f32_eq_signaling$(OBJ) \
+ f32_le_quiet$(OBJ) \
+ f32_lt_quiet$(OBJ) \
+ f32_isSignalingNaN$(OBJ) \
+ f64_to_ui32$(OBJ) \
+ f64_to_ui64$(OBJ) \
+ f64_to_i32$(OBJ) \
+ f64_to_i64$(OBJ) \
+ f64_to_ui32_r_minMag$(OBJ) \
+ f64_to_ui64_r_minMag$(OBJ) \
+ f64_to_i32_r_minMag$(OBJ) \
+ f64_to_i64_r_minMag$(OBJ) \
+ f64_to_f16$(OBJ) \
+ f64_to_f32$(OBJ) \
+ f64_to_extF80$(OBJ) \
+ f64_to_extF80M$(OBJ) \
+ f64_to_f128$(OBJ) \
+ f64_to_f128M$(OBJ) \
+ f64_roundToInt$(OBJ) \
+ f64_add$(OBJ) \
+ f64_sub$(OBJ) \
+ f64_mul$(OBJ) \
+ f64_mulAdd$(OBJ) \
+ f64_div$(OBJ) \
+ f64_rem$(OBJ) \
+ f64_sqrt$(OBJ) \
+ f64_eq$(OBJ) \
+ f64_le$(OBJ) \
+ f64_lt$(OBJ) \
+ f64_eq_signaling$(OBJ) \
+ f64_le_quiet$(OBJ) \
+ f64_lt_quiet$(OBJ) \
+ f64_isSignalingNaN$(OBJ) \
+ extF80_to_ui32$(OBJ) \
+ extF80_to_ui64$(OBJ) \
+ extF80_to_i32$(OBJ) \
+ extF80_to_i64$(OBJ) \
+ extF80_to_ui32_r_minMag$(OBJ) \
+ extF80_to_ui64_r_minMag$(OBJ) \
+ extF80_to_i32_r_minMag$(OBJ) \
+ extF80_to_i64_r_minMag$(OBJ) \
+ extF80_to_f16$(OBJ) \
+ extF80_to_f32$(OBJ) \
+ extF80_to_f64$(OBJ) \
+ extF80_to_f128$(OBJ) \
+ extF80_roundToInt$(OBJ) \
+ extF80_add$(OBJ) \
+ extF80_sub$(OBJ) \
+ extF80_mul$(OBJ) \
+ extF80_div$(OBJ) \
+ extF80_rem$(OBJ) \
+ extF80_sqrt$(OBJ) \
+ extF80_eq$(OBJ) \
+ extF80_le$(OBJ) \
+ extF80_lt$(OBJ) \
+ extF80_eq_signaling$(OBJ) \
+ extF80_le_quiet$(OBJ) \
+ extF80_lt_quiet$(OBJ) \
+ extF80_isSignalingNaN$(OBJ) \
+ extF80M_to_ui32$(OBJ) \
+ extF80M_to_ui64$(OBJ) \
+ extF80M_to_i32$(OBJ) \
+ extF80M_to_i64$(OBJ) \
+ extF80M_to_ui32_r_minMag$(OBJ) \
+ extF80M_to_ui64_r_minMag$(OBJ) \
+ extF80M_to_i32_r_minMag$(OBJ) \
+ extF80M_to_i64_r_minMag$(OBJ) \
+ extF80M_to_f16$(OBJ) \
+ extF80M_to_f32$(OBJ) \
+ extF80M_to_f64$(OBJ) \
+ extF80M_to_f128M$(OBJ) \
+ extF80M_roundToInt$(OBJ) \
+ extF80M_add$(OBJ) \
+ extF80M_sub$(OBJ) \
+ extF80M_mul$(OBJ) \
+ extF80M_div$(OBJ) \
+ extF80M_rem$(OBJ) \
+ extF80M_sqrt$(OBJ) \
+ extF80M_eq$(OBJ) \
+ extF80M_le$(OBJ) \
+ extF80M_lt$(OBJ) \
+ extF80M_eq_signaling$(OBJ) \
+ extF80M_le_quiet$(OBJ) \
+ extF80M_lt_quiet$(OBJ) \
+ f128_to_ui32$(OBJ) \
+ f128_to_ui64$(OBJ) \
+ f128_to_i32$(OBJ) \
+ f128_to_i64$(OBJ) \
+ f128_to_ui32_r_minMag$(OBJ) \
+ f128_to_ui64_r_minMag$(OBJ) \
+ f128_to_i32_r_minMag$(OBJ) \
+ f128_to_i64_r_minMag$(OBJ) \
+ f128_to_f16$(OBJ) \
+ f128_to_f32$(OBJ) \
+ f128_to_extF80$(OBJ) \
+ f128_to_f64$(OBJ) \
+ f128_roundToInt$(OBJ) \
+ f128_add$(OBJ) \
+ f128_sub$(OBJ) \
+ f128_mul$(OBJ) \
+ f128_mulAdd$(OBJ) \
+ f128_div$(OBJ) \
+ f128_rem$(OBJ) \
+ f128_sqrt$(OBJ) \
+ f128_eq$(OBJ) \
+ f128_le$(OBJ) \
+ f128_lt$(OBJ) \
+ f128_eq_signaling$(OBJ) \
+ f128_le_quiet$(OBJ) \
+ f128_lt_quiet$(OBJ) \
+ f128_isSignalingNaN$(OBJ) \
+ f128M_to_ui32$(OBJ) \
+ f128M_to_ui64$(OBJ) \
+ f128M_to_i32$(OBJ) \
+ f128M_to_i64$(OBJ) \
+ f128M_to_ui32_r_minMag$(OBJ) \
+ f128M_to_ui64_r_minMag$(OBJ) \
+ f128M_to_i32_r_minMag$(OBJ) \
+ f128M_to_i64_r_minMag$(OBJ) \
+ f128M_to_f16$(OBJ) \
+ f128M_to_f32$(OBJ) \
+ f128M_to_extF80M$(OBJ) \
+ f128M_to_f64$(OBJ) \
+ f128M_roundToInt$(OBJ) \
+ f128M_add$(OBJ) \
+ f128M_sub$(OBJ) \
+ f128M_mul$(OBJ) \
+ f128M_mulAdd$(OBJ) \
+ f128M_div$(OBJ) \
+ f128M_rem$(OBJ) \
+ f128M_sqrt$(OBJ) \
+ f128M_eq$(OBJ) \
+ f128M_le$(OBJ) \
+ f128M_lt$(OBJ) \
+ f128M_eq_signaling$(OBJ) \
+ f128M_le_quiet$(OBJ) \
+ f128M_lt_quiet$(OBJ) \
+
+OBJS_ALL = $(OBJS_PRIMITIVES) $(OBJS_SPECIALIZE) $(OBJS_OTHERS)
+
+$(OBJS_ALL): \
+ $(OTHER_HEADERS) platform.h $(SOURCE_DIR)/include/primitiveTypes.h \
+ $(SOURCE_DIR)/include/primitives.h
+$(OBJS_SPECIALIZE) $(OBJS_OTHERS): \
+ $(SOURCE_DIR)/include/softfloat_types.h $(SOURCE_DIR)/include/internals.h \
+ $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/specialize.h \
+ $(SOURCE_DIR)/include/softfloat.h
+
+$(OBJS_PRIMITIVES) $(OBJS_OTHERS): %$(OBJ): $(SOURCE_DIR)/%.c
+ $(COMPILE_C) $(SOURCE_DIR)/$*.c
+
+$(OBJS_SPECIALIZE): %$(OBJ): $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/%.c
+ $(COMPILE_C) $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/$*.c
+
+softfloat$(LIB): $(OBJS_ALL)
+ $(DELETE) $@
+ $(MAKELIB) $^
+
+.PHONY: clean
+clean:
+ $(DELETE) $(OBJS_ALL) softfloat$(LIB)
+
diff --git a/softfloat/build/template-FAST_INT64/platform.h b/softfloat/build/template-FAST_INT64/platform.h
new file mode 100644
index 0000000..2094658
--- /dev/null
+++ b/softfloat/build/template-FAST_INT64/platform.h
@@ -0,0 +1,50 @@
+
+/*============================================================================
+
+This C header template is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+// Edit lines marked with `==>'. See "SoftFloat-source.html".
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+==> #define LITTLEENDIAN 1
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+==> #define INLINE inline
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+==> #define THREAD_LOCAL _Thread_local
+
diff --git a/softfloat/build/template-not-FAST_INT64/Makefile b/softfloat/build/template-not-FAST_INT64/Makefile
new file mode 100644
index 0000000..48b2cd6
--- /dev/null
+++ b/softfloat/build/template-not-FAST_INT64/Makefile
@@ -0,0 +1,325 @@
+
+#=============================================================================
+#
+# This Makefile template is part of the SoftFloat IEEE Floating-Point
+# Arithmetic Package, Release 3e, by John R. Hauser.
+#
+# Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the
+# University of California. All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+# 1. Redistributions of source code must retain the above copyright notice,
+# this list of conditions, and the following disclaimer.
+#
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions, and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+#
+# 3. Neither the name of the University nor the names of its contributors
+# may be used to endorse or promote products derived from this software
+# without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+# EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+# DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#=============================================================================
+
+# Edit lines marked with `==>'. See "SoftFloat-source.html".
+
+==> SOURCE_DIR ?= ../../source
+==> SPECIALIZE_TYPE ?= 8086
+
+==> SOFTFLOAT_OPTS ?= \
+==> -DSOFTFLOAT_ROUND_ODD -DINLINE_LEVEL=5 -DSOFTFLOAT_FAST_DIV32TO16 \
+==> -DSOFTFLOAT_FAST_DIV64TO32
+
+==> DELETE = rm -f
+==> C_INCLUDES = -I. -I$(SOURCE_DIR)/$(SPECIALIZE_TYPE) -I$(SOURCE_DIR)/include
+==> COMPILE_C = cc -c $(SOFTFLOAT_OPTS) $(C_INCLUDES) -O2 -o $@
+==> MAKELIB = ar crs $@
+
+==> OBJ = .o
+==> LIB = .a
+
+==> OTHER_HEADERS =
+
+.PHONY: all
+all: softfloat$(LIB)
+
+OBJS_PRIMITIVES = \
+ s_compare96M$(OBJ) \
+ s_compare128M$(OBJ) \
+ s_shortShiftLeft64To96M$(OBJ) \
+ s_shortShiftLeftM$(OBJ) \
+ s_shiftLeftM$(OBJ) \
+ s_shortShiftRightM$(OBJ) \
+ s_shortShiftRightJam64$(OBJ) \
+ s_shortShiftRightJamM$(OBJ) \
+ s_shiftRightJam32$(OBJ) \
+ s_shiftRightJam64$(OBJ) \
+ s_shiftRightJamM$(OBJ) \
+ s_shiftRightM$(OBJ) \
+ s_countLeadingZeros8$(OBJ) \
+ s_countLeadingZeros16$(OBJ) \
+ s_countLeadingZeros32$(OBJ) \
+ s_countLeadingZeros64$(OBJ) \
+ s_addM$(OBJ) \
+ s_addCarryM$(OBJ) \
+ s_addComplCarryM$(OBJ) \
+ s_negXM$(OBJ) \
+ s_sub1XM$(OBJ) \
+ s_subM$(OBJ) \
+ s_mul64To128M$(OBJ) \
+ s_mul128MTo256M$(OBJ) \
+ s_approxRecip_1Ks$(OBJ) \
+ s_approxRecip32_1$(OBJ) \
+ s_approxRecipSqrt_1Ks$(OBJ) \
+ s_approxRecipSqrt32_1$(OBJ) \
+ s_remStepMBy32$(OBJ) \
+
+OBJS_SPECIALIZE = \
+ softfloat_raiseFlags$(OBJ) \
+ s_f16UIToCommonNaN$(OBJ) \
+ s_commonNaNToF16UI$(OBJ) \
+ s_propagateNaNF16UI$(OBJ) \
+ s_f32UIToCommonNaN$(OBJ) \
+ s_commonNaNToF32UI$(OBJ) \
+ s_propagateNaNF32UI$(OBJ) \
+ s_f64UIToCommonNaN$(OBJ) \
+ s_commonNaNToF64UI$(OBJ) \
+ s_propagateNaNF64UI$(OBJ) \
+ extF80M_isSignalingNaN$(OBJ) \
+ s_extF80MToCommonNaN$(OBJ) \
+ s_commonNaNToExtF80M$(OBJ) \
+ s_propagateNaNExtF80M$(OBJ) \
+ f128M_isSignalingNaN$(OBJ) \
+ s_f128MToCommonNaN$(OBJ) \
+ s_commonNaNToF128M$(OBJ) \
+ s_propagateNaNF128M$(OBJ) \
+
+OBJS_OTHERS = \
+ s_roundToUI32$(OBJ) \
+ s_roundMToUI64$(OBJ) \
+ s_roundToI32$(OBJ) \
+ s_roundMToI64$(OBJ) \
+ s_normSubnormalF16Sig$(OBJ) \
+ s_roundPackToF16$(OBJ) \
+ s_normRoundPackToF16$(OBJ) \
+ s_addMagsF16$(OBJ) \
+ s_subMagsF16$(OBJ) \
+ s_mulAddF16$(OBJ) \
+ s_normSubnormalF32Sig$(OBJ) \
+ s_roundPackToF32$(OBJ) \
+ s_normRoundPackToF32$(OBJ) \
+ s_addMagsF32$(OBJ) \
+ s_subMagsF32$(OBJ) \
+ s_mulAddF32$(OBJ) \
+ s_normSubnormalF64Sig$(OBJ) \
+ s_roundPackToF64$(OBJ) \
+ s_normRoundPackToF64$(OBJ) \
+ s_addMagsF64$(OBJ) \
+ s_subMagsF64$(OBJ) \
+ s_mulAddF64$(OBJ) \
+ s_tryPropagateNaNExtF80M$(OBJ) \
+ s_invalidExtF80M$(OBJ) \
+ s_normExtF80SigM$(OBJ) \
+ s_roundPackMToExtF80M$(OBJ) \
+ s_normRoundPackMToExtF80M$(OBJ) \
+ s_addExtF80M$(OBJ) \
+ s_compareNonnormExtF80M$(OBJ) \
+ s_isNaNF128M$(OBJ) \
+ s_tryPropagateNaNF128M$(OBJ) \
+ s_invalidF128M$(OBJ) \
+ s_shiftNormSigF128M$(OBJ) \
+ s_roundPackMToF128M$(OBJ) \
+ s_normRoundPackMToF128M$(OBJ) \
+ s_addF128M$(OBJ) \
+ s_mulAddF128M$(OBJ) \
+ softfloat_state$(OBJ) \
+ ui32_to_f16$(OBJ) \
+ ui32_to_f32$(OBJ) \
+ ui32_to_f64$(OBJ) \
+ ui32_to_extF80M$(OBJ) \
+ ui32_to_f128M$(OBJ) \
+ ui64_to_f16$(OBJ) \
+ ui64_to_f32$(OBJ) \
+ ui64_to_f64$(OBJ) \
+ ui64_to_extF80M$(OBJ) \
+ ui64_to_f128M$(OBJ) \
+ i32_to_f16$(OBJ) \
+ i32_to_f32$(OBJ) \
+ i32_to_f64$(OBJ) \
+ i32_to_extF80M$(OBJ) \
+ i32_to_f128M$(OBJ) \
+ i64_to_f16$(OBJ) \
+ i64_to_f32$(OBJ) \
+ i64_to_f64$(OBJ) \
+ i64_to_extF80M$(OBJ) \
+ i64_to_f128M$(OBJ) \
+ f16_to_ui32$(OBJ) \
+ f16_to_ui64$(OBJ) \
+ f16_to_i32$(OBJ) \
+ f16_to_i64$(OBJ) \
+ f16_to_ui32_r_minMag$(OBJ) \
+ f16_to_ui64_r_minMag$(OBJ) \
+ f16_to_i32_r_minMag$(OBJ) \
+ f16_to_i64_r_minMag$(OBJ) \
+ f16_to_f32$(OBJ) \
+ f16_to_f64$(OBJ) \
+ f16_to_extF80M$(OBJ) \
+ f16_to_f128M$(OBJ) \
+ f16_roundToInt$(OBJ) \
+ f16_add$(OBJ) \
+ f16_sub$(OBJ) \
+ f16_mul$(OBJ) \
+ f16_mulAdd$(OBJ) \
+ f16_div$(OBJ) \
+ f16_rem$(OBJ) \
+ f16_sqrt$(OBJ) \
+ f16_eq$(OBJ) \
+ f16_le$(OBJ) \
+ f16_lt$(OBJ) \
+ f16_eq_signaling$(OBJ) \
+ f16_le_quiet$(OBJ) \
+ f16_lt_quiet$(OBJ) \
+ f16_isSignalingNaN$(OBJ) \
+ f32_to_ui32$(OBJ) \
+ f32_to_ui64$(OBJ) \
+ f32_to_i32$(OBJ) \
+ f32_to_i64$(OBJ) \
+ f32_to_ui32_r_minMag$(OBJ) \
+ f32_to_ui64_r_minMag$(OBJ) \
+ f32_to_i32_r_minMag$(OBJ) \
+ f32_to_i64_r_minMag$(OBJ) \
+ f32_to_f16$(OBJ) \
+ f32_to_f64$(OBJ) \
+ f32_to_extF80M$(OBJ) \
+ f32_to_f128M$(OBJ) \
+ f32_roundToInt$(OBJ) \
+ f32_add$(OBJ) \
+ f32_sub$(OBJ) \
+ f32_mul$(OBJ) \
+ f32_mulAdd$(OBJ) \
+ f32_div$(OBJ) \
+ f32_rem$(OBJ) \
+ f32_sqrt$(OBJ) \
+ f32_eq$(OBJ) \
+ f32_le$(OBJ) \
+ f32_lt$(OBJ) \
+ f32_eq_signaling$(OBJ) \
+ f32_le_quiet$(OBJ) \
+ f32_lt_quiet$(OBJ) \
+ f32_isSignalingNaN$(OBJ) \
+ f64_to_ui32$(OBJ) \
+ f64_to_ui64$(OBJ) \
+ f64_to_i32$(OBJ) \
+ f64_to_i64$(OBJ) \
+ f64_to_ui32_r_minMag$(OBJ) \
+ f64_to_ui64_r_minMag$(OBJ) \
+ f64_to_i32_r_minMag$(OBJ) \
+ f64_to_i64_r_minMag$(OBJ) \
+ f64_to_f16$(OBJ) \
+ f64_to_f32$(OBJ) \
+ f64_to_extF80M$(OBJ) \
+ f64_to_f128M$(OBJ) \
+ f64_roundToInt$(OBJ) \
+ f64_add$(OBJ) \
+ f64_sub$(OBJ) \
+ f64_mul$(OBJ) \
+ f64_mulAdd$(OBJ) \
+ f64_div$(OBJ) \
+ f64_rem$(OBJ) \
+ f64_sqrt$(OBJ) \
+ f64_eq$(OBJ) \
+ f64_le$(OBJ) \
+ f64_lt$(OBJ) \
+ f64_eq_signaling$(OBJ) \
+ f64_le_quiet$(OBJ) \
+ f64_lt_quiet$(OBJ) \
+ f64_isSignalingNaN$(OBJ) \
+ extF80M_to_ui32$(OBJ) \
+ extF80M_to_ui64$(OBJ) \
+ extF80M_to_i32$(OBJ) \
+ extF80M_to_i64$(OBJ) \
+ extF80M_to_ui32_r_minMag$(OBJ) \
+ extF80M_to_ui64_r_minMag$(OBJ) \
+ extF80M_to_i32_r_minMag$(OBJ) \
+ extF80M_to_i64_r_minMag$(OBJ) \
+ extF80M_to_f16$(OBJ) \
+ extF80M_to_f32$(OBJ) \
+ extF80M_to_f64$(OBJ) \
+ extF80M_to_f128M$(OBJ) \
+ extF80M_roundToInt$(OBJ) \
+ extF80M_add$(OBJ) \
+ extF80M_sub$(OBJ) \
+ extF80M_mul$(OBJ) \
+ extF80M_div$(OBJ) \
+ extF80M_rem$(OBJ) \
+ extF80M_sqrt$(OBJ) \
+ extF80M_eq$(OBJ) \
+ extF80M_le$(OBJ) \
+ extF80M_lt$(OBJ) \
+ extF80M_eq_signaling$(OBJ) \
+ extF80M_le_quiet$(OBJ) \
+ extF80M_lt_quiet$(OBJ) \
+ f128M_to_ui32$(OBJ) \
+ f128M_to_ui64$(OBJ) \
+ f128M_to_i32$(OBJ) \
+ f128M_to_i64$(OBJ) \
+ f128M_to_ui32_r_minMag$(OBJ) \
+ f128M_to_ui64_r_minMag$(OBJ) \
+ f128M_to_i32_r_minMag$(OBJ) \
+ f128M_to_i64_r_minMag$(OBJ) \
+ f128M_to_f16$(OBJ) \
+ f128M_to_f32$(OBJ) \
+ f128M_to_f64$(OBJ) \
+ f128M_to_extF80M$(OBJ) \
+ f128M_roundToInt$(OBJ) \
+ f128M_add$(OBJ) \
+ f128M_sub$(OBJ) \
+ f128M_mul$(OBJ) \
+ f128M_mulAdd$(OBJ) \
+ f128M_div$(OBJ) \
+ f128M_rem$(OBJ) \
+ f128M_sqrt$(OBJ) \
+ f128M_eq$(OBJ) \
+ f128M_le$(OBJ) \
+ f128M_lt$(OBJ) \
+ f128M_eq_signaling$(OBJ) \
+ f128M_le_quiet$(OBJ) \
+ f128M_lt_quiet$(OBJ) \
+
+OBJS_ALL = $(OBJS_PRIMITIVES) $(OBJS_SPECIALIZE) $(OBJS_OTHERS)
+
+$(OBJS_ALL): \
+ $(OTHER_HEADERS) platform.h $(SOURCE_DIR)/include/primitiveTypes.h \
+ $(SOURCE_DIR)/include/primitives.h
+$(OBJS_SPECIALIZE) $(OBJS_OTHERS): \
+ $(SOURCE_DIR)/include/softfloat_types.h $(SOURCE_DIR)/include/internals.h \
+ $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/specialize.h \
+ $(SOURCE_DIR)/include/softfloat.h
+
+$(OBJS_PRIMITIVES) $(OBJS_OTHERS): %$(OBJ): $(SOURCE_DIR)/%.c
+ $(COMPILE_C) $(SOURCE_DIR)/$*.c
+
+$(OBJS_SPECIALIZE): %$(OBJ): $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/%.c
+ $(COMPILE_C) $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/$*.c
+
+softfloat$(LIB): $(OBJS_ALL)
+ $(DELETE) $@
+ $(MAKELIB) $^
+
+.PHONY: clean
+clean:
+ $(DELETE) $(OBJS_ALL) softfloat$(LIB)
+
diff --git a/softfloat/build/template-not-FAST_INT64/platform.h b/softfloat/build/template-not-FAST_INT64/platform.h
new file mode 100644
index 0000000..2094658
--- /dev/null
+++ b/softfloat/build/template-not-FAST_INT64/platform.h
@@ -0,0 +1,50 @@
+
+/*============================================================================
+
+This C header template is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+// Edit lines marked with `==>'. See "SoftFloat-source.html".
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+==> #define LITTLEENDIAN 1
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+==> #define INLINE inline
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+==> #define THREAD_LOCAL _Thread_local
+
diff --git a/softfloat/doc/SoftFloat-history.html b/softfloat/doc/SoftFloat-history.html
new file mode 100644
index 0000000..d81c6bc
--- /dev/null
+++ b/softfloat/doc/SoftFloat-history.html
@@ -0,0 +1,258 @@
+
+
+
+
+Berkeley SoftFloat History
+
+
+
+
+History of Berkeley SoftFloat, to Release 3e
+
+
+John R. Hauser
+2018 January 20
+
+
+
+Release 3e (2018 January)
+
+
+
+-
+Changed the default numeric code for optional rounding mode
odd
+(round to odd, also known as jamming) from 5 to 6.
+
+ -
+Modified the behavior of rounding mode
odd
when rounding to an
+integer value (either conversion to an integer format or a
+‘roundToInt
’ function).
+Previously, for those cases only, rounding mode odd
acted the same
+as rounding to minimum magnitude.
+Now all operations are rounded consistently.
+
+ -
+Fixed some errors in the specialization code modeling Intel x86 floating-point,
+specifically the integers returned on invalid operations and the propagation of
+NaN payloads in a few rare cases.
+
+
-
+Added specialization code modeling ARM floating-point, conforming to VFPv2 or
+later.
+
+
-
+Added an example target for ARM processors.
+
+
-
+Fixed a minor bug whereby function
f16_to_ui64
might return a
+different integer than expected in the case that the floating-point operand is
+negative.
+
+ -
+Added example target-specific optimization for GCC, employing GCC instrinsics
+and support for 128-bit integer arithmetic.
+
+
-
+Made other minor improvements.
+
+
+
+
+Release 3d (2017 August)
+
+
+
+-
+Fixed bugs in the square root functions for 64-bit
+double-precision, 80-bit double-extended-precision, and
+128-bit quadruple-precision.
+For 64-bit double-precision (
f64_sqrt
), the result
+could sometimes be off by 1 unit in the last place
+(1 ulp) from what it should be.
+For the larger formats, the square root could be wrong in a large portion of
+the less-significant bits.
+(A bug in f128_sqrt
was first reported by Alexei Sibidanov.)
+
+
+
+
+Release 3c (2017 February)
+
+
+
+-
+Added optional rounding mode
odd
(round to odd, also known as
+jamming).
+
+ -
+Corrected the documentation concerning non-canonical representations in
+80-bit double-extended-precision.
+
+
+
+
+Release 3b (2016 July)
+
+
+
+-
+Implemented the common 16-bit “half-precision”
+floating-point format (
float16_t
).
+
+ -
+Made the integer values returned on invalid conversions to integer formats
+be determined by the port-specific specialization instead of being the same for
+all ports.
+
+
-
+Added preprocessor macro
THREAD_LOCAL
to allow the floating-point
+state (modes and exception flags) to be made per-thread.
+
+ -
+Modified the provided Makefiles to allow some options to be overridden from the
+
make
command.
+
+ -
+Made other minor improvements.
+
+
+
+
+Release 3a (2015 October)
+
+
+
+-
+Replaced the license text supplied by the University of California, Berkeley.
+
+
+
+
+Release 3 (2015 February)
+
+
+
+-
+Complete rewrite, funded by the University of California, Berkeley, and
+consequently having a different use license than earlier releases.
+Major changes included renaming most types and functions, upgrading some
+algorithms, restructuring the source files, and making SoftFloat into a true
+library.
+
+
-
+Added functions to convert between floating-point and unsigned integers, both
+32-bit and 64-bit (
uint32_t
and
+uint64_t
).
+
+ -
+Added functions for fused multiply-add, for all supported floating-point
+formats except 80-bit double-extended-precision.
+
+
-
+Added support for a fifth rounding mode,
near_maxMag
(round to
+nearest, with ties to maximum magnitude, away from zero).
+
+ -
+Dropped the
timesoftfloat
program (now part of the Berkeley
+TestFloat package).
+
+
+
+
+Release 2c (2015 January)
+
+
+
+-
+Fixed mistakes affecting some 64-bit processors.
+
+
-
+Further improved the documentation and the wording for the legal restrictions
+on using SoftFloat releases through 2c (not applicable to
+Release 3 or later).
+
+
+
+
+Release 2b (2002 May)
+
+
+
+-
+Made minor updates to the documentation, including improved wording for the
+legal restrictions on using SoftFloat.
+
+
+
+
+Release 2a (1998 December)
+
+
+
+-
+Added functions to convert between 64-bit integers
+(
int64
) and all supported floating-point formats.
+
+ -
+Fixed a bug in all 64-bit-version square root functions except
+
float32_sqrt
that caused the result sometimes to be off by
+1 unit in the last place (1 ulp) from what it should
+be.
+(Bug discovered by Paul Donahue.)
+
+ -
+Improved the Makefiles.
+
+
+
+Release 2 (1997 June)
+
+
+
+-
+Created the 64-bit (
bits64
) version, adding the
+floatx80
and float128
formats.
+
+ -
+Changed the source directory structure, splitting the sources into a
+
bits32
and a bits64
version.
+Renamed environment.h
to milieu.h
to avoid confusion
+with environment variables.
+
+ -
+Fixed a small error that caused
float64_round_to_int
often to
+round the wrong way in nearest/even mode when the operand was between
+220 and 221 and halfway between two integers.
+
+
+
+
+Release 1a (1996 July)
+
+
+
+-
+Corrected a mistake that caused borderline underflow cases not to raise the
+underflow flag when they should have.
+(Problem reported by Doug Priest.)
+
+
-
+Added the
float_detect_tininess
variable to control whether
+tininess is detected before or after rounding.
+
+
+
+
+Release 1 (1996 July)
+
+
+
+-
+Original release, based on work done for the International Computer Science
+Institute (ICSI) in Berkeley, California.
+
+
+
+
+
+
diff --git a/softfloat/doc/SoftFloat-source.html b/softfloat/doc/SoftFloat-source.html
new file mode 100644
index 0000000..4ff9d4c
--- /dev/null
+++ b/softfloat/doc/SoftFloat-source.html
@@ -0,0 +1,686 @@
+
+
+
+
+Berkeley SoftFloat Source Documentation
+
+
+
+
+Berkeley SoftFloat Release 3e: Source Documentation
+
+
+John R. Hauser
+2018 January 20
+
+
+
+Contents
+
+
+
+
+
+1. Introduction |
+2. Limitations |
+3. Acknowledgments and License |
+4. SoftFloat Package Directory Structure |
+5. Issues for Porting SoftFloat to a New Target |
+
+ |
+ 5.1. Standard Headers <stdbool.h> and
+ <stdint.h> |
+
+ | 5.2. Specializing Floating-Point Behavior |
+ | 5.3. Macros for Build Options |
+ | 5.4. Adapting a Template Target Directory |
+
+ | 5.5. Target-Specific Optimization of Primitive Functions |
+
+6. Testing SoftFloat |
+
+ 7. Providing SoftFloat as a Common Library for Applications |
+
+8. Contact Information |
+
+
+
+
+1. Introduction
+
+
+This document gives information needed for compiling and/or porting Berkeley
+SoftFloat, a library of C functions implementing binary floating-point
+conforming to the IEEE Standard for Floating-Point Arithmetic.
+For basic documentation about SoftFloat refer to
+SoftFloat.html
.
+
+
+
+The source code for SoftFloat is intended to be relatively machine-independent
+and should be compilable with any ISO-Standard C compiler that also supports
+64-bit integers.
+SoftFloat has been successfully compiled with the GNU C Compiler
+(gcc
) for several platforms.
+
+
+
+Release 3 of SoftFloat was a complete rewrite relative to
+Release 2 or earlier.
+Changes to the interface of SoftFloat functions are documented in
+SoftFloat.html
.
+The current version of SoftFloat is Release 3e.
+
+
+
+2. Limitations
+
+
+SoftFloat assumes the computer has an addressable byte size of either 8 or
+16 bits.
+(Nearly all computers in use today have 8-bit bytes.)
+
+
+
+SoftFloat is written in C and is designed to work with other C code.
+The C compiler used must conform at a minimum to the 1989 ANSI standard for the
+C language (same as the 1990 ISO standard) and must in addition support basic
+arithmetic on 64-bit integers.
+Earlier releases of SoftFloat included implementations of 32-bit
+single-precision and 64-bit double-precision floating-point that
+did not require 64-bit integers, but this option is not supported
+starting with Release 3.
+Since 1999, ISO standards for C have mandated compiler support for
+64-bit integers.
+A compiler conforming to the 1999 C Standard or later is recommended but not
+strictly required.
+
+
+
+C Standard header files <stdbool.h>
and
+<stdint.h>
are required for defining standard Boolean and
+integer types.
+If these headers are not supplied with the C compiler, minimal substitutes must
+be provided.
+SoftFloat’s dependence on these headers is detailed later in
+section 5.1, Standard Headers <stdbool.h>
+and <stdint.h>
.
+
+
+
+3. Acknowledgments and License
+
+
+The SoftFloat package was written by me, John R. Hauser.
+Release 3 of SoftFloat was a completely new implementation
+supplanting earlier releases.
+The project to create Release 3 (now through 3e) was
+done in the employ of the University of California, Berkeley, within the
+Department of Electrical Engineering and Computer Sciences, first for the
+Parallel Computing Laboratory (Par Lab) and then for the ASPIRE Lab.
+The work was officially overseen by Prof. Krste Asanovic, with funding provided
+by these sources:
+
+
+
+
+
+
+Par Lab: |
+ |
+
+Microsoft (Award #024263), Intel (Award #024894), and U.C. Discovery
+(Award #DIG07-10227), with additional support from Par Lab affiliates Nokia,
+NVIDIA, Oracle, and Samsung.
+ |
+
+
+ASPIRE Lab: |
+ |
+
+DARPA PERFECT program (Award #HR0011-12-2-0016), with additional support from
+ASPIRE industrial sponsor Intel and ASPIRE affiliates Google, Nokia, NVIDIA,
+Oracle, and Samsung.
+ |
+
+
+
+
+
+
+The following applies to the whole of SoftFloat Release 3e as well
+as to each source file individually.
+
+
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017, 2018 The Regents of the
+University of California.
+All rights reserved.
+
+
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+
+-
+
+Redistributions of source code must retain the above copyright notice, this
+list of conditions, and the following disclaimer.
+
+
+ -
+
+Redistributions in binary form must reproduce the above copyright notice, this
+list of conditions, and the following disclaimer in the documentation and/or
+other materials provided with the distribution.
+
+
+ -
+
+Neither the name of the University nor the names of its contributors may be
+used to endorse or promote products derived from this software without specific
+prior written permission.
+
+
+
+
+
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS “AS IS”,
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.
+IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+
+
+4. SoftFloat Package Directory Structure
+
+
+Because SoftFloat is targeted to multiple platforms, its source code is
+slightly scattered between target-specific and target-independent directories
+and files.
+The supplied directory structure is as follows:
+
+
+doc
+source
+ include
+ 8086
+ 8086-SSE
+ ARM-VFPv2
+ ARM-VFPv2-defaultNaN
+build
+ template-FAST_INT64
+ template-not-FAST_INT64
+ Linux-386-GCC
+ Linux-386-SSE2-GCC
+ Linux-x86_64-GCC
+ Linux-ARM-VFPv2-GCC
+ Win32-MinGW
+ Win32-SSE2-MinGW
+ Win64-MinGW-w64
+
+
+The majority of the SoftFloat sources are provided in the source
+directory.
+The include
subdirectory contains several header files
+(unsurprisingly), while the other subdirectories of source
contain
+source files that specialize the floating-point behavior to match particular
+processor families:
+
+
+8086
+-
+Intel’s older, 8087-derived floating-point, extended to all supported
+floating-point types
+
+8086-SSE
+-
+Intel’s x86 processors with Streaming SIMD Extensions (SSE) and later
+compatible extensions, having 8087 behavior for 80-bit
+double-extended-precision (
extFloat80_t
) and SSE behavior for
+other floating-point types
+
+ARM-VFPv2
+-
+ARM’s VFPv2 or later floating-point, with NaN payload propagation
+
+ARM-VFPv2-defaultNaN
+-
+ARM’s VFPv2 or later floating-point, with the “default NaN”
+option
+
+
+
+If other specializations are attempted, these would be expected to be other
+subdirectories of source
alongside the ones listed above.
+Specialization is covered later, in section 5.2, Specializing
+Floating-Point Behavior.
+
+
+
+The build
directory is intended to contain a subdirectory for each
+target platform for which a build of the SoftFloat library may be created.
+For each build target, the target’s subdirectory is where all derived
+object files and the completed SoftFloat library (typically
+softfloat.a
or libsoftfloat.a
) are created.
+The two template
subdirectories are not actual build targets but
+contain sample files for creating new target directories.
+(The meaning of FAST_INT64
will be explained later.)
+
+
+
+Ignoring the template
directories, the supplied target directories
+are intended to follow a naming system of
+<execution-environment>-<compiler>
.
+For the example targets,
+<execution-environment>
is
+Linux-386
, Linux-386-SSE2
,
+Linux-x86_64
,
+Linux-ARM-VFPv2
, Win32
,
+Win32-SSE2
, or Win64
, and
+<compiler>
is GCC
,
+MinGW
, or MinGW-w64
.
+
+
+
+All of the supplied target directories are merely examples that may or may not
+be correct for compiling on any particular system.
+Despite requests, there are currently no plans to include and maintain in the
+SoftFloat package the build files needed for a great many users’
+compilation environments, which can span a huge range of operating systems,
+compilers, and other tools.
+
+
+
+As supplied, each target directory contains two files:
+
+
+Makefile
+platform.h
+
+
+The provided Makefile
is written for GNU make
.
+A build of SoftFloat for the specific target is begun by executing the
+make
command with the target directory as the current directory.
+A completely different build tool can be used if an appropriate
+Makefile
equivalent is created.
+
+
+
+The platform.h
header file exists to provide a location for
+additional C declarations specific to the build target.
+Every C source file of SoftFloat contains a #include
for
+platform.h
.
+In many cases, the contents of platform.h
can be as simple as one
+or two lines of code.
+At the other extreme, to get maximal performance from SoftFloat, it may be
+desirable to include in header platform.h
(directly or via
+#include
) declarations for numerous target-specific optimizations.
+Such possibilities are discussed in the next section, Issues for Porting
+SoftFloat to a New Target.
+If the target’s compiler or library has bugs or other shortcomings,
+workarounds for these issues may also be possible with target-specific
+declarations in platform.h
, avoiding the need to modify the main
+SoftFloat sources.
+
+
+
+5. Issues for Porting SoftFloat to a New Target
+
+5.1. Standard Headers <stdbool.h>
and <stdint.h>
+
+
+The SoftFloat sources make use of standard headers
+<stdbool.h>
and <stdint.h>
, which have
+been part of the ISO C Standard Library since 1999.
+With any recent compiler, these standard headers are likely to be supported,
+even if the compiler does not claim complete conformance to the latest ISO C
+Standard.
+For older or nonstandard compilers, substitutes for
+<stdbool.h>
and <stdint.h>
may need to be
+created.
+SoftFloat depends on these names from <stdbool.h>
:
+
+
+bool
+true
+false
+
+
+and on these names from <stdint.h>
:
+
+
+uint16_t
+uint32_t
+uint64_t
+int32_t
+int64_t
+UINT64_C
+INT64_C
+uint_least8_t
+uint_fast8_t
+uint_fast16_t
+uint_fast32_t
+uint_fast64_t
+int_fast8_t
+int_fast16_t
+int_fast32_t
+int_fast64_t
+
+
+
+
+
+5.2. Specializing Floating-Point Behavior
+
+
+The IEEE Floating-Point Standard allows for some flexibility in a conforming
+implementation, particularly concerning NaNs.
+The SoftFloat source
directory is supplied with some
+specialization subdirectories containing possible definitions for this
+implementation-specific behavior.
+For example, the 8086
and 8086-SSE
+subdirectories have source files that specialize SoftFloat’s behavior to
+match that of Intel’s x86 line of processors.
+The files in a specialization subdirectory must determine:
+
+-
+whether tininess for underflow is detected before or after rounding by default;
+
-
+how signaling NaNs are distinguished from quiet NaNs;
+
-
+what (if anything) special happens when exceptions are raised;
+
-
+the default generated quiet NaNs;
+
-
+how NaNs are propagated from function inputs to output; and
+
-
+the integer results returned when conversions to integer type raise the
+invalid exception.
+
+
+
+
+As provided, the build process for a target expects to involve exactly
+one specialization directory that defines all of these
+implementation-specific details for the target.
+A specialization directory such as 8086
is expected to contain a
+header file called specialize.h
, together with whatever other
+source files are needed to complete the specialization.
+
+
+
+A new build target may use an existing specialization, such as the ones
+provided by the 8086
and 8086-SSE
+subdirectories.
+If a build target needs a new specialization, different from any existing ones,
+it is recommended that a new specialization directory be created for this
+purpose.
+The specialize.h
header file from any of the provided
+specialization subdirectories can be used as a model for what definitions are
+needed.
+
+
+
+5.3. Macros for Build Options
+
+
+The SoftFloat source files adapt the floating-point implementation according to
+several C preprocessor macros:
+
+
+LITTLEENDIAN
+-
+Must be defined for little-endian machines; must not be defined for big-endian
+machines.
+
INLINE
+-
+Specifies the sequence of tokens used to indicate that a C function should be
+inlined.
+If macro
INLINE_LEVEL
is defined with a value of 1 or higher, this
+macro must be defined; otherwise, this macro is ignored and need not be
+defined.
+For compilers that conform to the C Standard’s rules for inline
+functions, this macro can be defined as the single keyword inline
.
+For other compilers that follow a convention pre-dating the standardization of
+inline
, this macro may need to be defined to extern
+inline
.
+ THREAD_LOCAL
+-
+Can be defined to a sequence of tokens that, when appearing at the start of a
+variable declaration, indicates to the C compiler that the variable is
+per-thread, meaning that each execution thread gets its own separate
+instance of the variable.
+This macro is used in header
softfloat.h
in the declarations of
+variables softfloat_roundingMode
,
+softfloat_detectTininess
, extF80_roundingPrecision
,
+and softfloat_exceptionFlags
.
+If macro THREAD_LOCAL
is left undefined, these variables will
+default to being ordinary global variables.
+Depending on the compiler, possible valid definitions of this macro include
+_Thread_local
and __thread
.
+
+
+SOFTFLOAT_ROUND_ODD
+-
+Can be defined to enable support for optional rounding mode
+
softfloat_round_odd
.
+
+
+INLINE_LEVEL
+-
+Can be defined to an integer to determine the degree of inlining requested of
+the compiler.
+Larger numbers request that more inlining be done.
+If this macro is not defined or is defined to a value less than 1
+(zero or negative), no inlining is requested.
+The maximum effective value is no higher than 5.
+Defining this macro to a value greater than 5 is the same as defining it
+to 5.
+
SOFTFLOAT_FAST_INT64
+-
+Can be defined to indicate that the build target’s implementation of
+64-bit arithmetic is efficient.
+For newer 64-bit processors, this macro should usually be defined.
+For very small microprocessors whose buses and registers are 8-bit
+or 16-bit in size, this macro should usually not be defined.
+Whether this macro should be defined for a 32-bit processor may
+depend on the target machine and the applications that will use SoftFloat.
+
SOFTFLOAT_FAST_DIV32TO16
+-
+Can be defined to indicate that the target’s division operator
+in C (written as
/
) is reasonably efficient for
+dividing a 32-bit unsigned integer by a 16-bit
+unsigned integer.
+Setting this macro may affect the performance of function f16_div
.
+ SOFTFLOAT_FAST_DIV64TO32
+-
+Can be defined to indicate that the target’s division operator
+in C (written as
/
) is reasonably efficient for
+dividing a 64-bit unsigned integer by a 32-bit
+unsigned integer.
+Setting this macro may affect the performance of division, remainder, and
+square root operations other than f16_div
.
+
+
+
+
+
+Following the usual custom for C, for most of these macros (all
+except INLINE
, THREAD_LOCAL
, and
+INLINE_LEVEL
), the content of any definition is irrelevant;
+what matters is a macro’s effect on #ifdef
directives.
+
+
+
+It is recommended that any definitions of macros LITTLEENDIAN
,
+INLINE
, and THREAD_LOCAL
be made in a build
+target’s platform.h
header file, because these macros are
+expected to be determined inflexibly by the target machine and compiler.
+The other five macros select options and control optimization, and thus might
+be better located in the target’s Makefile (or its equivalent).
+
+
+
+5.4. Adapting a Template Target Directory
+
+
+In the build
directory, two template
subdirectories
+provide models for new target directories.
+Two different templates exist because different functions are needed in the
+SoftFloat library depending on whether macro SOFTFLOAT_FAST_INT64
+is defined.
+If macro SOFTFLOAT_FAST_INT64
will be defined,
+template-FAST_INT64
is the template to use;
+otherwise, template-not-FAST_INT64
is the appropriate
+template.
+A new target directory can be created by copying the correct template directory
+and editing the files inside.
+To avoid confusion, it would be wise to refrain from editing the files within a
+template directory directly.
+
+
+
+5.5. Target-Specific Optimization of Primitive Functions
+
+
+Header file primitives.h
(in directory
+source/include
) declares macros and functions for numerous
+underlying arithmetic operations upon which many of SoftFloat’s
+floating-point functions are ultimately built.
+The SoftFloat sources include implementations of all of these functions/macros,
+written as standard C code, so a complete and correct SoftFloat library can be
+created using only the supplied code for all functions.
+However, for many targets, SoftFloat’s performance can be improved by
+substituting target-specific implementations of some of the functions/macros
+declared in primitives.h
.
+
+
+
+For example, primitives.h
declares a function called
+softfloat_countLeadingZeros32
that takes an unsigned
+32-bit integer as an argument and returns the number of the
+integer’s most-significant bits that are zeros.
+While the SoftFloat sources include an implementation of this function written
+in standard C, many processors can perform this same function
+directly in only one or two machine instructions.
+An alternative, target-specific implementation that maps to those instructions
+is likely to be more efficient than the generic C code from the SoftFloat
+package.
+
+
+
+A build target can replace the supplied version of any function or macro of
+primitives.h
by defining a macro with the same name in the
+target’s platform.h
header file.
+For this purpose, it may be helpful for platform.h
to
+#include
header file primitiveTypes.h
, which defines
+types used for arguments and results of functions declared in
+primitives.h
.
+When a desired replacement implementation is a function, not a macro, it is
+sufficient for platform.h
to include the line
+
+
+#define <function-name> <function-name>
+
+
+where <function-name>
is the name of the
+function.
+This technically defines <function-name>
+as a macro, but one that resolves to the same name, which may then be a
+function.
+(A preprocessor that conforms to the C Standard is required to limit recursive
+macro expansion from being applied more than once.)
+
+
+
+The supplied header file opts-GCC.h
(in directory
+source/include
) provides an example of target-specific
+optimization for the GCC compiler.
+Each GCC target example in the build
directory has
+
+#include "opts-GCC.h"
+
+in its platform.h
header file.
+Before opts-GCC.h
is included, the following macros must be
+defined (or not) to control which features are invoked:
+
+
+SOFTFLOAT_BUILTIN_CLZ
+-
+If defined, SoftFloat’s internal
+‘
countLeadingZeros
’ functions use intrinsics
+__builtin_clz
and __builtin_clzll
.
+
+SOFTFLOAT_INTRINSIC_INT128
+-
+If defined, SoftFloat makes use of GCC’s nonstandard 128-bit
+integer type
__int128
.
+
+
+
+On some machines, these improvements are observed to increase the speeds of
+f64_mul
and f128_mul
by around 20 to 25%, although
+other functions receive less dramatic boosts, or none at all.
+Results can vary greatly across different platforms.
+
+
+
+6. Testing SoftFloat
+
+
+SoftFloat can be tested using the testsoftfloat
program by the
+same author.
+This program is part of the Berkeley TestFloat package available at the Web
+page
+http://www.jhauser.us/arithmetic/TestFloat.html
.
+The TestFloat package also has a program called timesoftfloat
that
+measures the speed of SoftFloat’s floating-point functions.
+
+
+
+7. Providing SoftFloat as a Common Library for Applications
+
+
+Header file softfloat.h
defines the SoftFloat interface as seen by
+clients.
+If the SoftFloat library will be made a common library for programs on a
+system, the supplied softfloat.h
has a couple of deficiencies for
+this purpose:
+
+-
+As supplied,
softfloat.h
depends on another header,
+softfloat_types.h
, that is not intended for public use but which
+must also be visible to the programmer’s compiler.
+ -
+More troubling, at the time
softfloat.h
is included in a C source
+file, macros SOFTFLOAT_FAST_INT64
and THREAD_LOCAL
+must be defined, or not defined, consistent with how these macro were defined
+when the SoftFloat library was built.
+
+In the situation that new programs may regularly #include
header
+file softfloat.h
, it is recommended that a custom, self-contained
+version of this header file be created that eliminates these issues.
+
+
+
+8. Contact Information
+
+
+At the time of this writing, the most up-to-date information about SoftFloat
+and the latest release can be found at the Web page
+http://www.jhauser.us/arithmetic/SoftFloat.html
.
+
+
+
+
+
diff --git a/softfloat/doc/SoftFloat.html b/softfloat/doc/SoftFloat.html
new file mode 100644
index 0000000..b72b407
--- /dev/null
+++ b/softfloat/doc/SoftFloat.html
@@ -0,0 +1,1527 @@
+
+
+
+
+Berkeley SoftFloat Library Interface
+
+
+
+
+Berkeley SoftFloat Release 3e: Library Interface
+
+
+John R. Hauser
+2018 January 20
+
+
+
+Contents
+
+
+
+
+
+1. Introduction |
+2. Limitations |
+3. Acknowledgments and License |
+4. Types and Functions |
+ | 4.1. Boolean and Integer Types |
+ | 4.2. Floating-Point Types |
+ | 4.3. Supported Floating-Point Functions |
+
+ |
+ 4.4. Non-canonical Representations in extFloat80_t |
+
+ | 4.5. Conventions for Passing Arguments and Results |
+5. Reserved Names |
+6. Mode Variables |
+ | 6.1. Rounding Mode |
+ | 6.2. Underflow Detection |
+
+ |
+ 6.3. Rounding Precision for the 80-Bit Extended Format |
+
+7. Exceptions and Exception Flags |
+8. Function Details |
+ | 8.1. Conversions from Integer to Floating-Point |
+ | 8.2. Conversions from Floating-Point to Integer |
+ | 8.3. Conversions Among Floating-Point Types |
+ | 8.4. Basic Arithmetic Functions |
+ | 8.5. Fused Multiply-Add Functions |
+ | 8.6. Remainder Functions |
+ | 8.7. Round-to-Integer Functions |
+ | 8.8. Comparison Functions |
+ | 8.9. Signaling NaN Test Functions |
+ | 8.10. Raise-Exception Function |
+9. Changes from SoftFloat Release 2 |
+ | 9.1. Name Changes |
+ | 9.2. Changes to Function Arguments |
+ | 9.3. Added Capabilities |
+ | 9.4. Better Compatibility with the C Language |
+ | 9.5. New Organization as a Library |
+ | 9.6. Optimization Gains (and Losses) |
+10. Future Directions |
+11. Contact Information |
+
+
+
+
+1. Introduction
+
+
+Berkeley SoftFloat is a software implementation of binary floating-point that
+conforms to the IEEE Standard for Floating-Point Arithmetic.
+The current release supports five binary formats: 16-bit
+half-precision, 32-bit single-precision, 64-bit
+double-precision, 80-bit double-extended-precision, and
+128-bit quadruple-precision.
+The following functions are supported for each format:
+
+-
+addition, subtraction, multiplication, division, and square root;
+
-
+fused multiply-add as defined by the IEEE Standard, except for
+80-bit double-extended-precision;
+
-
+remainder as defined by the IEEE Standard;
+
-
+round to integral value;
+
-
+comparisons;
+
-
+conversions to/from other supported formats; and
+
-
+conversions to/from 32-bit and 64-bit integers,
+signed and unsigned.
+
+All operations required by the original 1985 version of the IEEE Floating-Point
+Standard are implemented, except for conversions to and from decimal.
+
+
+
+This document gives information about the types defined and the routines
+implemented by SoftFloat.
+It does not attempt to define or explain the IEEE Floating-Point Standard.
+Information about the standard is available elsewhere.
+
+
+
+The current version of SoftFloat is Release 3e.
+This release modifies the behavior of the rarely used odd rounding mode
+(round to odd, also known as jamming), and also adds some new
+specialization and optimization examples for those compiling SoftFloat.
+
+
+
+The previous Release 3d fixed bugs that were found in the square
+root functions for the 64-bit, 80-bit, and
+128-bit floating-point formats.
+(Thanks to Alexei Sibidanov at the University of Victoria for reporting an
+incorrect result.)
+The bugs affected all prior Release-3 versions of SoftFloat
+through 3c.
+The flaw in the 64-bit floating-point square root function was of
+very minor impact, causing a 1-ulp error (1 unit in
+the last place) a few times out of a billion.
+The bugs in the 80-bit and 128-bit square root
+functions were more serious.
+Although incorrect results again occurred only a few times out of a billion,
+when they did occur a large portion of the less-significant bits could be
+wrong.
+
+
+
+Among earlier releases, 3b was notable for adding support for the
+16-bit half-precision format.
+For more about the evolution of SoftFloat releases, see
+SoftFloat-history.html
.
+
+
+
+The functional interface of SoftFloat Release 3 and later differs
+in many details from the releases that came before.
+For specifics of these differences, see section 9 below,
+Changes from SoftFloat Release 2.
+
+
+
+2. Limitations
+
+
+SoftFloat assumes the computer has an addressable byte size of 8 or
+16 bits.
+(Nearly all computers in use today have 8-bit bytes.)
+
+
+
+SoftFloat is written in C and is designed to work with other C code.
+The C compiler used must conform at a minimum to the 1989 ANSI standard for the
+C language (same as the 1990 ISO standard) and must in addition support basic
+arithmetic on 64-bit integers.
+Earlier releases of SoftFloat included implementations of 32-bit
+single-precision and 64-bit double-precision floating-point that
+did not require 64-bit integers, but this option is not supported
+starting with Release 3.
+Since 1999, ISO standards for C have mandated compiler support for
+64-bit integers.
+A compiler conforming to the 1999 C Standard or later is recommended but not
+strictly required.
+
+
+
+Most operations not required by the original 1985 version of the IEEE
+Floating-Point Standard but added in the 2008 version are not yet supported in
+SoftFloat Release 3e.
+
+
+
+3. Acknowledgments and License
+
+
+The SoftFloat package was written by me, John R. Hauser.
+Release 3 of SoftFloat was a completely new implementation
+supplanting earlier releases.
+The project to create Release 3 (now through 3e) was
+done in the employ of the University of California, Berkeley, within the
+Department of Electrical Engineering and Computer Sciences, first for the
+Parallel Computing Laboratory (Par Lab) and then for the ASPIRE Lab.
+The work was officially overseen by Prof. Krste Asanovic, with funding provided
+by these sources:
+
+
+
+
+
+
+Par Lab: |
+ |
+
+Microsoft (Award #024263), Intel (Award #024894), and U.C. Discovery
+(Award #DIG07-10227), with additional support from Par Lab affiliates Nokia,
+NVIDIA, Oracle, and Samsung.
+ |
+
+
+ASPIRE Lab: |
+ |
+
+DARPA PERFECT program (Award #HR0011-12-2-0016), with additional support from
+ASPIRE industrial sponsor Intel and ASPIRE affiliates Google, Nokia, NVIDIA,
+Oracle, and Samsung.
+ |
+
+
+
+
+
+
+The following applies to the whole of SoftFloat Release 3e as well
+as to each source file individually.
+
+
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017, 2018 The Regents of the
+University of California.
+All rights reserved.
+
+
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+
+-
+
+Redistributions of source code must retain the above copyright notice, this
+list of conditions, and the following disclaimer.
+
+
+ -
+
+Redistributions in binary form must reproduce the above copyright notice, this
+list of conditions, and the following disclaimer in the documentation and/or
+other materials provided with the distribution.
+
+
+ -
+
+Neither the name of the University nor the names of its contributors may be
+used to endorse or promote products derived from this software without specific
+prior written permission.
+
+
+
+
+
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS “AS IS”,
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.
+IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+
+
+4. Types and Functions
+
+
+The types and functions of SoftFloat are declared in header file
+softfloat.h
.
+
+
+4.1. Boolean and Integer Types
+
+
+Header file softfloat.h
depends on standard headers
+<stdbool.h>
and <stdint.h>
to define type
+bool
and several integer types.
+These standard headers have been part of the ISO C Standard Library since 1999.
+With any recent compiler, they are likely to be supported, even if the compiler
+does not claim complete conformance to the latest ISO C Standard.
+For older or nonstandard compilers, a port of SoftFloat may have substitutes
+for these headers.
+Header softfloat.h
depends only on the name bool
from
+<stdbool.h>
and on these type names from
+<stdint.h>
:
+
+
+uint16_t
+uint32_t
+uint64_t
+int32_t
+int64_t
+uint_fast8_t
+uint_fast32_t
+uint_fast64_t
+int_fast32_t
+int_fast64_t
+
+
+
+
+
+4.2. Floating-Point Types
+
+
+The softfloat.h
header defines five floating-point types:
+
+
+
+float16_t |
+16-bit half-precision binary format |
+
+
+float32_t |
+32-bit single-precision binary format |
+
+
+float64_t |
+64-bit double-precision binary format |
+
+
+extFloat80_t |
+80-bit double-extended-precision binary format (old Intel or
+Motorola format) |
+
+
+float128_t |
+128-bit quadruple-precision binary format |
+
+
+
+The non-extended types are each exactly the size specified:
+16 bits for float16_t
, 32 bits for
+float32_t
, 64 bits for float64_t
, and
+128 bits for float128_t
.
+Aside from these size requirements, the definitions of all these types may
+differ for different ports of SoftFloat to specific systems.
+A given port of SoftFloat may or may not define some of the floating-point
+types as aliases for the C standard types float
,
+double
, and long
double
.
+
+
+
+Header file softfloat.h
also defines a structure,
+struct
extFloat80M
, for the representation of
+80-bit double-extended-precision floating-point values in memory.
+This structure is the same size as type extFloat80_t
and contains
+at least these two fields (not necessarily in this order):
+
+
+uint16_t signExp;
+uint64_t signif;
+
+
+Field signExp
contains the sign and exponent of the floating-point
+value, with the sign in the most significant bit (bit 15) and the
+encoded exponent in the other 15 bits.
+Field signif
is the complete 64-bit significand of
+the floating-point value.
+(In the usual encoding for 80-bit extended floating-point, the
+leading 1 bit of normalized numbers is not implicit but is stored
+in the most significant bit of the significand.)
+
+
+4.3. Supported Floating-Point Functions
+
+
+SoftFloat implements these arithmetic operations for its floating-point types:
+
+-
+conversions between any two floating-point formats;
+
-
+for each floating-point format, conversions to and from signed and unsigned
+32-bit and 64-bit integers;
+
-
+for each format, the usual addition, subtraction, multiplication, division, and
+square root operations;
+
-
+for each format except
extFloat80_t
, the fused multiply-add
+operation defined by the IEEE Standard;
+ -
+for each format, the floating-point remainder operation defined by the IEEE
+Standard;
+
-
+for each format, a “round to integer” operation that rounds to the
+nearest integer value in the same format; and
+
-
+comparisons between two values in the same floating-point format.
+
+
+
+
+The following operations required by the 2008 IEEE Floating-Point Standard are
+not supported in SoftFloat Release 3e:
+
+-
+nextUp, nextDown, minNum, maxNum, minNumMag,
+maxNumMag, scaleB, and logB;
+
-
+conversions between floating-point formats and decimal or hexadecimal character
+sequences;
+
-
+all “quiet-computation” operations (copy, negate,
+abs, and copySign, which all involve only simple copying and/or
+manipulation of the floating-point sign bit); and
+
-
+all “non-computational” operations other than isSignaling
+(which is supported).
+
+
+
+4.4. Non-canonical Representations in extFloat80_t
+
+
+Because the 80-bit double-extended-precision format,
+extFloat80_t
, stores an explicit leading significand bit, many
+finite floating-point numbers are encodable in this type in multiple equivalent
+forms.
+Of these multiple encodings, there is always a unique one with the least
+encoded exponent value, and this encoding is considered the canonical
+representation of the floating-point number.
+Any other equivalent representations (having a higher encoded exponent value)
+are non-canonical.
+For a value in the subnormal range (including zero), the canonical
+representation always has an encoded exponent of zero and a leading significand
+bit of 0.
+For finite values outside the subnormal range, the canonical representation
+always has an encoded exponent that is nonzero and a leading significand bit
+of 1.
+
+
+
+For an infinity or NaN, the leading significand bit is similarly expected to
+be 1.
+An infinity or NaN with a leading significand bit of 0 is again
+considered non-canonical.
+Hence, altogether, to be canonical, a value of type extFloat80_t
+must have a leading significand bit of 1, unless the value is
+subnormal or zero, in which case the leading significand bit and the encoded
+exponent must both be zero.
+
+
+
+SoftFloat’s functions are not guaranteed to operate as expected when
+inputs of type extFloat80_t
are non-canonical.
+Assuming all of a function’s extFloat80_t
inputs (if any)
+are canonical, function outputs of type extFloat80_t
will always
+be canonical.
+
+
+4.5. Conventions for Passing Arguments and Results
+
+
+Values that are at most 64 bits in size (i.e., not the
+80-bit or 128-bit floating-point formats) are in all
+cases passed as function arguments by value.
+Likewise, when an output of a function is no more than 64 bits, it
+is always returned directly as the function result.
+Thus, for example, the SoftFloat function for adding two 64-bit
+floating-point values has this simple signature:
+
+float64_t f64_add( float64_t, float64_t );
+
+
+
+
+The story is more complex when function inputs and outputs are
+80-bit and 128-bit floating-point.
+For these types, SoftFloat always provides a function that passes these larger
+values into or out of the function indirectly, via pointers.
+For example, for adding two 128-bit floating-point values,
+SoftFloat supplies this function:
+
+void f128M_add( const float128_t *, const float128_t *, float128_t * );
+
+The first two arguments point to the values to be added, and the last argument
+points to the location where the sum will be stored.
+The M
in the name f128M_add
is mnemonic for the fact
+that the 128-bit inputs and outputs are “in memory”,
+pointed to by pointer arguments.
+
+
+
+All ports of SoftFloat implement these pass-by-pointer functions for
+types extFloat80_t
and float128_t
.
+At the same time, SoftFloat ports may also implement alternate versions of
+these same functions that pass extFloat80_t
and
+float128_t
by value, like the smaller formats.
+Thus, besides the function with name f128M_add
shown above, a
+SoftFloat port may also supply an equivalent function with this signature:
+
+float128_t f128_add( float128_t, float128_t );
+
+
+
+
+As a general rule, on computers where the machine word size is
+32 bits or smaller, only the pass-by-pointer versions of functions
+(e.g., f128M_add
) are provided for types extFloat80_t
+and float128_t
, because passing such large types directly can have
+significant extra cost.
+On computers where the word size is 64 bits or larger, both
+function versions (f128M_add
and f128_add
) are
+provided, because the cost of passing by value is then more reasonable.
+Applications that must be portable accross both classes of computers must use
+the pointer-based functions, as these are always implemented.
+However, if it is known that SoftFloat includes the by-value functions for all
+platforms of interest, programmers can use whichever version they prefer.
+
+
+
+5. Reserved Names
+
+
+In addition to the variables and functions documented here, SoftFloat defines
+some symbol names for its own private use.
+These private names always begin with the prefix
+‘softfloat_
’.
+When a program includes header softfloat.h
or links with the
+SoftFloat library, all names with prefix ‘softfloat_
’
+are reserved for possible use by SoftFloat.
+Applications that use SoftFloat should not define their own names with this
+prefix, and should reference only such names as are documented.
+
+
+
+6. Mode Variables
+
+
+The following global variables control rounding mode, underflow detection, and
+the 80-bit extended format’s rounding precision:
+
+softfloat_roundingMode
+softfloat_detectTininess
+extF80_roundingPrecision
+
+These mode variables are covered in the next several subsections.
+For some SoftFloat ports, these variables may be per-thread (declared
+thread_local
), meaning that different execution threads have their
+own separate copies of the variables.
+
+
+6.1. Rounding Mode
+
+
+All five rounding modes defined by the 2008 IEEE Floating-Point Standard are
+implemented for all operations that require rounding.
+Some ports of SoftFloat may also implement the round-to-odd mode.
+
+
+
+The rounding mode is selected by the global variable
+
+uint_fast8_t softfloat_roundingMode;
+
+This variable may be set to one of the values
+
+
+
+softfloat_round_near_even |
+round to nearest, with ties to even |
+
+
+softfloat_round_near_maxMag |
+round to nearest, with ties to maximum magnitude (away from zero) |
+
+
+softfloat_round_minMag |
+round to minimum magnitude (toward zero) |
+
+
+softfloat_round_min |
+round to minimum (down) |
+
+
+softfloat_round_max |
+round to maximum (up) |
+
+
+softfloat_round_odd |
+round to odd (jamming), if supported by the SoftFloat port |
+
+
+
+Variable softfloat_roundingMode
is initialized to
+softfloat_round_near_even
.
+
+
+
+When softfloat_round_odd
is the rounding mode for a function that
+rounds to an integer value (either conversion to an integer format or a
+‘roundToInt
’ function), if the input is not already an
+integer, the rounded result is the closest odd integer.
+For other operations, this rounding mode acts as though the floating-point
+result is first rounded to minimum magnitude, the same as
+softfloat_round_minMag
, and then, if the result is inexact, the
+least-significant bit of the result is set to 1.
+Rounding to odd is also known as jamming.
+
+
+6.2. Underflow Detection
+
+
+In the terminology of the IEEE Standard, SoftFloat can detect tininess for
+underflow either before or after rounding.
+The choice is made by the global variable
+
+uint_fast8_t softfloat_detectTininess;
+
+which can be set to either
+
+softfloat_tininess_beforeRounding
+softfloat_tininess_afterRounding
+
+Detecting tininess after rounding is usually better because it results in fewer
+spurious underflow signals.
+The other option is provided for compatibility with some systems.
+Like most systems (and as required by the newer 2008 IEEE Standard), SoftFloat
+always detects loss of accuracy for underflow as an inexact result.
+
+
+6.3. Rounding Precision for the 80-Bit Extended Format
+
+
+For extFloat80_t
only, the rounding precision of the basic
+arithmetic operations is controlled by the global variable
+
+uint_fast8_t extF80_roundingPrecision;
+
+The operations affected are:
+
+extF80_add
+extF80_sub
+extF80_mul
+extF80_div
+extF80_sqrt
+
+When extF80_roundingPrecision
is set to its default value of 80,
+these operations are rounded to the full precision of the 80-bit
+double-extended-precision format, like occurs for other formats.
+Setting extF80_roundingPrecision
to 32 or to 64 causes the
+operations listed to be rounded to 32-bit precision (equivalent to
+float32_t
) or to 64-bit precision (equivalent to
+float64_t
), respectively.
+When rounding to reduced precision, additional bits in the result significand
+beyond the rounding point are set to zero.
+The consequences of setting extF80_roundingPrecision
to a value
+other than 32, 64, or 80 is not specified.
+Operations other than the ones listed above are not affected by
+extF80_roundingPrecision
.
+
+
+
+7. Exceptions and Exception Flags
+
+
+All five exception flags required by the IEEE Floating-Point Standard are
+implemented.
+Each flag is stored as a separate bit in the global variable
+
+uint_fast8_t softfloat_exceptionFlags;
+
+The positions of the exception flag bits within this variable are determined by
+the bit masks
+
+softfloat_flag_inexact
+softfloat_flag_underflow
+softfloat_flag_overflow
+softfloat_flag_infinite
+softfloat_flag_invalid
+
+Variable softfloat_exceptionFlags
is initialized to all zeros,
+meaning no exceptions.
+
+
+
+For some SoftFloat ports, softfloat_exceptionFlags
may be
+per-thread (declared thread_local
), meaning that different
+execution threads have their own separate instances of it.
+
+
+
+An individual exception flag can be cleared with the statement
+
+softfloat_exceptionFlags &= ~softfloat_flag_<exception>;
+
+where <exception>
is the appropriate name.
+To raise a floating-point exception, function softfloat_raiseFlags
+should normally be used.
+
+
+
+When SoftFloat detects an exception other than inexact, it calls
+softfloat_raiseFlags
.
+The default version of this function simply raises the corresponding exception
+flags.
+Particular ports of SoftFloat may support alternate behavior, such as exception
+traps, by modifying the default softfloat_raiseFlags
.
+A program may also supply its own softfloat_raiseFlags
function to
+override the one from the SoftFloat library.
+
+
+
+Because inexact results occur frequently under most circumstances (and thus are
+hardly exceptional), SoftFloat does not ordinarily call
+softfloat_raiseFlags
for inexact exceptions.
+It does always raise the inexact exception flag as required.
+
+
+
+8. Function Details
+
+
+In this section, <float>
appears in function names as
+a substitute for one of these abbreviations:
+
+
+
+f16 |
+indicates float16_t , passed by value |
+
+
+f32 |
+indicates float32_t , passed by value |
+
+
+f64 |
+indicates float64_t , passed by value |
+
+
+extF80M |
+indicates extFloat80_t , passed indirectly via pointers |
+
+
+extF80 |
+indicates extFloat80_t , passed by value |
+
+
+f128M |
+indicates float128_t , passed indirectly via pointers |
+
+
+f128 |
+indicates float128_t , passed by value |
+
+
+
+The circumstances under which values of floating-point types
+extFloat80_t
and float128_t
may be passed either by
+value or indirectly via pointers was discussed earlier in
+section 4.5, Conventions for Passing Arguments and Results.
+
+
+8.1. Conversions from Integer to Floating-Point
+
+
+All conversions from a 32-bit or 64-bit integer,
+signed or unsigned, to a floating-point format are supported.
+Functions performing these conversions have these names:
+
+ui32_to_<float>
+ui64_to_<float>
+i32_to_<float>
+i64_to_<float>
+
+Conversions from 32-bit integers to 64-bit
+double-precision and larger formats are always exact, and likewise conversions
+from 64-bit integers to 80-bit
+double-extended-precision and 128-bit quadruple-precision are also
+always exact.
+
+
+
+Each conversion function takes one input of the appropriate type and generates
+one output.
+The following illustrates the signatures of these functions in cases when the
+floating-point result is passed either by value or via pointers:
+
+
+float64_t i32_to_f64( int32_t a );
+
+
+void i32_to_f128M( int32_t a, float128_t *destPtr );
+
+
+
+
+8.2. Conversions from Floating-Point to Integer
+
+
+Conversions from a floating-point format to a 32-bit or
+64-bit integer, signed or unsigned, are supported with these
+functions:
+
+<float>_to_ui32
+<float>_to_ui64
+<float>_to_i32
+<float>_to_i64
+
+The functions have signatures as follows, depending on whether the
+floating-point input is passed by value or via pointers:
+
+
+int_fast32_t f64_to_i32( float64_t a, uint_fast8_t roundingMode, bool exact );
+
+
+int_fast32_t
+ f128M_to_i32( const float128_t *aPtr, uint_fast8_t roundingMode, bool exact );
+
+
+
+
+
+The roundingMode
argument specifies the rounding mode for
+the conversion.
+The variable that usually indicates rounding mode,
+softfloat_roundingMode
, is ignored.
+Argument exact
determines whether the inexact
+exception flag is raised if the conversion is not exact.
+If exact
is true
, the inexact flag may
+be raised;
+otherwise, it will not be, even if the conversion is inexact.
+
+
+
+A conversion from floating-point to integer format raises the invalid
+exception if the source value cannot be rounded to a representable integer of
+the desired size (32 or 64 bits).
+In such circumstances, the integer result returned is determined by the
+particular port of SoftFloat, although typically this value will be either the
+maximum or minimum value of the integer format.
+The functions that convert to integer types never raise the floating-point
+overflow exception.
+
+
+
+Because languages such as C require that conversions to integers
+be rounded toward zero, the following functions are provided for improved speed
+and convenience:
+
+<float>_to_ui32_r_minMag
+<float>_to_ui64_r_minMag
+<float>_to_i32_r_minMag
+<float>_to_i64_r_minMag
+
+These functions round only toward zero (to minimum magnitude).
+The signatures for these functions are the same as above without the redundant
+roundingMode
argument:
+
+
+int_fast32_t f64_to_i32_r_minMag( float64_t a, bool exact );
+
+
+int_fast32_t f128M_to_i32_r_minMag( const float128_t *aPtr, bool exact );
+
+
+
+
+8.3. Conversions Among Floating-Point Types
+
+
+Conversions between floating-point formats are done by functions with these
+names:
+
+<float>_to_<float>
+
+All combinations of source and result type are supported where the source and
+result are different formats.
+There are four different styles of signature for these functions, depending on
+whether the input and the output floating-point values are passed by value or
+via pointers:
+
+
+float32_t f64_to_f32( float64_t a );
+
+
+float32_t f128M_to_f32( const float128_t *aPtr );
+
+
+void f32_to_f128M( float32_t a, float128_t *destPtr );
+
+
+void extF80M_to_f128M( const extFloat80_t *aPtr, float128_t *destPtr );
+
+
+
+
+
+Conversions from a smaller to a larger floating-point format are always exact
+and so require no rounding.
+
+
+8.4. Basic Arithmetic Functions
+
+
+The following basic arithmetic functions are provided:
+
+<float>_add
+<float>_sub
+<float>_mul
+<float>_div
+<float>_sqrt
+
+Each floating-point operation takes two operands, except for sqrt
+(square root) which takes only one.
+The operands and result are all of the same floating-point format.
+Signatures for these functions take the following forms:
+
+
+float64_t f64_add( float64_t a, float64_t b );
+
+
+void
+ f128M_add(
+ const float128_t *aPtr, const float128_t *bPtr, float128_t *destPtr );
+
+
+float64_t f64_sqrt( float64_t a );
+
+
+void f128M_sqrt( const float128_t *aPtr, float128_t *destPtr );
+
+
+When floating-point values are passed indirectly through pointers, arguments
+aPtr
and bPtr
point to the input
+operands, and the last argument, destPtr
, points to the
+location where the result is stored.
+
+
+
+Rounding of the 80-bit double-extended-precision
+(extFloat80_t
) functions is affected by variable
+extF80_roundingPrecision
, as explained earlier in
+section 6.3,
+Rounding Precision for the 80-Bit Extended Format.
+
+
+8.5. Fused Multiply-Add Functions
+
+
+The 2008 version of the IEEE Floating-Point Standard defines a fused
+multiply-add operation that does a combined multiplication and addition
+with only a single rounding.
+SoftFloat implements fused multiply-add with functions
+
+<float>_mulAdd
+
+Unlike other operations, fused multiple-add is not supported for the
+80-bit double-extended-precision format,
+extFloat80_t
.
+
+
+
+Depending on whether floating-point values are passed by value or via pointers,
+the fused multiply-add functions have signatures of these forms:
+
+
+float64_t f64_mulAdd( float64_t a, float64_t b, float64_t c );
+
+
+void
+ f128M_mulAdd(
+ const float128_t *aPtr,
+ const float128_t *bPtr,
+ const float128_t *cPtr,
+ float128_t *destPtr
+ );
+
+
+The functions compute
+(a
× b
)
+ + c
+with a single rounding.
+When floating-point values are passed indirectly through pointers, arguments
+aPtr
, bPtr
, and
+cPtr
point to operands a
,
+b
, and c
respectively, and
+destPtr
points to the location where the result is stored.
+
+
+
+If one of the multiplication operands a
and
+b
is infinite and the other is zero, these functions raise
+the invalid exception even if operand c
is a quiet NaN.
+
+
+8.6. Remainder Functions
+
+
+For each format, SoftFloat implements the remainder operation defined by the
+IEEE Floating-Point Standard.
+The remainder functions have names
+
+<float>_rem
+
+Each remainder operation takes two floating-point operands of the same format
+and returns a result in the same format.
+Depending on whether floating-point values are passed by value or via pointers,
+the remainder functions have signatures of these forms:
+
+
+float64_t f64_rem( float64_t a, float64_t b );
+
+
+void
+ f128M_rem(
+ const float128_t *aPtr, const float128_t *bPtr, float128_t *destPtr );
+
+
+When floating-point values are passed indirectly through pointers, arguments
+aPtr
and bPtr
point to operands
+a
and b
respectively, and
+destPtr
points to the location where the result is stored.
+
+
+
+The IEEE Standard remainder operation computes the value
+a
+ − n × b
,
+where n is the integer closest to
+a
÷ b
.
+If a
÷ b
is exactly
+halfway between two integers, n is the even integer closest to
+a
÷ b
.
+The IEEE Standard’s remainder operation is always exact and so requires
+no rounding.
+
+
+
+Depending on the relative magnitudes of the operands, the remainder
+functions can take considerably longer to execute than the other SoftFloat
+functions.
+This is an inherent characteristic of the remainder operation itself and is not
+a flaw in the SoftFloat implementation.
+
+
+8.7. Round-to-Integer Functions
+
+
+For each format, SoftFloat implements the round-to-integer operation specified
+by the IEEE Floating-Point Standard.
+These functions are named
+
+<float>_roundToInt
+
+Each round-to-integer operation takes a single floating-point operand.
+This operand is rounded to an integer according to a specified rounding mode,
+and the resulting integer value is returned in the same floating-point format.
+(Note that the result is not an integer type.)
+
+
+
+The signatures of the round-to-integer functions are similar to those for
+conversions to an integer type:
+
+
+float64_t f64_roundToInt( float64_t a, uint_fast8_t roundingMode, bool exact );
+
+
+void
+ f128M_roundToInt(
+ const float128_t *aPtr,
+ uint_fast8_t roundingMode,
+ bool exact,
+ float128_t *destPtr
+ );
+
+
+When floating-point values are passed indirectly through pointers,
+aPtr
points to the input operand and
+destPtr
points to the location where the result is stored.
+
+
+
+The roundingMode
argument specifies the rounding mode to
+apply.
+The variable that usually indicates rounding mode,
+softfloat_roundingMode
, is ignored.
+Argument exact
determines whether the inexact
+exception flag is raised if the conversion is not exact.
+If exact
is true
, the inexact flag may
+be raised;
+otherwise, it will not be, even if the conversion is inexact.
+
+
+8.8. Comparison Functions
+
+
+For each format, the following floating-point comparison functions are
+provided:
+
+<float>_eq
+<float>_le
+<float>_lt
+
+Each comparison takes two operands of the same type and returns a Boolean.
+The abbreviation eq
stands for “equal” (=);
+le
stands for “less than or equal” (≤);
+and lt
stands for “less than” (<).
+Depending on whether the floating-point operands are passed by value or via
+pointers, the comparison functions have signatures of these forms:
+
+
+bool f64_eq( float64_t a, float64_t b );
+
+
+bool f128M_eq( const float128_t *aPtr, const float128_t *bPtr );
+
+
+
+
+
+The usual greater-than (>), greater-than-or-equal (≥), and not-equal
+(≠) comparisons are easily obtained from the functions provided.
+The not-equal function is just the logical complement of the equal function.
+The greater-than-or-equal function is identical to the less-than-or-equal
+function with the arguments in reverse order, and likewise the greater-than
+function is identical to the less-than function with the arguments reversed.
+
+
+
+The IEEE Floating-Point Standard specifies that the less-than-or-equal and
+less-than comparisons by default raise the invalid exception if either
+operand is any kind of NaN.
+Equality comparisons, on the other hand, are defined by default to raise the
+invalid exception only for signaling NaNs, not quiet NaNs.
+For completeness, SoftFloat provides these complementary functions:
+
+<float>_eq_signaling
+<float>_le_quiet
+<float>_lt_quiet
+
+The signaling
equality comparisons are identical to the default
+equality comparisons except that the invalid exception is raised for any
+NaN input, not just for signaling NaNs.
+Similarly, the quiet
comparison functions are identical to their
+default counterparts except that the invalid exception is not raised for
+quiet NaNs.
+
+
+8.9. Signaling NaN Test Functions
+
+
+Functions for testing whether a floating-point value is a signaling NaN are
+provided with these names:
+
+<float>_isSignalingNaN
+
+The functions take one floating-point operand and return a Boolean indicating
+whether the operand is a signaling NaN.
+Accordingly, the functions have the forms
+
+
+bool f64_isSignalingNaN( float64_t a );
+
+
+bool f128M_isSignalingNaN( const float128_t *aPtr );
+
+
+
+
+8.10. Raise-Exception Function
+
+
+SoftFloat provides a single function for raising floating-point exceptions:
+
+
+void softfloat_raiseFlags( uint_fast8_t exceptions );
+
+
+The exceptions
argument is a mask indicating the set of
+exceptions to raise.
+(See earlier section 7, Exceptions and Exception Flags.)
+In addition to setting the specified exception flags in variable
+softfloat_exceptionFlags
, the softfloat_raiseFlags
+function may cause a trap or abort appropriate for the current system.
+
+
+
+9. Changes from SoftFloat Release 2
+
+
+Apart from a change in the legal use license, Release 3 of
+SoftFloat introduced numerous technical differences compared to earlier
+releases.
+
+
+9.1. Name Changes
+
+
+The most obvious and pervasive difference compared to Release 2
+is that the names of most functions and variables have changed, even when the
+behavior has not.
+First, the floating-point types, the mode variables, the exception flags
+variable, the function to raise exceptions, and various associated constants
+have been renamed as follows:
+
+
+
+old name, Release 2: |
+new name, Release 3: |
+
+
+float32 |
+float32_t |
+
+
+float64 |
+float64_t |
+
+
+floatx80 |
+extFloat80_t |
+
+
+float128 |
+float128_t |
+
+
+float_rounding_mode |
+softfloat_roundingMode |
+
+
+float_round_nearest_even |
+softfloat_round_near_even |
+
+
+float_round_to_zero |
+softfloat_round_minMag |
+
+
+float_round_down |
+softfloat_round_min |
+
+
+float_round_up |
+softfloat_round_max |
+
+
+float_detect_tininess |
+softfloat_detectTininess |
+
+
+float_tininess_before_rounding |
+softfloat_tininess_beforeRounding |
+
+
+float_tininess_after_rounding |
+softfloat_tininess_afterRounding |
+
+
+floatx80_rounding_precision |
+extF80_roundingPrecision |
+
+
+float_exception_flags |
+softfloat_exceptionFlags |
+
+
+float_flag_inexact |
+softfloat_flag_inexact |
+
+
+float_flag_underflow |
+softfloat_flag_underflow |
+
+
+float_flag_overflow |
+softfloat_flag_overflow |
+
+
+float_flag_divbyzero |
+softfloat_flag_infinite |
+
+
+float_flag_invalid |
+softfloat_flag_invalid |
+
+
+float_raise |
+softfloat_raiseFlags |
+
+
+
+
+
+
+Furthermore, Release 3 adopted the following new abbreviations for
+function names:
+
+
+
+used in names in Release 2: |
+used in names in Release 3: |
+
+ int32 | i32 |
+ int64 | i64 |
+ float32 | f32 |
+ float64 | f64 |
+ floatx80 | extF80 |
+ float128 | f128 |
+
+
+Thus, for example, the function to add two 32-bit floating-point
+numbers, previously called float32_add
in Release 2,
+is now f32_add
.
+Lastly, there have been a few other changes to function names:
+
+
+
+used in names in Release 2: |
+used in names in Release 3: |
+relevant functions: |
+
+
+_round_to_zero |
+_r_minMag |
+conversions from floating-point to integer (section 8.2) |
+
+
+round_to_int |
+roundToInt |
+round-to-integer functions (section 8.7) |
+
+
+is_signaling_nan |
+isSignalingNaN |
+signaling NaN test functions (section 8.9) |
+
+
+
+
+
+9.2. Changes to Function Arguments
+
+
+Besides simple name changes, some operations were given a different interface
+in Release 3 than they had in Release 2:
+
+
+-
+
+Since Release 3, integer arguments and results of functions have
+standard types from header <stdint.h>
, such as
+uint32_t
, whereas previously their types could be defined
+differently for each port of SoftFloat, usually using traditional C types such
+as unsigned
int
.
+Likewise, functions in Release 3 and later pass Booleans as
+standard type bool
from <stdbool.h>
, whereas
+previously these were again passed as a port-specific type (usually
+int
).
+
+
+ -
+
+As explained earlier in section 4.5, Conventions for Passing
+Arguments and Results, SoftFloat functions in Release 3 and
+later may pass 80-bit and 128-bit floating-point
+values through pointers, meaning that functions take pointer arguments and then
+read or write floating-point values at the locations indicated by the pointers.
+In Release 2, floating-point arguments and results were always
+passed by value, regardless of their size.
+
+
+ -
+
+Functions that round to an integer have additional
+roundingMode
and exact
arguments that
+they did not have in Release 2.
+Refer to sections 8.2 and 8.7 for descriptions of these functions
+since Release 3.
+For Release 2, the rounding mode, when needed, was taken from the
+same global variable that affects the basic arithmetic operations (now called
+softfloat_roundingMode
but previously known as
+float_rounding_mode
).
+Also, for Release 2, if the original floating-point input was not
+an exact integer value, and if the invalid exception was not raised by
+the function, the inexact exception was always raised.
+Release 2 had no option to suppress raising inexact in this
+case.
+Applications using SoftFloat Release 3 or later can get the same
+effect as Release 2 by passing variable
+softfloat_roundingMode
for argument
+roundingMode
and true
for argument
+exact
.
+
+
+
+
+
+9.3. Added Capabilities
+
+
+With Release 3, some new features have been added that were not
+present in Release 2:
+
+
+-
+
+A port of SoftFloat can now define any of the floating-point types
+float32_t
, float64_t
, extFloat80_t
, and
+float128_t
as aliases for C’s standard floating-point types
+float
, double
, and long
+double
, using either #define
or typedef
.
+This potential convenience was not supported under Release 2.
+
+
+
+(Note, however, that there may be a performance cost to defining
+SoftFloat’s floating-point types this way, depending on the platform and
+the applications using SoftFloat.
+Ports of SoftFloat may choose to forgo the convenience in favor of better
+speed.)
+
+
+
+
-
+As of Release 3b, 16-bit half-precision,
+
float16_t
, is supported.
+
+
+
+
-
+Functions have been added for converting between the floating-point types and
+unsigned integers.
+Release 2 supported only signed integers, not unsigned.
+
+
+
+
-
+Fused multiply-add functions have been added for all floating-point formats
+except 80-bit double-extended-precision,
+
extFloat80_t
.
+
+
+
+
-
+New rounding modes are supported:
+
softfloat_round_near_maxMag
(round to nearest, with ties to
+maximum magnitude, away from zero), and, as of Release 3c,
+optional softfloat_round_odd
(round to odd, also known as
+jamming).
+
+
+
+
+
+9.4. Better Compatibility with the C Language
+
+
+Release 3 of SoftFloat was written to conform better to the ISO C
+Standard’s rules for portability.
+For example, older releases of SoftFloat employed type conversions in ways
+that, while commonly practiced, are not fully defined by the C Standard.
+Such problematic type conversions have generally been replaced by the use of
+unions, the behavior around which is more strictly regulated these days.
+
+
+9.5. New Organization as a Library
+
+
+Starting with Release 3, SoftFloat now builds as a library.
+Previously, SoftFloat compiled into a single, monolithic object file containing
+all the SoftFloat functions, with the consequence that a program linking with
+SoftFloat would get every SoftFloat function in its binary file even if only a
+few functions were actually used.
+With SoftFloat in the form of a library, a program that is linked by a standard
+linker will include only those functions of SoftFloat that it needs and no
+others.
+
+
+9.6. Optimization Gains (and Losses)
+
+
+Individual SoftFloat functions have been variously improved in
+Release 3 compared to earlier releases.
+In particular, better, faster algorithms have been deployed for the operations
+of division, square root, and remainder.
+For functions operating on the larger 80-bit and
+128-bit formats, extFloat80_t
and
+float128_t
, code size has also generally been reduced.
+
+
+
+However, because Release 2 compiled all of SoftFloat together as a
+single object file, compilers could make optimizations across function calls
+when one SoftFloat function calls another.
+Now that the functions of SoftFloat are compiled separately and only afterward
+linked together into a program, there is not usually the same opportunity to
+optimize across function calls.
+Some loss of speed has been observed due to this change.
+
+
+
+10. Future Directions
+
+
+The following improvements are anticipated for future releases of SoftFloat:
+
+-
+more functions from the 2008 version of the IEEE Floating-Point Standard;
+
-
+consistent, defined behavior for non-canonical representations of extended
+format
extFloat80_t
(discussed in section 4.4,
+Non-canonical Representations in extFloat80_t
).
+
+
+
+
+
+11. Contact Information
+
+
+At the time of this writing, the most up-to-date information about SoftFloat
+and the latest release can be found at the Web page
+http://www.jhauser.us/arithmetic/SoftFloat.html
.
+
+
+
+
+
diff --git a/softfloat/source/8086-SSE/extF80M_isSignalingNaN.c b/softfloat/source/8086-SSE/extF80M_isSignalingNaN.c
new file mode 100644
index 0000000..c2cca65
--- /dev/null
+++ b/softfloat/source/8086-SSE/extF80M_isSignalingNaN.c
@@ -0,0 +1,57 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+bool extF80M_isSignalingNaN( const extFloat80_t *aPtr )
+{
+ const struct extFloat80M *aSPtr;
+ uint64_t uiA0;
+
+ aSPtr = (const struct extFloat80M *) aPtr;
+ if ( (aSPtr->signExp & 0x7FFF) != 0x7FFF ) return false;
+ uiA0 = aSPtr->signif;
+ return
+ ! (uiA0 & UINT64_C( 0x4000000000000000 ))
+ && (uiA0 & UINT64_C( 0x3FFFFFFFFFFFFFFF));
+
+}
+
diff --git a/softfloat/source/8086-SSE/f128M_isSignalingNaN.c b/softfloat/source/8086-SSE/f128M_isSignalingNaN.c
new file mode 100644
index 0000000..9ff83d7
--- /dev/null
+++ b/softfloat/source/8086-SSE/f128M_isSignalingNaN.c
@@ -0,0 +1,60 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "primitives.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+bool f128M_isSignalingNaN( const float128_t *aPtr )
+{
+ const uint32_t *aWPtr;
+ uint32_t uiA96;
+
+ aWPtr = (const uint32_t *) aPtr;
+ uiA96 = aWPtr[indexWordHi( 4 )];
+ if ( (uiA96 & 0x7FFF8000) != 0x7FFF0000 ) return false;
+ return
+ ((uiA96 & 0x00007FFF) != 0)
+ || ((aWPtr[indexWord( 4, 2 )] | aWPtr[indexWord( 4, 1 )]
+ | aWPtr[indexWord( 4, 0 )])
+ != 0);
+
+}
+
diff --git a/softfloat/source/8086-SSE/s_commonNaNToExtF80M.c b/softfloat/source/8086-SSE/s_commonNaNToExtF80M.c
new file mode 100644
index 0000000..06302aa
--- /dev/null
+++ b/softfloat/source/8086-SSE/s_commonNaNToExtF80M.c
@@ -0,0 +1,56 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by `aPtr' into an 80-bit extended
+| floating-point NaN, and stores this NaN at the location pointed to by
+| `zSPtr'.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_commonNaNToExtF80M(
+ const struct commonNaN *aPtr, struct extFloat80M *zSPtr )
+{
+
+ zSPtr->signExp = packToExtF80UI64( aPtr->sign, 0x7FFF );
+ zSPtr->signif = UINT64_C( 0xC000000000000000 ) | aPtr->v64>>1;
+
+}
+
diff --git a/softfloat/source/8086-SSE/s_commonNaNToExtF80UI.c b/softfloat/source/8086-SSE/s_commonNaNToExtF80UI.c
new file mode 100644
index 0000000..7325468
--- /dev/null
+++ b/softfloat/source/8086-SSE/s_commonNaNToExtF80UI.c
@@ -0,0 +1,56 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "primitives.h"
+#include "specialize.h"
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by `aPtr' into an 80-bit extended
+| floating-point NaN, and returns the bit pattern of this value as an unsigned
+| integer.
+*----------------------------------------------------------------------------*/
+struct uint128 softfloat_commonNaNToExtF80UI( const struct commonNaN *aPtr )
+{
+ struct uint128 uiZ;
+
+ uiZ.v64 = (uint_fast16_t) aPtr->sign<<15 | 0x7FFF;
+ uiZ.v0 = UINT64_C( 0xC000000000000000 ) | aPtr->v64>>1;
+ return uiZ;
+
+}
+
diff --git a/softfloat/source/8086-SSE/s_commonNaNToF128M.c b/softfloat/source/8086-SSE/s_commonNaNToF128M.c
new file mode 100644
index 0000000..e2940bb
--- /dev/null
+++ b/softfloat/source/8086-SSE/s_commonNaNToF128M.c
@@ -0,0 +1,56 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "primitives.h"
+#include "specialize.h"
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by `aPtr' into a 128-bit floating-point
+| NaN, and stores this NaN at the location pointed to by `zWPtr'. Argument
+| `zWPtr' points to an array of four 32-bit elements that concatenate in the
+| platform's normal endian order to form a 128-bit floating-point value.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_commonNaNToF128M( const struct commonNaN *aPtr, uint32_t *zWPtr )
+{
+
+ softfloat_shortShiftRight128M( (const uint32_t *) &aPtr->v0, 16, zWPtr );
+ zWPtr[indexWordHi( 4 )] |= (uint32_t) aPtr->sign<<31 | 0x7FFF8000;
+
+}
+
diff --git a/softfloat/source/8086-SSE/s_commonNaNToF128UI.c b/softfloat/source/8086-SSE/s_commonNaNToF128UI.c
new file mode 100644
index 0000000..ac8ea7b
--- /dev/null
+++ b/softfloat/source/8086-SSE/s_commonNaNToF128UI.c
@@ -0,0 +1,55 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "primitives.h"
+#include "specialize.h"
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by `aPtr' into a 128-bit floating-point
+| NaN, and returns the bit pattern of this value as an unsigned integer.
+*----------------------------------------------------------------------------*/
+struct uint128 softfloat_commonNaNToF128UI( const struct commonNaN *aPtr )
+{
+ struct uint128 uiZ;
+
+ uiZ = softfloat_shortShiftRight128( aPtr->v64, aPtr->v0, 16 );
+ uiZ.v64 |= (uint_fast64_t) aPtr->sign<<63 | UINT64_C( 0x7FFF800000000000 );
+ return uiZ;
+
+}
+
diff --git a/softfloat/source/8086-SSE/s_commonNaNToF16UI.c b/softfloat/source/8086-SSE/s_commonNaNToF16UI.c
new file mode 100644
index 0000000..07679d7
--- /dev/null
+++ b/softfloat/source/8086-SSE/s_commonNaNToF16UI.c
@@ -0,0 +1,51 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "specialize.h"
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by `aPtr' into a 16-bit floating-point
+| NaN, and returns the bit pattern of this value as an unsigned integer.
+*----------------------------------------------------------------------------*/
+uint_fast16_t softfloat_commonNaNToF16UI( const struct commonNaN *aPtr )
+{
+
+ return (uint_fast16_t) aPtr->sign<<15 | 0x7E00 | aPtr->v64>>54;
+
+}
+
diff --git a/softfloat/source/8086-SSE/s_commonNaNToF32UI.c b/softfloat/source/8086-SSE/s_commonNaNToF32UI.c
new file mode 100644
index 0000000..982c1ed
--- /dev/null
+++ b/softfloat/source/8086-SSE/s_commonNaNToF32UI.c
@@ -0,0 +1,51 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "specialize.h"
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by `aPtr' into a 32-bit floating-point
+| NaN, and returns the bit pattern of this value as an unsigned integer.
+*----------------------------------------------------------------------------*/
+uint_fast32_t softfloat_commonNaNToF32UI( const struct commonNaN *aPtr )
+{
+
+ return (uint_fast32_t) aPtr->sign<<31 | 0x7FC00000 | aPtr->v64>>41;
+
+}
+
diff --git a/softfloat/source/8086-SSE/s_commonNaNToF64UI.c b/softfloat/source/8086-SSE/s_commonNaNToF64UI.c
new file mode 100644
index 0000000..d88c68a
--- /dev/null
+++ b/softfloat/source/8086-SSE/s_commonNaNToF64UI.c
@@ -0,0 +1,53 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "specialize.h"
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by `aPtr' into a 64-bit floating-point
+| NaN, and returns the bit pattern of this value as an unsigned integer.
+*----------------------------------------------------------------------------*/
+uint_fast64_t softfloat_commonNaNToF64UI( const struct commonNaN *aPtr )
+{
+
+ return
+ (uint_fast64_t) aPtr->sign<<63 | UINT64_C( 0x7FF8000000000000 )
+ | aPtr->v64>>12;
+
+}
+
diff --git a/softfloat/source/8086-SSE/s_extF80MToCommonNaN.c b/softfloat/source/8086-SSE/s_extF80MToCommonNaN.c
new file mode 100644
index 0000000..6bf45cf
--- /dev/null
+++ b/softfloat/source/8086-SSE/s_extF80MToCommonNaN.c
@@ -0,0 +1,62 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Assuming the 80-bit extended floating-point value pointed to by `aSPtr' is
+| a NaN, converts this NaN to the common NaN form, and stores the resulting
+| common NaN at the location pointed to by `zPtr'. If the NaN is a signaling
+| NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_extF80MToCommonNaN(
+ const struct extFloat80M *aSPtr, struct commonNaN *zPtr )
+{
+
+ if ( extF80M_isSignalingNaN( (const extFloat80_t *) aSPtr ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ zPtr->sign = signExtF80UI64( aSPtr->signExp );
+ zPtr->v64 = aSPtr->signif<<1;
+ zPtr->v0 = 0;
+
+}
+
diff --git a/softfloat/source/8086-SSE/s_extF80UIToCommonNaN.c b/softfloat/source/8086-SSE/s_extF80UIToCommonNaN.c
new file mode 100644
index 0000000..8b8c927
--- /dev/null
+++ b/softfloat/source/8086-SSE/s_extF80UIToCommonNaN.c
@@ -0,0 +1,62 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Assuming the unsigned integer formed from concatenating `uiA64' and `uiA0'
+| has the bit pattern of an 80-bit extended floating-point NaN, converts
+| this NaN to the common NaN form, and stores the resulting common NaN at the
+| location pointed to by `zPtr'. If the NaN is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_extF80UIToCommonNaN(
+ uint_fast16_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr )
+{
+
+ if ( softfloat_isSigNaNExtF80UI( uiA64, uiA0 ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ zPtr->sign = uiA64>>15;
+ zPtr->v64 = uiA0<<1;
+ zPtr->v0 = 0;
+
+}
+
diff --git a/softfloat/source/8086-SSE/s_f128MToCommonNaN.c b/softfloat/source/8086-SSE/s_f128MToCommonNaN.c
new file mode 100644
index 0000000..2215214
--- /dev/null
+++ b/softfloat/source/8086-SSE/s_f128MToCommonNaN.c
@@ -0,0 +1,62 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "primitives.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Assuming the 128-bit floating-point value pointed to by `aWPtr' is a NaN,
+| converts this NaN to the common NaN form, and stores the resulting common
+| NaN at the location pointed to by `zPtr'. If the NaN is a signaling NaN,
+| the invalid exception is raised. Argument `aWPtr' points to an array of
+| four 32-bit elements that concatenate in the platform's normal endian order
+| to form a 128-bit floating-point value.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_f128MToCommonNaN( const uint32_t *aWPtr, struct commonNaN *zPtr )
+{
+
+ if ( f128M_isSignalingNaN( (const float128_t *) aWPtr ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ zPtr->sign = aWPtr[indexWordHi( 4 )]>>31;
+ softfloat_shortShiftLeft128M( aWPtr, 16, (uint32_t *) &zPtr->v0 );
+
+}
+
diff --git a/softfloat/source/8086-SSE/s_f128UIToCommonNaN.c b/softfloat/source/8086-SSE/s_f128UIToCommonNaN.c
new file mode 100644
index 0000000..2510c07
--- /dev/null
+++ b/softfloat/source/8086-SSE/s_f128UIToCommonNaN.c
@@ -0,0 +1,65 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "primitives.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Assuming the unsigned integer formed from concatenating `uiA64' and `uiA0'
+| has the bit pattern of a 128-bit floating-point NaN, converts this NaN to
+| the common NaN form, and stores the resulting common NaN at the location
+| pointed to by `zPtr'. If the NaN is a signaling NaN, the invalid exception
+| is raised.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_f128UIToCommonNaN(
+ uint_fast64_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr )
+{
+ struct uint128 NaNSig;
+
+ if ( softfloat_isSigNaNF128UI( uiA64, uiA0 ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ NaNSig = softfloat_shortShiftLeft128( uiA64, uiA0, 16 );
+ zPtr->sign = uiA64>>63;
+ zPtr->v64 = NaNSig.v64;
+ zPtr->v0 = NaNSig.v0;
+
+}
+
diff --git a/softfloat/source/8086-SSE/s_f16UIToCommonNaN.c b/softfloat/source/8086-SSE/s_f16UIToCommonNaN.c
new file mode 100644
index 0000000..4d5003f
--- /dev/null
+++ b/softfloat/source/8086-SSE/s_f16UIToCommonNaN.c
@@ -0,0 +1,59 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Assuming `uiA' has the bit pattern of a 16-bit floating-point NaN, converts
+| this NaN to the common NaN form, and stores the resulting common NaN at the
+| location pointed to by `zPtr'. If the NaN is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+void softfloat_f16UIToCommonNaN( uint_fast16_t uiA, struct commonNaN *zPtr )
+{
+
+ if ( softfloat_isSigNaNF16UI( uiA ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ zPtr->sign = uiA>>15;
+ zPtr->v64 = (uint_fast64_t) uiA<<54;
+ zPtr->v0 = 0;
+
+}
+
diff --git a/softfloat/source/8086-SSE/s_f32UIToCommonNaN.c b/softfloat/source/8086-SSE/s_f32UIToCommonNaN.c
new file mode 100644
index 0000000..f4734db
--- /dev/null
+++ b/softfloat/source/8086-SSE/s_f32UIToCommonNaN.c
@@ -0,0 +1,59 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Assuming `uiA' has the bit pattern of a 32-bit floating-point NaN, converts
+| this NaN to the common NaN form, and stores the resulting common NaN at the
+| location pointed to by `zPtr'. If the NaN is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+void softfloat_f32UIToCommonNaN( uint_fast32_t uiA, struct commonNaN *zPtr )
+{
+
+ if ( softfloat_isSigNaNF32UI( uiA ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ zPtr->sign = uiA>>31;
+ zPtr->v64 = (uint_fast64_t) uiA<<41;
+ zPtr->v0 = 0;
+
+}
+
diff --git a/softfloat/source/8086-SSE/s_f64UIToCommonNaN.c b/softfloat/source/8086-SSE/s_f64UIToCommonNaN.c
new file mode 100644
index 0000000..9a481a7
--- /dev/null
+++ b/softfloat/source/8086-SSE/s_f64UIToCommonNaN.c
@@ -0,0 +1,59 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Assuming `uiA' has the bit pattern of a 64-bit floating-point NaN, converts
+| this NaN to the common NaN form, and stores the resulting common NaN at the
+| location pointed to by `zPtr'. If the NaN is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+void softfloat_f64UIToCommonNaN( uint_fast64_t uiA, struct commonNaN *zPtr )
+{
+
+ if ( softfloat_isSigNaNF64UI( uiA ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ zPtr->sign = uiA>>63;
+ zPtr->v64 = uiA<<12;
+ zPtr->v0 = 0;
+
+}
+
diff --git a/softfloat/source/8086-SSE/s_propagateNaNExtF80M.c b/softfloat/source/8086-SSE/s_propagateNaNExtF80M.c
new file mode 100644
index 0000000..f35e066
--- /dev/null
+++ b/softfloat/source/8086-SSE/s_propagateNaNExtF80M.c
@@ -0,0 +1,107 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Assuming at least one of the two 80-bit extended floating-point values
+| pointed to by `aSPtr' and `bSPtr' is a NaN, stores the combined NaN result
+| at the location pointed to by `zSPtr'. If either original floating-point
+| value is a signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_propagateNaNExtF80M(
+ const struct extFloat80M *aSPtr,
+ const struct extFloat80M *bSPtr,
+ struct extFloat80M *zSPtr
+ )
+{
+ bool isSigNaNA;
+ const struct extFloat80M *sPtr;
+ bool isSigNaNB;
+ uint_fast16_t uiB64;
+ uint64_t uiB0;
+ uint_fast16_t uiA64;
+ uint64_t uiA0;
+ uint_fast16_t uiMagA64, uiMagB64;
+
+ isSigNaNA = extF80M_isSignalingNaN( (const extFloat80_t *) aSPtr );
+ sPtr = aSPtr;
+ if ( ! bSPtr ) {
+ if ( isSigNaNA ) softfloat_raiseFlags( softfloat_flag_invalid );
+ goto copy;
+ }
+ isSigNaNB = extF80M_isSignalingNaN( (const extFloat80_t *) bSPtr );
+ if ( isSigNaNA | isSigNaNB ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ if ( isSigNaNA ) {
+ uiB64 = bSPtr->signExp;
+ if ( isSigNaNB ) goto returnLargerUIMag;
+ uiB0 = bSPtr->signif;
+ if ( isNaNExtF80UI( uiB64, uiB0 ) ) goto copyB;
+ goto copy;
+ } else {
+ uiA64 = aSPtr->signExp;
+ uiA0 = aSPtr->signif;
+ if ( isNaNExtF80UI( uiA64, uiA0 ) ) goto copy;
+ goto copyB;
+ }
+ }
+ uiB64 = bSPtr->signExp;
+ returnLargerUIMag:
+ uiA64 = aSPtr->signExp;
+ uiMagA64 = uiA64 & 0x7FFF;
+ uiMagB64 = uiB64 & 0x7FFF;
+ if ( uiMagA64 < uiMagB64 ) goto copyB;
+ if ( uiMagB64 < uiMagA64 ) goto copy;
+ uiA0 = aSPtr->signif;
+ uiB0 = bSPtr->signif;
+ if ( uiA0 < uiB0 ) goto copyB;
+ if ( uiB0 < uiA0 ) goto copy;
+ if ( uiA64 < uiB64 ) goto copy;
+ copyB:
+ sPtr = bSPtr;
+ copy:
+ zSPtr->signExp = sPtr->signExp;
+ zSPtr->signif = sPtr->signif | UINT64_C( 0xC000000000000000 );
+
+}
+
diff --git a/softfloat/source/8086-SSE/s_propagateNaNExtF80UI.c b/softfloat/source/8086-SSE/s_propagateNaNExtF80UI.c
new file mode 100644
index 0000000..fa2daae
--- /dev/null
+++ b/softfloat/source/8086-SSE/s_propagateNaNExtF80UI.c
@@ -0,0 +1,106 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2018 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Interpreting the unsigned integer formed from concatenating 'uiA64' and
+| 'uiA0' as an 80-bit extended floating-point value, and likewise interpreting
+| the unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another
+| 80-bit extended floating-point value, and assuming at least on of these
+| floating-point values is a NaN, returns the bit pattern of the combined NaN
+| result. If either original floating-point value is a signaling NaN, the
+| invalid exception is raised.
+*----------------------------------------------------------------------------*/
+struct uint128
+ softfloat_propagateNaNExtF80UI(
+ uint_fast16_t uiA64,
+ uint_fast64_t uiA0,
+ uint_fast16_t uiB64,
+ uint_fast64_t uiB0
+ )
+{
+ bool isSigNaNA, isSigNaNB;
+ uint_fast64_t uiNonsigA0, uiNonsigB0;
+ uint_fast16_t uiMagA64, uiMagB64;
+ struct uint128 uiZ;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ isSigNaNA = softfloat_isSigNaNExtF80UI( uiA64, uiA0 );
+ isSigNaNB = softfloat_isSigNaNExtF80UI( uiB64, uiB0 );
+ /*------------------------------------------------------------------------
+ | Make NaNs non-signaling.
+ *------------------------------------------------------------------------*/
+ uiNonsigA0 = uiA0 | UINT64_C( 0xC000000000000000 );
+ uiNonsigB0 = uiB0 | UINT64_C( 0xC000000000000000 );
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( isSigNaNA | isSigNaNB ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ if ( isSigNaNA ) {
+ if ( isSigNaNB ) goto returnLargerMag;
+ if ( isNaNExtF80UI( uiB64, uiB0 ) ) goto returnB;
+ goto returnA;
+ } else {
+ if ( isNaNExtF80UI( uiA64, uiA0 ) ) goto returnA;
+ goto returnB;
+ }
+ }
+ returnLargerMag:
+ uiMagA64 = uiA64 & 0x7FFF;
+ uiMagB64 = uiB64 & 0x7FFF;
+ if ( uiMagA64 < uiMagB64 ) goto returnB;
+ if ( uiMagB64 < uiMagA64 ) goto returnA;
+ if ( uiA0 < uiB0 ) goto returnB;
+ if ( uiB0 < uiA0 ) goto returnA;
+ if ( uiA64 < uiB64 ) goto returnA;
+ returnB:
+ uiZ.v64 = uiB64;
+ uiZ.v0 = uiNonsigB0;
+ return uiZ;
+ returnA:
+ uiZ.v64 = uiA64;
+ uiZ.v0 = uiNonsigA0;
+ return uiZ;
+
+}
+
diff --git a/softfloat/source/8086-SSE/s_propagateNaNF128M.c b/softfloat/source/8086-SSE/s_propagateNaNF128M.c
new file mode 100644
index 0000000..e887274
--- /dev/null
+++ b/softfloat/source/8086-SSE/s_propagateNaNF128M.c
@@ -0,0 +1,76 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Assuming at least one of the two 128-bit floating-point values pointed to by
+| `aWPtr' and `bWPtr' is a NaN, stores the combined NaN result at the location
+| pointed to by `zWPtr'. If either original floating-point value is a
+| signaling NaN, the invalid exception is raised. Each of `aWPtr', `bWPtr',
+| and `zWPtr' points to an array of four 32-bit elements that concatenate in
+| the platform's normal endian order to form a 128-bit floating-point value.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_propagateNaNF128M(
+ const uint32_t *aWPtr, const uint32_t *bWPtr, uint32_t *zWPtr )
+{
+ bool isSigNaNA;
+ const uint32_t *ptr;
+
+ ptr = aWPtr;
+ isSigNaNA = f128M_isSignalingNaN( (const float128_t *) aWPtr );
+ if (
+ isSigNaNA
+ || (bWPtr && f128M_isSignalingNaN( (const float128_t *) bWPtr ))
+ ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ if ( isSigNaNA ) goto copy;
+ }
+ if ( ! softfloat_isNaNF128M( aWPtr ) ) ptr = bWPtr;
+ copy:
+ zWPtr[indexWordHi( 4 )] = ptr[indexWordHi( 4 )] | 0x00008000;
+ zWPtr[indexWord( 4, 2 )] = ptr[indexWord( 4, 2 )];
+ zWPtr[indexWord( 4, 1 )] = ptr[indexWord( 4, 1 )];
+ zWPtr[indexWord( 4, 0 )] = ptr[indexWord( 4, 0 )];
+
+}
+
diff --git a/softfloat/source/8086-SSE/s_propagateNaNF128UI.c b/softfloat/source/8086-SSE/s_propagateNaNF128UI.c
new file mode 100644
index 0000000..fb0e862
--- /dev/null
+++ b/softfloat/source/8086-SSE/s_propagateNaNF128UI.c
@@ -0,0 +1,81 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Interpreting the unsigned integer formed from concatenating `uiA64' and
+| `uiA0' as a 128-bit floating-point value, and likewise interpreting the
+| unsigned integer formed from concatenating `uiB64' and `uiB0' as another
+| 128-bit floating-point value, and assuming at least on of these floating-
+| point values is a NaN, returns the bit pattern of the combined NaN result.
+| If either original floating-point value is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+struct uint128
+ softfloat_propagateNaNF128UI(
+ uint_fast64_t uiA64,
+ uint_fast64_t uiA0,
+ uint_fast64_t uiB64,
+ uint_fast64_t uiB0
+ )
+{
+ bool isSigNaNA;
+ struct uint128 uiZ;
+
+ isSigNaNA = softfloat_isSigNaNF128UI( uiA64, uiA0 );
+ if ( isSigNaNA || softfloat_isSigNaNF128UI( uiB64, uiB0 ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ if ( isSigNaNA ) goto returnNonsigA;
+ }
+ if ( isNaNF128UI( uiA64, uiA0 ) ) {
+ returnNonsigA:
+ uiZ.v64 = uiA64;
+ uiZ.v0 = uiA0;
+ } else {
+ uiZ.v64 = uiB64;
+ uiZ.v0 = uiB0;
+ }
+ uiZ.v64 |= UINT64_C( 0x0000800000000000 );
+ return uiZ;
+
+}
+
diff --git a/softfloat/source/8086-SSE/s_propagateNaNF16UI.c b/softfloat/source/8086-SSE/s_propagateNaNF16UI.c
new file mode 100644
index 0000000..8e19e43
--- /dev/null
+++ b/softfloat/source/8086-SSE/s_propagateNaNF16UI.c
@@ -0,0 +1,63 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Interpreting `uiA' and `uiB' as the bit patterns of two 16-bit floating-
+| point values, at least one of which is a NaN, returns the bit pattern of
+| the combined NaN result. If either `uiA' or `uiB' has the pattern of a
+| signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+uint_fast16_t
+ softfloat_propagateNaNF16UI( uint_fast16_t uiA, uint_fast16_t uiB )
+{
+ bool isSigNaNA;
+
+ isSigNaNA = softfloat_isSigNaNF16UI( uiA );
+ if ( isSigNaNA || softfloat_isSigNaNF16UI( uiB ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ if ( isSigNaNA ) return uiA | 0x0200;
+ }
+ return (isNaNF16UI( uiA ) ? uiA : uiB) | 0x0200;
+
+}
+
diff --git a/softfloat/source/8086-SSE/s_propagateNaNF32UI.c b/softfloat/source/8086-SSE/s_propagateNaNF32UI.c
new file mode 100644
index 0000000..6e423ca
--- /dev/null
+++ b/softfloat/source/8086-SSE/s_propagateNaNF32UI.c
@@ -0,0 +1,63 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Interpreting `uiA' and `uiB' as the bit patterns of two 32-bit floating-
+| point values, at least one of which is a NaN, returns the bit pattern of
+| the combined NaN result. If either `uiA' or `uiB' has the pattern of a
+| signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+uint_fast32_t
+ softfloat_propagateNaNF32UI( uint_fast32_t uiA, uint_fast32_t uiB )
+{
+ bool isSigNaNA;
+
+ isSigNaNA = softfloat_isSigNaNF32UI( uiA );
+ if ( isSigNaNA || softfloat_isSigNaNF32UI( uiB ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ if ( isSigNaNA ) return uiA | 0x00400000;
+ }
+ return (isNaNF32UI( uiA ) ? uiA : uiB) | 0x00400000;
+
+}
+
diff --git a/softfloat/source/8086-SSE/s_propagateNaNF64UI.c b/softfloat/source/8086-SSE/s_propagateNaNF64UI.c
new file mode 100644
index 0000000..474c196
--- /dev/null
+++ b/softfloat/source/8086-SSE/s_propagateNaNF64UI.c
@@ -0,0 +1,63 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Interpreting `uiA' and `uiB' as the bit patterns of two 64-bit floating-
+| point values, at least one of which is a NaN, returns the bit pattern of
+| the combined NaN result. If either `uiA' or `uiB' has the pattern of a
+| signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+uint_fast64_t
+ softfloat_propagateNaNF64UI( uint_fast64_t uiA, uint_fast64_t uiB )
+{
+ bool isSigNaNA;
+
+ isSigNaNA = softfloat_isSigNaNF64UI( uiA );
+ if ( isSigNaNA || softfloat_isSigNaNF64UI( uiB ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ if ( isSigNaNA ) return uiA | UINT64_C( 0x0008000000000000 );
+ }
+ return (isNaNF64UI( uiA ) ? uiA : uiB) | UINT64_C( 0x0008000000000000 );
+
+}
+
diff --git a/softfloat/source/8086-SSE/softfloat_raiseFlags.c b/softfloat/source/8086-SSE/softfloat_raiseFlags.c
new file mode 100644
index 0000000..7a1aee9
--- /dev/null
+++ b/softfloat/source/8086-SSE/softfloat_raiseFlags.c
@@ -0,0 +1,52 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include "platform.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Raises the exceptions specified by `flags'. Floating-point traps can be
+| defined here if desired. It is currently not possible for such a trap
+| to substitute a result value. If traps are not implemented, this routine
+| should be simply `softfloat_exceptionFlags |= flags;'.
+*----------------------------------------------------------------------------*/
+void softfloat_raiseFlags( uint_fast8_t flags )
+{
+
+ softfloat_exceptionFlags |= flags;
+
+}
+
diff --git a/softfloat/source/8086-SSE/specialize.h b/softfloat/source/8086-SSE/specialize.h
new file mode 100644
index 0000000..a9166e1
--- /dev/null
+++ b/softfloat/source/8086-SSE/specialize.h
@@ -0,0 +1,376 @@
+
+/*============================================================================
+
+This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2018 The Regents of the
+University of California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#ifndef specialize_h
+#define specialize_h 1
+
+#include
+#include
+#include "primitiveTypes.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Default value for 'softfloat_detectTininess'.
+*----------------------------------------------------------------------------*/
+#define init_detectTininess softfloat_tininess_afterRounding
+
+/*----------------------------------------------------------------------------
+| The values to return on conversions to 32-bit integer formats that raise an
+| invalid exception.
+*----------------------------------------------------------------------------*/
+#define ui32_fromPosOverflow 0xFFFFFFFF
+#define ui32_fromNegOverflow 0xFFFFFFFF
+#define ui32_fromNaN 0xFFFFFFFF
+#define i32_fromPosOverflow (-0x7FFFFFFF - 1)
+#define i32_fromNegOverflow (-0x7FFFFFFF - 1)
+#define i32_fromNaN (-0x7FFFFFFF - 1)
+
+/*----------------------------------------------------------------------------
+| The values to return on conversions to 64-bit integer formats that raise an
+| invalid exception.
+*----------------------------------------------------------------------------*/
+#define ui64_fromPosOverflow UINT64_C( 0xFFFFFFFFFFFFFFFF )
+#define ui64_fromNegOverflow UINT64_C( 0xFFFFFFFFFFFFFFFF )
+#define ui64_fromNaN UINT64_C( 0xFFFFFFFFFFFFFFFF )
+#define i64_fromPosOverflow (-INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1)
+#define i64_fromNegOverflow (-INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1)
+#define i64_fromNaN (-INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1)
+
+/*----------------------------------------------------------------------------
+| "Common NaN" structure, used to transfer NaN representations from one format
+| to another.
+*----------------------------------------------------------------------------*/
+struct commonNaN {
+ bool sign;
+#ifdef LITTLEENDIAN
+ uint64_t v0, v64;
+#else
+ uint64_t v64, v0;
+#endif
+};
+
+/*----------------------------------------------------------------------------
+| The bit pattern for a default generated 16-bit floating-point NaN.
+*----------------------------------------------------------------------------*/
+#define defaultNaNF16UI 0xFE00
+
+/*----------------------------------------------------------------------------
+| Returns true when 16-bit unsigned integer 'uiA' has the bit pattern of a
+| 16-bit floating-point signaling NaN.
+| Note: This macro evaluates its argument more than once.
+*----------------------------------------------------------------------------*/
+#define softfloat_isSigNaNF16UI( uiA ) ((((uiA) & 0x7E00) == 0x7C00) && ((uiA) & 0x01FF))
+
+/*----------------------------------------------------------------------------
+| Assuming 'uiA' has the bit pattern of a 16-bit floating-point NaN, converts
+| this NaN to the common NaN form, and stores the resulting common NaN at the
+| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+void softfloat_f16UIToCommonNaN( uint_fast16_t uiA, struct commonNaN *zPtr );
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into a 16-bit floating-point
+| NaN, and returns the bit pattern of this value as an unsigned integer.
+*----------------------------------------------------------------------------*/
+uint_fast16_t softfloat_commonNaNToF16UI( const struct commonNaN *aPtr );
+
+/*----------------------------------------------------------------------------
+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 16-bit floating-
+| point values, at least one of which is a NaN, returns the bit pattern of
+| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a
+| signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+uint_fast16_t
+ softfloat_propagateNaNF16UI( uint_fast16_t uiA, uint_fast16_t uiB );
+
+/*----------------------------------------------------------------------------
+| The bit pattern for a default generated 32-bit floating-point NaN.
+*----------------------------------------------------------------------------*/
+#define defaultNaNF32UI 0xFFC00000
+
+/*----------------------------------------------------------------------------
+| Returns true when 32-bit unsigned integer 'uiA' has the bit pattern of a
+| 32-bit floating-point signaling NaN.
+| Note: This macro evaluates its argument more than once.
+*----------------------------------------------------------------------------*/
+#define softfloat_isSigNaNF32UI( uiA ) ((((uiA) & 0x7FC00000) == 0x7F800000) && ((uiA) & 0x003FFFFF))
+
+/*----------------------------------------------------------------------------
+| Assuming 'uiA' has the bit pattern of a 32-bit floating-point NaN, converts
+| this NaN to the common NaN form, and stores the resulting common NaN at the
+| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+void softfloat_f32UIToCommonNaN( uint_fast32_t uiA, struct commonNaN *zPtr );
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into a 32-bit floating-point
+| NaN, and returns the bit pattern of this value as an unsigned integer.
+*----------------------------------------------------------------------------*/
+uint_fast32_t softfloat_commonNaNToF32UI( const struct commonNaN *aPtr );
+
+/*----------------------------------------------------------------------------
+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 32-bit floating-
+| point values, at least one of which is a NaN, returns the bit pattern of
+| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a
+| signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+uint_fast32_t
+ softfloat_propagateNaNF32UI( uint_fast32_t uiA, uint_fast32_t uiB );
+
+/*----------------------------------------------------------------------------
+| The bit pattern for a default generated 64-bit floating-point NaN.
+*----------------------------------------------------------------------------*/
+#define defaultNaNF64UI UINT64_C( 0xFFF8000000000000 )
+
+/*----------------------------------------------------------------------------
+| Returns true when 64-bit unsigned integer 'uiA' has the bit pattern of a
+| 64-bit floating-point signaling NaN.
+| Note: This macro evaluates its argument more than once.
+*----------------------------------------------------------------------------*/
+#define softfloat_isSigNaNF64UI( uiA ) ((((uiA) & UINT64_C( 0x7FF8000000000000 )) == UINT64_C( 0x7FF0000000000000 )) && ((uiA) & UINT64_C( 0x0007FFFFFFFFFFFF )))
+
+/*----------------------------------------------------------------------------
+| Assuming 'uiA' has the bit pattern of a 64-bit floating-point NaN, converts
+| this NaN to the common NaN form, and stores the resulting common NaN at the
+| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+void softfloat_f64UIToCommonNaN( uint_fast64_t uiA, struct commonNaN *zPtr );
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into a 64-bit floating-point
+| NaN, and returns the bit pattern of this value as an unsigned integer.
+*----------------------------------------------------------------------------*/
+uint_fast64_t softfloat_commonNaNToF64UI( const struct commonNaN *aPtr );
+
+/*----------------------------------------------------------------------------
+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 64-bit floating-
+| point values, at least one of which is a NaN, returns the bit pattern of
+| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a
+| signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+uint_fast64_t
+ softfloat_propagateNaNF64UI( uint_fast64_t uiA, uint_fast64_t uiB );
+
+/*----------------------------------------------------------------------------
+| The bit pattern for a default generated 80-bit extended floating-point NaN.
+*----------------------------------------------------------------------------*/
+#define defaultNaNExtF80UI64 0xFFFF
+#define defaultNaNExtF80UI0 UINT64_C( 0xC000000000000000 )
+
+/*----------------------------------------------------------------------------
+| Returns true when the 80-bit unsigned integer formed from concatenating
+| 16-bit 'uiA64' and 64-bit 'uiA0' has the bit pattern of an 80-bit extended
+| floating-point signaling NaN.
+| Note: This macro evaluates its arguments more than once.
+*----------------------------------------------------------------------------*/
+#define softfloat_isSigNaNExtF80UI( uiA64, uiA0 ) ((((uiA64) & 0x7FFF) == 0x7FFF) && ! ((uiA0) & UINT64_C( 0x4000000000000000 )) && ((uiA0) & UINT64_C( 0x3FFFFFFFFFFFFFFF )))
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+/*----------------------------------------------------------------------------
+| The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is
+| defined.
+*----------------------------------------------------------------------------*/
+
+/*----------------------------------------------------------------------------
+| Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0'
+| has the bit pattern of an 80-bit extended floating-point NaN, converts
+| this NaN to the common NaN form, and stores the resulting common NaN at the
+| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_extF80UIToCommonNaN(
+ uint_fast16_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr );
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended
+| floating-point NaN, and returns the bit pattern of this value as an unsigned
+| integer.
+*----------------------------------------------------------------------------*/
+struct uint128 softfloat_commonNaNToExtF80UI( const struct commonNaN *aPtr );
+
+/*----------------------------------------------------------------------------
+| Interpreting the unsigned integer formed from concatenating 'uiA64' and
+| 'uiA0' as an 80-bit extended floating-point value, and likewise interpreting
+| the unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another
+| 80-bit extended floating-point value, and assuming at least on of these
+| floating-point values is a NaN, returns the bit pattern of the combined NaN
+| result. If either original floating-point value is a signaling NaN, the
+| invalid exception is raised.
+*----------------------------------------------------------------------------*/
+struct uint128
+ softfloat_propagateNaNExtF80UI(
+ uint_fast16_t uiA64,
+ uint_fast64_t uiA0,
+ uint_fast16_t uiB64,
+ uint_fast64_t uiB0
+ );
+
+/*----------------------------------------------------------------------------
+| The bit pattern for a default generated 128-bit floating-point NaN.
+*----------------------------------------------------------------------------*/
+#define defaultNaNF128UI64 UINT64_C( 0xFFFF800000000000 )
+#define defaultNaNF128UI0 UINT64_C( 0 )
+
+/*----------------------------------------------------------------------------
+| Returns true when the 128-bit unsigned integer formed from concatenating
+| 64-bit 'uiA64' and 64-bit 'uiA0' has the bit pattern of a 128-bit floating-
+| point signaling NaN.
+| Note: This macro evaluates its arguments more than once.
+*----------------------------------------------------------------------------*/
+#define softfloat_isSigNaNF128UI( uiA64, uiA0 ) ((((uiA64) & UINT64_C( 0x7FFF800000000000 )) == UINT64_C( 0x7FFF000000000000 )) && ((uiA0) || ((uiA64) & UINT64_C( 0x00007FFFFFFFFFFF ))))
+
+/*----------------------------------------------------------------------------
+| Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0'
+| has the bit pattern of a 128-bit floating-point NaN, converts this NaN to
+| the common NaN form, and stores the resulting common NaN at the location
+| pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid exception
+| is raised.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_f128UIToCommonNaN(
+ uint_fast64_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr );
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point
+| NaN, and returns the bit pattern of this value as an unsigned integer.
+*----------------------------------------------------------------------------*/
+struct uint128 softfloat_commonNaNToF128UI( const struct commonNaN * );
+
+/*----------------------------------------------------------------------------
+| Interpreting the unsigned integer formed from concatenating 'uiA64' and
+| 'uiA0' as a 128-bit floating-point value, and likewise interpreting the
+| unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another
+| 128-bit floating-point value, and assuming at least on of these floating-
+| point values is a NaN, returns the bit pattern of the combined NaN result.
+| If either original floating-point value is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+struct uint128
+ softfloat_propagateNaNF128UI(
+ uint_fast64_t uiA64,
+ uint_fast64_t uiA0,
+ uint_fast64_t uiB64,
+ uint_fast64_t uiB0
+ );
+
+#else
+
+/*----------------------------------------------------------------------------
+| The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is not
+| defined.
+*----------------------------------------------------------------------------*/
+
+/*----------------------------------------------------------------------------
+| Assuming the 80-bit extended floating-point value pointed to by 'aSPtr' is
+| a NaN, converts this NaN to the common NaN form, and stores the resulting
+| common NaN at the location pointed to by 'zPtr'. If the NaN is a signaling
+| NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_extF80MToCommonNaN(
+ const struct extFloat80M *aSPtr, struct commonNaN *zPtr );
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended
+| floating-point NaN, and stores this NaN at the location pointed to by
+| 'zSPtr'.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_commonNaNToExtF80M(
+ const struct commonNaN *aPtr, struct extFloat80M *zSPtr );
+
+/*----------------------------------------------------------------------------
+| Assuming at least one of the two 80-bit extended floating-point values
+| pointed to by 'aSPtr' and 'bSPtr' is a NaN, stores the combined NaN result
+| at the location pointed to by 'zSPtr'. If either original floating-point
+| value is a signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_propagateNaNExtF80M(
+ const struct extFloat80M *aSPtr,
+ const struct extFloat80M *bSPtr,
+ struct extFloat80M *zSPtr
+ );
+
+/*----------------------------------------------------------------------------
+| The bit pattern for a default generated 128-bit floating-point NaN.
+*----------------------------------------------------------------------------*/
+#define defaultNaNF128UI96 0xFFFF8000
+#define defaultNaNF128UI64 0
+#define defaultNaNF128UI32 0
+#define defaultNaNF128UI0 0
+
+/*----------------------------------------------------------------------------
+| Assuming the 128-bit floating-point value pointed to by 'aWPtr' is a NaN,
+| converts this NaN to the common NaN form, and stores the resulting common
+| NaN at the location pointed to by 'zPtr'. If the NaN is a signaling NaN,
+| the invalid exception is raised. Argument 'aWPtr' points to an array of
+| four 32-bit elements that concatenate in the platform's normal endian order
+| to form a 128-bit floating-point value.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_f128MToCommonNaN( const uint32_t *aWPtr, struct commonNaN *zPtr );
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point
+| NaN, and stores this NaN at the location pointed to by 'zWPtr'. Argument
+| 'zWPtr' points to an array of four 32-bit elements that concatenate in the
+| platform's normal endian order to form a 128-bit floating-point value.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_commonNaNToF128M( const struct commonNaN *aPtr, uint32_t *zWPtr );
+
+/*----------------------------------------------------------------------------
+| Assuming at least one of the two 128-bit floating-point values pointed to by
+| 'aWPtr' and 'bWPtr' is a NaN, stores the combined NaN result at the location
+| pointed to by 'zWPtr'. If either original floating-point value is a
+| signaling NaN, the invalid exception is raised. Each of 'aWPtr', 'bWPtr',
+| and 'zWPtr' points to an array of four 32-bit elements that concatenate in
+| the platform's normal endian order to form a 128-bit floating-point value.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_propagateNaNF128M(
+ const uint32_t *aWPtr, const uint32_t *bWPtr, uint32_t *zWPtr );
+
+#endif
+
+#endif
+
diff --git a/softfloat/source/8086/extF80M_isSignalingNaN.c b/softfloat/source/8086/extF80M_isSignalingNaN.c
new file mode 100644
index 0000000..c2cca65
--- /dev/null
+++ b/softfloat/source/8086/extF80M_isSignalingNaN.c
@@ -0,0 +1,57 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+bool extF80M_isSignalingNaN( const extFloat80_t *aPtr )
+{
+ const struct extFloat80M *aSPtr;
+ uint64_t uiA0;
+
+ aSPtr = (const struct extFloat80M *) aPtr;
+ if ( (aSPtr->signExp & 0x7FFF) != 0x7FFF ) return false;
+ uiA0 = aSPtr->signif;
+ return
+ ! (uiA0 & UINT64_C( 0x4000000000000000 ))
+ && (uiA0 & UINT64_C( 0x3FFFFFFFFFFFFFFF));
+
+}
+
diff --git a/softfloat/source/8086/f128M_isSignalingNaN.c b/softfloat/source/8086/f128M_isSignalingNaN.c
new file mode 100644
index 0000000..9ff83d7
--- /dev/null
+++ b/softfloat/source/8086/f128M_isSignalingNaN.c
@@ -0,0 +1,60 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "primitives.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+bool f128M_isSignalingNaN( const float128_t *aPtr )
+{
+ const uint32_t *aWPtr;
+ uint32_t uiA96;
+
+ aWPtr = (const uint32_t *) aPtr;
+ uiA96 = aWPtr[indexWordHi( 4 )];
+ if ( (uiA96 & 0x7FFF8000) != 0x7FFF0000 ) return false;
+ return
+ ((uiA96 & 0x00007FFF) != 0)
+ || ((aWPtr[indexWord( 4, 2 )] | aWPtr[indexWord( 4, 1 )]
+ | aWPtr[indexWord( 4, 0 )])
+ != 0);
+
+}
+
diff --git a/softfloat/source/8086/s_commonNaNToExtF80M.c b/softfloat/source/8086/s_commonNaNToExtF80M.c
new file mode 100644
index 0000000..06302aa
--- /dev/null
+++ b/softfloat/source/8086/s_commonNaNToExtF80M.c
@@ -0,0 +1,56 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by `aPtr' into an 80-bit extended
+| floating-point NaN, and stores this NaN at the location pointed to by
+| `zSPtr'.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_commonNaNToExtF80M(
+ const struct commonNaN *aPtr, struct extFloat80M *zSPtr )
+{
+
+ zSPtr->signExp = packToExtF80UI64( aPtr->sign, 0x7FFF );
+ zSPtr->signif = UINT64_C( 0xC000000000000000 ) | aPtr->v64>>1;
+
+}
+
diff --git a/softfloat/source/8086/s_commonNaNToExtF80UI.c b/softfloat/source/8086/s_commonNaNToExtF80UI.c
new file mode 100644
index 0000000..7325468
--- /dev/null
+++ b/softfloat/source/8086/s_commonNaNToExtF80UI.c
@@ -0,0 +1,56 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "primitives.h"
+#include "specialize.h"
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by `aPtr' into an 80-bit extended
+| floating-point NaN, and returns the bit pattern of this value as an unsigned
+| integer.
+*----------------------------------------------------------------------------*/
+struct uint128 softfloat_commonNaNToExtF80UI( const struct commonNaN *aPtr )
+{
+ struct uint128 uiZ;
+
+ uiZ.v64 = (uint_fast16_t) aPtr->sign<<15 | 0x7FFF;
+ uiZ.v0 = UINT64_C( 0xC000000000000000 ) | aPtr->v64>>1;
+ return uiZ;
+
+}
+
diff --git a/softfloat/source/8086/s_commonNaNToF128M.c b/softfloat/source/8086/s_commonNaNToF128M.c
new file mode 100644
index 0000000..e2940bb
--- /dev/null
+++ b/softfloat/source/8086/s_commonNaNToF128M.c
@@ -0,0 +1,56 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "primitives.h"
+#include "specialize.h"
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by `aPtr' into a 128-bit floating-point
+| NaN, and stores this NaN at the location pointed to by `zWPtr'. Argument
+| `zWPtr' points to an array of four 32-bit elements that concatenate in the
+| platform's normal endian order to form a 128-bit floating-point value.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_commonNaNToF128M( const struct commonNaN *aPtr, uint32_t *zWPtr )
+{
+
+ softfloat_shortShiftRight128M( (const uint32_t *) &aPtr->v0, 16, zWPtr );
+ zWPtr[indexWordHi( 4 )] |= (uint32_t) aPtr->sign<<31 | 0x7FFF8000;
+
+}
+
diff --git a/softfloat/source/8086/s_commonNaNToF128UI.c b/softfloat/source/8086/s_commonNaNToF128UI.c
new file mode 100644
index 0000000..ac8ea7b
--- /dev/null
+++ b/softfloat/source/8086/s_commonNaNToF128UI.c
@@ -0,0 +1,55 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "primitives.h"
+#include "specialize.h"
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by `aPtr' into a 128-bit floating-point
+| NaN, and returns the bit pattern of this value as an unsigned integer.
+*----------------------------------------------------------------------------*/
+struct uint128 softfloat_commonNaNToF128UI( const struct commonNaN *aPtr )
+{
+ struct uint128 uiZ;
+
+ uiZ = softfloat_shortShiftRight128( aPtr->v64, aPtr->v0, 16 );
+ uiZ.v64 |= (uint_fast64_t) aPtr->sign<<63 | UINT64_C( 0x7FFF800000000000 );
+ return uiZ;
+
+}
+
diff --git a/softfloat/source/8086/s_commonNaNToF16UI.c b/softfloat/source/8086/s_commonNaNToF16UI.c
new file mode 100644
index 0000000..07679d7
--- /dev/null
+++ b/softfloat/source/8086/s_commonNaNToF16UI.c
@@ -0,0 +1,51 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "specialize.h"
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by `aPtr' into a 16-bit floating-point
+| NaN, and returns the bit pattern of this value as an unsigned integer.
+*----------------------------------------------------------------------------*/
+uint_fast16_t softfloat_commonNaNToF16UI( const struct commonNaN *aPtr )
+{
+
+ return (uint_fast16_t) aPtr->sign<<15 | 0x7E00 | aPtr->v64>>54;
+
+}
+
diff --git a/softfloat/source/8086/s_commonNaNToF32UI.c b/softfloat/source/8086/s_commonNaNToF32UI.c
new file mode 100644
index 0000000..982c1ed
--- /dev/null
+++ b/softfloat/source/8086/s_commonNaNToF32UI.c
@@ -0,0 +1,51 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "specialize.h"
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by `aPtr' into a 32-bit floating-point
+| NaN, and returns the bit pattern of this value as an unsigned integer.
+*----------------------------------------------------------------------------*/
+uint_fast32_t softfloat_commonNaNToF32UI( const struct commonNaN *aPtr )
+{
+
+ return (uint_fast32_t) aPtr->sign<<31 | 0x7FC00000 | aPtr->v64>>41;
+
+}
+
diff --git a/softfloat/source/8086/s_commonNaNToF64UI.c b/softfloat/source/8086/s_commonNaNToF64UI.c
new file mode 100644
index 0000000..d88c68a
--- /dev/null
+++ b/softfloat/source/8086/s_commonNaNToF64UI.c
@@ -0,0 +1,53 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "specialize.h"
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by `aPtr' into a 64-bit floating-point
+| NaN, and returns the bit pattern of this value as an unsigned integer.
+*----------------------------------------------------------------------------*/
+uint_fast64_t softfloat_commonNaNToF64UI( const struct commonNaN *aPtr )
+{
+
+ return
+ (uint_fast64_t) aPtr->sign<<63 | UINT64_C( 0x7FF8000000000000 )
+ | aPtr->v64>>12;
+
+}
+
diff --git a/softfloat/source/8086/s_extF80MToCommonNaN.c b/softfloat/source/8086/s_extF80MToCommonNaN.c
new file mode 100644
index 0000000..6bf45cf
--- /dev/null
+++ b/softfloat/source/8086/s_extF80MToCommonNaN.c
@@ -0,0 +1,62 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Assuming the 80-bit extended floating-point value pointed to by `aSPtr' is
+| a NaN, converts this NaN to the common NaN form, and stores the resulting
+| common NaN at the location pointed to by `zPtr'. If the NaN is a signaling
+| NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_extF80MToCommonNaN(
+ const struct extFloat80M *aSPtr, struct commonNaN *zPtr )
+{
+
+ if ( extF80M_isSignalingNaN( (const extFloat80_t *) aSPtr ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ zPtr->sign = signExtF80UI64( aSPtr->signExp );
+ zPtr->v64 = aSPtr->signif<<1;
+ zPtr->v0 = 0;
+
+}
+
diff --git a/softfloat/source/8086/s_extF80UIToCommonNaN.c b/softfloat/source/8086/s_extF80UIToCommonNaN.c
new file mode 100644
index 0000000..8b8c927
--- /dev/null
+++ b/softfloat/source/8086/s_extF80UIToCommonNaN.c
@@ -0,0 +1,62 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Assuming the unsigned integer formed from concatenating `uiA64' and `uiA0'
+| has the bit pattern of an 80-bit extended floating-point NaN, converts
+| this NaN to the common NaN form, and stores the resulting common NaN at the
+| location pointed to by `zPtr'. If the NaN is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_extF80UIToCommonNaN(
+ uint_fast16_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr )
+{
+
+ if ( softfloat_isSigNaNExtF80UI( uiA64, uiA0 ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ zPtr->sign = uiA64>>15;
+ zPtr->v64 = uiA0<<1;
+ zPtr->v0 = 0;
+
+}
+
diff --git a/softfloat/source/8086/s_f128MToCommonNaN.c b/softfloat/source/8086/s_f128MToCommonNaN.c
new file mode 100644
index 0000000..2215214
--- /dev/null
+++ b/softfloat/source/8086/s_f128MToCommonNaN.c
@@ -0,0 +1,62 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "primitives.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Assuming the 128-bit floating-point value pointed to by `aWPtr' is a NaN,
+| converts this NaN to the common NaN form, and stores the resulting common
+| NaN at the location pointed to by `zPtr'. If the NaN is a signaling NaN,
+| the invalid exception is raised. Argument `aWPtr' points to an array of
+| four 32-bit elements that concatenate in the platform's normal endian order
+| to form a 128-bit floating-point value.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_f128MToCommonNaN( const uint32_t *aWPtr, struct commonNaN *zPtr )
+{
+
+ if ( f128M_isSignalingNaN( (const float128_t *) aWPtr ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ zPtr->sign = aWPtr[indexWordHi( 4 )]>>31;
+ softfloat_shortShiftLeft128M( aWPtr, 16, (uint32_t *) &zPtr->v0 );
+
+}
+
diff --git a/softfloat/source/8086/s_f128UIToCommonNaN.c b/softfloat/source/8086/s_f128UIToCommonNaN.c
new file mode 100644
index 0000000..2510c07
--- /dev/null
+++ b/softfloat/source/8086/s_f128UIToCommonNaN.c
@@ -0,0 +1,65 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "primitives.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Assuming the unsigned integer formed from concatenating `uiA64' and `uiA0'
+| has the bit pattern of a 128-bit floating-point NaN, converts this NaN to
+| the common NaN form, and stores the resulting common NaN at the location
+| pointed to by `zPtr'. If the NaN is a signaling NaN, the invalid exception
+| is raised.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_f128UIToCommonNaN(
+ uint_fast64_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr )
+{
+ struct uint128 NaNSig;
+
+ if ( softfloat_isSigNaNF128UI( uiA64, uiA0 ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ NaNSig = softfloat_shortShiftLeft128( uiA64, uiA0, 16 );
+ zPtr->sign = uiA64>>63;
+ zPtr->v64 = NaNSig.v64;
+ zPtr->v0 = NaNSig.v0;
+
+}
+
diff --git a/softfloat/source/8086/s_f16UIToCommonNaN.c b/softfloat/source/8086/s_f16UIToCommonNaN.c
new file mode 100644
index 0000000..4d5003f
--- /dev/null
+++ b/softfloat/source/8086/s_f16UIToCommonNaN.c
@@ -0,0 +1,59 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Assuming `uiA' has the bit pattern of a 16-bit floating-point NaN, converts
+| this NaN to the common NaN form, and stores the resulting common NaN at the
+| location pointed to by `zPtr'. If the NaN is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+void softfloat_f16UIToCommonNaN( uint_fast16_t uiA, struct commonNaN *zPtr )
+{
+
+ if ( softfloat_isSigNaNF16UI( uiA ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ zPtr->sign = uiA>>15;
+ zPtr->v64 = (uint_fast64_t) uiA<<54;
+ zPtr->v0 = 0;
+
+}
+
diff --git a/softfloat/source/8086/s_f32UIToCommonNaN.c b/softfloat/source/8086/s_f32UIToCommonNaN.c
new file mode 100644
index 0000000..f4734db
--- /dev/null
+++ b/softfloat/source/8086/s_f32UIToCommonNaN.c
@@ -0,0 +1,59 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Assuming `uiA' has the bit pattern of a 32-bit floating-point NaN, converts
+| this NaN to the common NaN form, and stores the resulting common NaN at the
+| location pointed to by `zPtr'. If the NaN is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+void softfloat_f32UIToCommonNaN( uint_fast32_t uiA, struct commonNaN *zPtr )
+{
+
+ if ( softfloat_isSigNaNF32UI( uiA ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ zPtr->sign = uiA>>31;
+ zPtr->v64 = (uint_fast64_t) uiA<<41;
+ zPtr->v0 = 0;
+
+}
+
diff --git a/softfloat/source/8086/s_f64UIToCommonNaN.c b/softfloat/source/8086/s_f64UIToCommonNaN.c
new file mode 100644
index 0000000..9a481a7
--- /dev/null
+++ b/softfloat/source/8086/s_f64UIToCommonNaN.c
@@ -0,0 +1,59 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Assuming `uiA' has the bit pattern of a 64-bit floating-point NaN, converts
+| this NaN to the common NaN form, and stores the resulting common NaN at the
+| location pointed to by `zPtr'. If the NaN is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+void softfloat_f64UIToCommonNaN( uint_fast64_t uiA, struct commonNaN *zPtr )
+{
+
+ if ( softfloat_isSigNaNF64UI( uiA ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ zPtr->sign = uiA>>63;
+ zPtr->v64 = uiA<<12;
+ zPtr->v0 = 0;
+
+}
+
diff --git a/softfloat/source/8086/s_propagateNaNExtF80M.c b/softfloat/source/8086/s_propagateNaNExtF80M.c
new file mode 100644
index 0000000..f35e066
--- /dev/null
+++ b/softfloat/source/8086/s_propagateNaNExtF80M.c
@@ -0,0 +1,107 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Assuming at least one of the two 80-bit extended floating-point values
+| pointed to by `aSPtr' and `bSPtr' is a NaN, stores the combined NaN result
+| at the location pointed to by `zSPtr'. If either original floating-point
+| value is a signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_propagateNaNExtF80M(
+ const struct extFloat80M *aSPtr,
+ const struct extFloat80M *bSPtr,
+ struct extFloat80M *zSPtr
+ )
+{
+ bool isSigNaNA;
+ const struct extFloat80M *sPtr;
+ bool isSigNaNB;
+ uint_fast16_t uiB64;
+ uint64_t uiB0;
+ uint_fast16_t uiA64;
+ uint64_t uiA0;
+ uint_fast16_t uiMagA64, uiMagB64;
+
+ isSigNaNA = extF80M_isSignalingNaN( (const extFloat80_t *) aSPtr );
+ sPtr = aSPtr;
+ if ( ! bSPtr ) {
+ if ( isSigNaNA ) softfloat_raiseFlags( softfloat_flag_invalid );
+ goto copy;
+ }
+ isSigNaNB = extF80M_isSignalingNaN( (const extFloat80_t *) bSPtr );
+ if ( isSigNaNA | isSigNaNB ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ if ( isSigNaNA ) {
+ uiB64 = bSPtr->signExp;
+ if ( isSigNaNB ) goto returnLargerUIMag;
+ uiB0 = bSPtr->signif;
+ if ( isNaNExtF80UI( uiB64, uiB0 ) ) goto copyB;
+ goto copy;
+ } else {
+ uiA64 = aSPtr->signExp;
+ uiA0 = aSPtr->signif;
+ if ( isNaNExtF80UI( uiA64, uiA0 ) ) goto copy;
+ goto copyB;
+ }
+ }
+ uiB64 = bSPtr->signExp;
+ returnLargerUIMag:
+ uiA64 = aSPtr->signExp;
+ uiMagA64 = uiA64 & 0x7FFF;
+ uiMagB64 = uiB64 & 0x7FFF;
+ if ( uiMagA64 < uiMagB64 ) goto copyB;
+ if ( uiMagB64 < uiMagA64 ) goto copy;
+ uiA0 = aSPtr->signif;
+ uiB0 = bSPtr->signif;
+ if ( uiA0 < uiB0 ) goto copyB;
+ if ( uiB0 < uiA0 ) goto copy;
+ if ( uiA64 < uiB64 ) goto copy;
+ copyB:
+ sPtr = bSPtr;
+ copy:
+ zSPtr->signExp = sPtr->signExp;
+ zSPtr->signif = sPtr->signif | UINT64_C( 0xC000000000000000 );
+
+}
+
diff --git a/softfloat/source/8086/s_propagateNaNExtF80UI.c b/softfloat/source/8086/s_propagateNaNExtF80UI.c
new file mode 100644
index 0000000..fa2daae
--- /dev/null
+++ b/softfloat/source/8086/s_propagateNaNExtF80UI.c
@@ -0,0 +1,106 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2018 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Interpreting the unsigned integer formed from concatenating 'uiA64' and
+| 'uiA0' as an 80-bit extended floating-point value, and likewise interpreting
+| the unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another
+| 80-bit extended floating-point value, and assuming at least on of these
+| floating-point values is a NaN, returns the bit pattern of the combined NaN
+| result. If either original floating-point value is a signaling NaN, the
+| invalid exception is raised.
+*----------------------------------------------------------------------------*/
+struct uint128
+ softfloat_propagateNaNExtF80UI(
+ uint_fast16_t uiA64,
+ uint_fast64_t uiA0,
+ uint_fast16_t uiB64,
+ uint_fast64_t uiB0
+ )
+{
+ bool isSigNaNA, isSigNaNB;
+ uint_fast64_t uiNonsigA0, uiNonsigB0;
+ uint_fast16_t uiMagA64, uiMagB64;
+ struct uint128 uiZ;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ isSigNaNA = softfloat_isSigNaNExtF80UI( uiA64, uiA0 );
+ isSigNaNB = softfloat_isSigNaNExtF80UI( uiB64, uiB0 );
+ /*------------------------------------------------------------------------
+ | Make NaNs non-signaling.
+ *------------------------------------------------------------------------*/
+ uiNonsigA0 = uiA0 | UINT64_C( 0xC000000000000000 );
+ uiNonsigB0 = uiB0 | UINT64_C( 0xC000000000000000 );
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( isSigNaNA | isSigNaNB ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ if ( isSigNaNA ) {
+ if ( isSigNaNB ) goto returnLargerMag;
+ if ( isNaNExtF80UI( uiB64, uiB0 ) ) goto returnB;
+ goto returnA;
+ } else {
+ if ( isNaNExtF80UI( uiA64, uiA0 ) ) goto returnA;
+ goto returnB;
+ }
+ }
+ returnLargerMag:
+ uiMagA64 = uiA64 & 0x7FFF;
+ uiMagB64 = uiB64 & 0x7FFF;
+ if ( uiMagA64 < uiMagB64 ) goto returnB;
+ if ( uiMagB64 < uiMagA64 ) goto returnA;
+ if ( uiA0 < uiB0 ) goto returnB;
+ if ( uiB0 < uiA0 ) goto returnA;
+ if ( uiA64 < uiB64 ) goto returnA;
+ returnB:
+ uiZ.v64 = uiB64;
+ uiZ.v0 = uiNonsigB0;
+ return uiZ;
+ returnA:
+ uiZ.v64 = uiA64;
+ uiZ.v0 = uiNonsigA0;
+ return uiZ;
+
+}
+
diff --git a/softfloat/source/8086/s_propagateNaNF128M.c b/softfloat/source/8086/s_propagateNaNF128M.c
new file mode 100644
index 0000000..7ac2e5f
--- /dev/null
+++ b/softfloat/source/8086/s_propagateNaNF128M.c
@@ -0,0 +1,108 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Assuming at least one of the two 128-bit floating-point values pointed to by
+| `aWPtr' and `bWPtr' is a NaN, stores the combined NaN result at the location
+| pointed to by `zWPtr'. If either original floating-point value is a
+| signaling NaN, the invalid exception is raised. Each of `aWPtr', `bWPtr',
+| and `zWPtr' points to an array of four 32-bit elements that concatenate in
+| the platform's normal endian order to form a 128-bit floating-point value.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_propagateNaNF128M(
+ const uint32_t *aWPtr, const uint32_t *bWPtr, uint32_t *zWPtr )
+{
+ bool isSigNaNA;
+ const uint32_t *ptr;
+ bool isSigNaNB;
+ uint32_t uiA96, uiB96, wordMagA, wordMagB;
+
+ isSigNaNA = f128M_isSignalingNaN( (const float128_t *) aWPtr );
+ ptr = aWPtr;
+ if ( ! bWPtr ) {
+ if ( isSigNaNA ) softfloat_raiseFlags( softfloat_flag_invalid );
+ goto copy;
+ }
+ isSigNaNB = f128M_isSignalingNaN( (const float128_t *) bWPtr );
+ if ( isSigNaNA | isSigNaNB ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ if ( isSigNaNA ) {
+ if ( isSigNaNB ) goto returnLargerUIMag;
+ if ( softfloat_isNaNF128M( bWPtr ) ) goto copyB;
+ goto copy;
+ } else {
+ if ( softfloat_isNaNF128M( aWPtr ) ) goto copy;
+ goto copyB;
+ }
+ }
+ returnLargerUIMag:
+ uiA96 = aWPtr[indexWordHi( 4 )];
+ uiB96 = bWPtr[indexWordHi( 4 )];
+ wordMagA = uiA96 & 0x7FFFFFFF;
+ wordMagB = uiB96 & 0x7FFFFFFF;
+ if ( wordMagA < wordMagB ) goto copyB;
+ if ( wordMagB < wordMagA ) goto copy;
+ wordMagA = aWPtr[indexWord( 4, 2 )];
+ wordMagB = bWPtr[indexWord( 4, 2 )];
+ if ( wordMagA < wordMagB ) goto copyB;
+ if ( wordMagB < wordMagA ) goto copy;
+ wordMagA = aWPtr[indexWord( 4, 1 )];
+ wordMagB = bWPtr[indexWord( 4, 1 )];
+ if ( wordMagA < wordMagB ) goto copyB;
+ if ( wordMagB < wordMagA ) goto copy;
+ wordMagA = aWPtr[indexWord( 4, 0 )];
+ wordMagB = bWPtr[indexWord( 4, 0 )];
+ if ( wordMagA < wordMagB ) goto copyB;
+ if ( wordMagB < wordMagA ) goto copy;
+ if ( uiA96 < uiB96 ) goto copy;
+ copyB:
+ ptr = bWPtr;
+ copy:
+ zWPtr[indexWordHi( 4 )] = ptr[indexWordHi( 4 )] | 0x00008000;
+ zWPtr[indexWord( 4, 2 )] = ptr[indexWord( 4, 2 )];
+ zWPtr[indexWord( 4, 1 )] = ptr[indexWord( 4, 1 )];
+ zWPtr[indexWord( 4, 0 )] = ptr[indexWord( 4, 0 )];
+
+}
+
diff --git a/softfloat/source/8086/s_propagateNaNF128UI.c b/softfloat/source/8086/s_propagateNaNF128UI.c
new file mode 100644
index 0000000..6caecd2
--- /dev/null
+++ b/softfloat/source/8086/s_propagateNaNF128UI.c
@@ -0,0 +1,105 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2018 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Interpreting the unsigned integer formed from concatenating 'uiA64' and
+| 'uiA0' as a 128-bit floating-point value, and likewise interpreting the
+| unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another
+| 128-bit floating-point value, and assuming at least on of these floating-
+| point values is a NaN, returns the bit pattern of the combined NaN result.
+| If either original floating-point value is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+struct uint128
+ softfloat_propagateNaNF128UI(
+ uint_fast64_t uiA64,
+ uint_fast64_t uiA0,
+ uint_fast64_t uiB64,
+ uint_fast64_t uiB0
+ )
+{
+ bool isSigNaNA, isSigNaNB;
+ uint_fast64_t uiNonsigA64, uiNonsigB64, uiMagA64, uiMagB64;
+ struct uint128 uiZ;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ isSigNaNA = softfloat_isSigNaNF128UI( uiA64, uiA0 );
+ isSigNaNB = softfloat_isSigNaNF128UI( uiB64, uiB0 );
+ /*------------------------------------------------------------------------
+ | Make NaNs non-signaling.
+ *------------------------------------------------------------------------*/
+ uiNonsigA64 = uiA64 | UINT64_C( 0x0000800000000000 );
+ uiNonsigB64 = uiB64 | UINT64_C( 0x0000800000000000 );
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( isSigNaNA | isSigNaNB ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ if ( isSigNaNA ) {
+ if ( isSigNaNB ) goto returnLargerMag;
+ if ( isNaNF128UI( uiB64, uiB0 ) ) goto returnB;
+ goto returnA;
+ } else {
+ if ( isNaNF128UI( uiA64, uiA0 ) ) goto returnA;
+ goto returnB;
+ }
+ }
+ returnLargerMag:
+ uiMagA64 = uiA64 & UINT64_C( 0x7FFFFFFFFFFFFFFF );
+ uiMagB64 = uiB64 & UINT64_C( 0x7FFFFFFFFFFFFFFF );
+ if ( uiMagA64 < uiMagB64 ) goto returnB;
+ if ( uiMagB64 < uiMagA64 ) goto returnA;
+ if ( uiA0 < uiB0 ) goto returnB;
+ if ( uiB0 < uiA0 ) goto returnA;
+ if ( uiNonsigA64 < uiNonsigB64 ) goto returnA;
+ returnB:
+ uiZ.v64 = uiNonsigB64;
+ uiZ.v0 = uiB0;
+ return uiZ;
+ returnA:
+ uiZ.v64 = uiNonsigA64;
+ uiZ.v0 = uiA0;
+ return uiZ;
+
+}
+
diff --git a/softfloat/source/8086/s_propagateNaNF16UI.c b/softfloat/source/8086/s_propagateNaNF16UI.c
new file mode 100644
index 0000000..f9d80d6
--- /dev/null
+++ b/softfloat/source/8086/s_propagateNaNF16UI.c
@@ -0,0 +1,84 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2018 The Regents of the
+University of California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 16-bit floating-
+| point values, at least one of which is a NaN, returns the bit pattern of
+| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a
+| signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+uint_fast16_t
+ softfloat_propagateNaNF16UI( uint_fast16_t uiA, uint_fast16_t uiB )
+{
+ bool isSigNaNA, isSigNaNB;
+ uint_fast16_t uiNonsigA, uiNonsigB, uiMagA, uiMagB;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ isSigNaNA = softfloat_isSigNaNF16UI( uiA );
+ isSigNaNB = softfloat_isSigNaNF16UI( uiB );
+ /*------------------------------------------------------------------------
+ | Make NaNs non-signaling.
+ *------------------------------------------------------------------------*/
+ uiNonsigA = uiA | 0x0200;
+ uiNonsigB = uiB | 0x0200;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( isSigNaNA | isSigNaNB ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ if ( isSigNaNA ) {
+ if ( isSigNaNB ) goto returnLargerMag;
+ return isNaNF16UI( uiB ) ? uiNonsigB : uiNonsigA;
+ } else {
+ return isNaNF16UI( uiA ) ? uiNonsigA : uiNonsigB;
+ }
+ }
+ returnLargerMag:
+ uiMagA = uiA & 0x7FFF;
+ uiMagB = uiB & 0x7FFF;
+ if ( uiMagA < uiMagB ) return uiNonsigB;
+ if ( uiMagB < uiMagA ) return uiNonsigA;
+ return (uiNonsigA < uiNonsigB) ? uiNonsigA : uiNonsigB;
+
+}
+
diff --git a/softfloat/source/8086/s_propagateNaNF32UI.c b/softfloat/source/8086/s_propagateNaNF32UI.c
new file mode 100644
index 0000000..2350ad7
--- /dev/null
+++ b/softfloat/source/8086/s_propagateNaNF32UI.c
@@ -0,0 +1,84 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2018 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 32-bit floating-
+| point values, at least one of which is a NaN, returns the bit pattern of
+| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a
+| signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+uint_fast32_t
+ softfloat_propagateNaNF32UI( uint_fast32_t uiA, uint_fast32_t uiB )
+{
+ bool isSigNaNA, isSigNaNB;
+ uint_fast32_t uiNonsigA, uiNonsigB, uiMagA, uiMagB;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ isSigNaNA = softfloat_isSigNaNF32UI( uiA );
+ isSigNaNB = softfloat_isSigNaNF32UI( uiB );
+ /*------------------------------------------------------------------------
+ | Make NaNs non-signaling.
+ *------------------------------------------------------------------------*/
+ uiNonsigA = uiA | 0x00400000;
+ uiNonsigB = uiB | 0x00400000;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( isSigNaNA | isSigNaNB ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ if ( isSigNaNA ) {
+ if ( isSigNaNB ) goto returnLargerMag;
+ return isNaNF32UI( uiB ) ? uiNonsigB : uiNonsigA;
+ } else {
+ return isNaNF32UI( uiA ) ? uiNonsigA : uiNonsigB;
+ }
+ }
+ returnLargerMag:
+ uiMagA = uiA & 0x7FFFFFFF;
+ uiMagB = uiB & 0x7FFFFFFF;
+ if ( uiMagA < uiMagB ) return uiNonsigB;
+ if ( uiMagB < uiMagA ) return uiNonsigA;
+ return (uiNonsigA < uiNonsigB) ? uiNonsigA : uiNonsigB;
+
+}
+
diff --git a/softfloat/source/8086/s_propagateNaNF64UI.c b/softfloat/source/8086/s_propagateNaNF64UI.c
new file mode 100644
index 0000000..a4013d4
--- /dev/null
+++ b/softfloat/source/8086/s_propagateNaNF64UI.c
@@ -0,0 +1,84 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2018 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 64-bit floating-
+| point values, at least one of which is a NaN, returns the bit pattern of
+| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a
+| signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+uint_fast64_t
+ softfloat_propagateNaNF64UI( uint_fast64_t uiA, uint_fast64_t uiB )
+{
+ bool isSigNaNA, isSigNaNB;
+ uint_fast64_t uiNonsigA, uiNonsigB, uiMagA, uiMagB;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ isSigNaNA = softfloat_isSigNaNF64UI( uiA );
+ isSigNaNB = softfloat_isSigNaNF64UI( uiB );
+ /*------------------------------------------------------------------------
+ | Make NaNs non-signaling.
+ *------------------------------------------------------------------------*/
+ uiNonsigA = uiA | UINT64_C( 0x0008000000000000 );
+ uiNonsigB = uiB | UINT64_C( 0x0008000000000000 );
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( isSigNaNA | isSigNaNB ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ if ( isSigNaNA ) {
+ if ( isSigNaNB ) goto returnLargerMag;
+ return isNaNF64UI( uiB ) ? uiNonsigB : uiNonsigA;
+ } else {
+ return isNaNF64UI( uiA ) ? uiNonsigA : uiNonsigB;
+ }
+ }
+ returnLargerMag:
+ uiMagA = uiA & UINT64_C( 0x7FFFFFFFFFFFFFFF );
+ uiMagB = uiB & UINT64_C( 0x7FFFFFFFFFFFFFFF );
+ if ( uiMagA < uiMagB ) return uiNonsigB;
+ if ( uiMagB < uiMagA ) return uiNonsigA;
+ return (uiNonsigA < uiNonsigB) ? uiNonsigA : uiNonsigB;
+
+}
+
diff --git a/softfloat/source/8086/softfloat_raiseFlags.c b/softfloat/source/8086/softfloat_raiseFlags.c
new file mode 100644
index 0000000..7a1aee9
--- /dev/null
+++ b/softfloat/source/8086/softfloat_raiseFlags.c
@@ -0,0 +1,52 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include "platform.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Raises the exceptions specified by `flags'. Floating-point traps can be
+| defined here if desired. It is currently not possible for such a trap
+| to substitute a result value. If traps are not implemented, this routine
+| should be simply `softfloat_exceptionFlags |= flags;'.
+*----------------------------------------------------------------------------*/
+void softfloat_raiseFlags( uint_fast8_t flags )
+{
+
+ softfloat_exceptionFlags |= flags;
+
+}
+
diff --git a/softfloat/source/8086/specialize.h b/softfloat/source/8086/specialize.h
new file mode 100644
index 0000000..a9166e1
--- /dev/null
+++ b/softfloat/source/8086/specialize.h
@@ -0,0 +1,376 @@
+
+/*============================================================================
+
+This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2018 The Regents of the
+University of California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#ifndef specialize_h
+#define specialize_h 1
+
+#include
+#include
+#include "primitiveTypes.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Default value for 'softfloat_detectTininess'.
+*----------------------------------------------------------------------------*/
+#define init_detectTininess softfloat_tininess_afterRounding
+
+/*----------------------------------------------------------------------------
+| The values to return on conversions to 32-bit integer formats that raise an
+| invalid exception.
+*----------------------------------------------------------------------------*/
+#define ui32_fromPosOverflow 0xFFFFFFFF
+#define ui32_fromNegOverflow 0xFFFFFFFF
+#define ui32_fromNaN 0xFFFFFFFF
+#define i32_fromPosOverflow (-0x7FFFFFFF - 1)
+#define i32_fromNegOverflow (-0x7FFFFFFF - 1)
+#define i32_fromNaN (-0x7FFFFFFF - 1)
+
+/*----------------------------------------------------------------------------
+| The values to return on conversions to 64-bit integer formats that raise an
+| invalid exception.
+*----------------------------------------------------------------------------*/
+#define ui64_fromPosOverflow UINT64_C( 0xFFFFFFFFFFFFFFFF )
+#define ui64_fromNegOverflow UINT64_C( 0xFFFFFFFFFFFFFFFF )
+#define ui64_fromNaN UINT64_C( 0xFFFFFFFFFFFFFFFF )
+#define i64_fromPosOverflow (-INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1)
+#define i64_fromNegOverflow (-INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1)
+#define i64_fromNaN (-INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1)
+
+/*----------------------------------------------------------------------------
+| "Common NaN" structure, used to transfer NaN representations from one format
+| to another.
+*----------------------------------------------------------------------------*/
+struct commonNaN {
+ bool sign;
+#ifdef LITTLEENDIAN
+ uint64_t v0, v64;
+#else
+ uint64_t v64, v0;
+#endif
+};
+
+/*----------------------------------------------------------------------------
+| The bit pattern for a default generated 16-bit floating-point NaN.
+*----------------------------------------------------------------------------*/
+#define defaultNaNF16UI 0xFE00
+
+/*----------------------------------------------------------------------------
+| Returns true when 16-bit unsigned integer 'uiA' has the bit pattern of a
+| 16-bit floating-point signaling NaN.
+| Note: This macro evaluates its argument more than once.
+*----------------------------------------------------------------------------*/
+#define softfloat_isSigNaNF16UI( uiA ) ((((uiA) & 0x7E00) == 0x7C00) && ((uiA) & 0x01FF))
+
+/*----------------------------------------------------------------------------
+| Assuming 'uiA' has the bit pattern of a 16-bit floating-point NaN, converts
+| this NaN to the common NaN form, and stores the resulting common NaN at the
+| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+void softfloat_f16UIToCommonNaN( uint_fast16_t uiA, struct commonNaN *zPtr );
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into a 16-bit floating-point
+| NaN, and returns the bit pattern of this value as an unsigned integer.
+*----------------------------------------------------------------------------*/
+uint_fast16_t softfloat_commonNaNToF16UI( const struct commonNaN *aPtr );
+
+/*----------------------------------------------------------------------------
+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 16-bit floating-
+| point values, at least one of which is a NaN, returns the bit pattern of
+| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a
+| signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+uint_fast16_t
+ softfloat_propagateNaNF16UI( uint_fast16_t uiA, uint_fast16_t uiB );
+
+/*----------------------------------------------------------------------------
+| The bit pattern for a default generated 32-bit floating-point NaN.
+*----------------------------------------------------------------------------*/
+#define defaultNaNF32UI 0xFFC00000
+
+/*----------------------------------------------------------------------------
+| Returns true when 32-bit unsigned integer 'uiA' has the bit pattern of a
+| 32-bit floating-point signaling NaN.
+| Note: This macro evaluates its argument more than once.
+*----------------------------------------------------------------------------*/
+#define softfloat_isSigNaNF32UI( uiA ) ((((uiA) & 0x7FC00000) == 0x7F800000) && ((uiA) & 0x003FFFFF))
+
+/*----------------------------------------------------------------------------
+| Assuming 'uiA' has the bit pattern of a 32-bit floating-point NaN, converts
+| this NaN to the common NaN form, and stores the resulting common NaN at the
+| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+void softfloat_f32UIToCommonNaN( uint_fast32_t uiA, struct commonNaN *zPtr );
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into a 32-bit floating-point
+| NaN, and returns the bit pattern of this value as an unsigned integer.
+*----------------------------------------------------------------------------*/
+uint_fast32_t softfloat_commonNaNToF32UI( const struct commonNaN *aPtr );
+
+/*----------------------------------------------------------------------------
+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 32-bit floating-
+| point values, at least one of which is a NaN, returns the bit pattern of
+| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a
+| signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+uint_fast32_t
+ softfloat_propagateNaNF32UI( uint_fast32_t uiA, uint_fast32_t uiB );
+
+/*----------------------------------------------------------------------------
+| The bit pattern for a default generated 64-bit floating-point NaN.
+*----------------------------------------------------------------------------*/
+#define defaultNaNF64UI UINT64_C( 0xFFF8000000000000 )
+
+/*----------------------------------------------------------------------------
+| Returns true when 64-bit unsigned integer 'uiA' has the bit pattern of a
+| 64-bit floating-point signaling NaN.
+| Note: This macro evaluates its argument more than once.
+*----------------------------------------------------------------------------*/
+#define softfloat_isSigNaNF64UI( uiA ) ((((uiA) & UINT64_C( 0x7FF8000000000000 )) == UINT64_C( 0x7FF0000000000000 )) && ((uiA) & UINT64_C( 0x0007FFFFFFFFFFFF )))
+
+/*----------------------------------------------------------------------------
+| Assuming 'uiA' has the bit pattern of a 64-bit floating-point NaN, converts
+| this NaN to the common NaN form, and stores the resulting common NaN at the
+| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+void softfloat_f64UIToCommonNaN( uint_fast64_t uiA, struct commonNaN *zPtr );
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into a 64-bit floating-point
+| NaN, and returns the bit pattern of this value as an unsigned integer.
+*----------------------------------------------------------------------------*/
+uint_fast64_t softfloat_commonNaNToF64UI( const struct commonNaN *aPtr );
+
+/*----------------------------------------------------------------------------
+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 64-bit floating-
+| point values, at least one of which is a NaN, returns the bit pattern of
+| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a
+| signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+uint_fast64_t
+ softfloat_propagateNaNF64UI( uint_fast64_t uiA, uint_fast64_t uiB );
+
+/*----------------------------------------------------------------------------
+| The bit pattern for a default generated 80-bit extended floating-point NaN.
+*----------------------------------------------------------------------------*/
+#define defaultNaNExtF80UI64 0xFFFF
+#define defaultNaNExtF80UI0 UINT64_C( 0xC000000000000000 )
+
+/*----------------------------------------------------------------------------
+| Returns true when the 80-bit unsigned integer formed from concatenating
+| 16-bit 'uiA64' and 64-bit 'uiA0' has the bit pattern of an 80-bit extended
+| floating-point signaling NaN.
+| Note: This macro evaluates its arguments more than once.
+*----------------------------------------------------------------------------*/
+#define softfloat_isSigNaNExtF80UI( uiA64, uiA0 ) ((((uiA64) & 0x7FFF) == 0x7FFF) && ! ((uiA0) & UINT64_C( 0x4000000000000000 )) && ((uiA0) & UINT64_C( 0x3FFFFFFFFFFFFFFF )))
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+/*----------------------------------------------------------------------------
+| The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is
+| defined.
+*----------------------------------------------------------------------------*/
+
+/*----------------------------------------------------------------------------
+| Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0'
+| has the bit pattern of an 80-bit extended floating-point NaN, converts
+| this NaN to the common NaN form, and stores the resulting common NaN at the
+| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_extF80UIToCommonNaN(
+ uint_fast16_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr );
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended
+| floating-point NaN, and returns the bit pattern of this value as an unsigned
+| integer.
+*----------------------------------------------------------------------------*/
+struct uint128 softfloat_commonNaNToExtF80UI( const struct commonNaN *aPtr );
+
+/*----------------------------------------------------------------------------
+| Interpreting the unsigned integer formed from concatenating 'uiA64' and
+| 'uiA0' as an 80-bit extended floating-point value, and likewise interpreting
+| the unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another
+| 80-bit extended floating-point value, and assuming at least on of these
+| floating-point values is a NaN, returns the bit pattern of the combined NaN
+| result. If either original floating-point value is a signaling NaN, the
+| invalid exception is raised.
+*----------------------------------------------------------------------------*/
+struct uint128
+ softfloat_propagateNaNExtF80UI(
+ uint_fast16_t uiA64,
+ uint_fast64_t uiA0,
+ uint_fast16_t uiB64,
+ uint_fast64_t uiB0
+ );
+
+/*----------------------------------------------------------------------------
+| The bit pattern for a default generated 128-bit floating-point NaN.
+*----------------------------------------------------------------------------*/
+#define defaultNaNF128UI64 UINT64_C( 0xFFFF800000000000 )
+#define defaultNaNF128UI0 UINT64_C( 0 )
+
+/*----------------------------------------------------------------------------
+| Returns true when the 128-bit unsigned integer formed from concatenating
+| 64-bit 'uiA64' and 64-bit 'uiA0' has the bit pattern of a 128-bit floating-
+| point signaling NaN.
+| Note: This macro evaluates its arguments more than once.
+*----------------------------------------------------------------------------*/
+#define softfloat_isSigNaNF128UI( uiA64, uiA0 ) ((((uiA64) & UINT64_C( 0x7FFF800000000000 )) == UINT64_C( 0x7FFF000000000000 )) && ((uiA0) || ((uiA64) & UINT64_C( 0x00007FFFFFFFFFFF ))))
+
+/*----------------------------------------------------------------------------
+| Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0'
+| has the bit pattern of a 128-bit floating-point NaN, converts this NaN to
+| the common NaN form, and stores the resulting common NaN at the location
+| pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid exception
+| is raised.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_f128UIToCommonNaN(
+ uint_fast64_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr );
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point
+| NaN, and returns the bit pattern of this value as an unsigned integer.
+*----------------------------------------------------------------------------*/
+struct uint128 softfloat_commonNaNToF128UI( const struct commonNaN * );
+
+/*----------------------------------------------------------------------------
+| Interpreting the unsigned integer formed from concatenating 'uiA64' and
+| 'uiA0' as a 128-bit floating-point value, and likewise interpreting the
+| unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another
+| 128-bit floating-point value, and assuming at least on of these floating-
+| point values is a NaN, returns the bit pattern of the combined NaN result.
+| If either original floating-point value is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+struct uint128
+ softfloat_propagateNaNF128UI(
+ uint_fast64_t uiA64,
+ uint_fast64_t uiA0,
+ uint_fast64_t uiB64,
+ uint_fast64_t uiB0
+ );
+
+#else
+
+/*----------------------------------------------------------------------------
+| The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is not
+| defined.
+*----------------------------------------------------------------------------*/
+
+/*----------------------------------------------------------------------------
+| Assuming the 80-bit extended floating-point value pointed to by 'aSPtr' is
+| a NaN, converts this NaN to the common NaN form, and stores the resulting
+| common NaN at the location pointed to by 'zPtr'. If the NaN is a signaling
+| NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_extF80MToCommonNaN(
+ const struct extFloat80M *aSPtr, struct commonNaN *zPtr );
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended
+| floating-point NaN, and stores this NaN at the location pointed to by
+| 'zSPtr'.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_commonNaNToExtF80M(
+ const struct commonNaN *aPtr, struct extFloat80M *zSPtr );
+
+/*----------------------------------------------------------------------------
+| Assuming at least one of the two 80-bit extended floating-point values
+| pointed to by 'aSPtr' and 'bSPtr' is a NaN, stores the combined NaN result
+| at the location pointed to by 'zSPtr'. If either original floating-point
+| value is a signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_propagateNaNExtF80M(
+ const struct extFloat80M *aSPtr,
+ const struct extFloat80M *bSPtr,
+ struct extFloat80M *zSPtr
+ );
+
+/*----------------------------------------------------------------------------
+| The bit pattern for a default generated 128-bit floating-point NaN.
+*----------------------------------------------------------------------------*/
+#define defaultNaNF128UI96 0xFFFF8000
+#define defaultNaNF128UI64 0
+#define defaultNaNF128UI32 0
+#define defaultNaNF128UI0 0
+
+/*----------------------------------------------------------------------------
+| Assuming the 128-bit floating-point value pointed to by 'aWPtr' is a NaN,
+| converts this NaN to the common NaN form, and stores the resulting common
+| NaN at the location pointed to by 'zPtr'. If the NaN is a signaling NaN,
+| the invalid exception is raised. Argument 'aWPtr' points to an array of
+| four 32-bit elements that concatenate in the platform's normal endian order
+| to form a 128-bit floating-point value.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_f128MToCommonNaN( const uint32_t *aWPtr, struct commonNaN *zPtr );
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point
+| NaN, and stores this NaN at the location pointed to by 'zWPtr'. Argument
+| 'zWPtr' points to an array of four 32-bit elements that concatenate in the
+| platform's normal endian order to form a 128-bit floating-point value.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_commonNaNToF128M( const struct commonNaN *aPtr, uint32_t *zWPtr );
+
+/*----------------------------------------------------------------------------
+| Assuming at least one of the two 128-bit floating-point values pointed to by
+| 'aWPtr' and 'bWPtr' is a NaN, stores the combined NaN result at the location
+| pointed to by 'zWPtr'. If either original floating-point value is a
+| signaling NaN, the invalid exception is raised. Each of 'aWPtr', 'bWPtr',
+| and 'zWPtr' points to an array of four 32-bit elements that concatenate in
+| the platform's normal endian order to form a 128-bit floating-point value.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_propagateNaNF128M(
+ const uint32_t *aWPtr, const uint32_t *bWPtr, uint32_t *zWPtr );
+
+#endif
+
+#endif
+
diff --git a/softfloat/source/ARM-VFPv2-defaultNaN/extF80M_isSignalingNaN.c b/softfloat/source/ARM-VFPv2-defaultNaN/extF80M_isSignalingNaN.c
new file mode 100644
index 0000000..c2cca65
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2-defaultNaN/extF80M_isSignalingNaN.c
@@ -0,0 +1,57 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+bool extF80M_isSignalingNaN( const extFloat80_t *aPtr )
+{
+ const struct extFloat80M *aSPtr;
+ uint64_t uiA0;
+
+ aSPtr = (const struct extFloat80M *) aPtr;
+ if ( (aSPtr->signExp & 0x7FFF) != 0x7FFF ) return false;
+ uiA0 = aSPtr->signif;
+ return
+ ! (uiA0 & UINT64_C( 0x4000000000000000 ))
+ && (uiA0 & UINT64_C( 0x3FFFFFFFFFFFFFFF));
+
+}
+
diff --git a/softfloat/source/ARM-VFPv2-defaultNaN/f128M_isSignalingNaN.c b/softfloat/source/ARM-VFPv2-defaultNaN/f128M_isSignalingNaN.c
new file mode 100644
index 0000000..9ff83d7
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2-defaultNaN/f128M_isSignalingNaN.c
@@ -0,0 +1,60 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "primitives.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+bool f128M_isSignalingNaN( const float128_t *aPtr )
+{
+ const uint32_t *aWPtr;
+ uint32_t uiA96;
+
+ aWPtr = (const uint32_t *) aPtr;
+ uiA96 = aWPtr[indexWordHi( 4 )];
+ if ( (uiA96 & 0x7FFF8000) != 0x7FFF0000 ) return false;
+ return
+ ((uiA96 & 0x00007FFF) != 0)
+ || ((aWPtr[indexWord( 4, 2 )] | aWPtr[indexWord( 4, 1 )]
+ | aWPtr[indexWord( 4, 0 )])
+ != 0);
+
+}
+
diff --git a/softfloat/source/ARM-VFPv2-defaultNaN/s_commonNaNToExtF80M.c b/softfloat/source/ARM-VFPv2-defaultNaN/s_commonNaNToExtF80M.c
new file mode 100644
index 0000000..2e6bf7c
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2-defaultNaN/s_commonNaNToExtF80M.c
@@ -0,0 +1,57 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include "platform.h"
+#include "softfloat_types.h"
+
+#define softfloat_commonNaNToExtF80M softfloat_commonNaNToExtF80M
+#include "specialize.h"
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended
+| floating-point NaN, and stores this NaN at the location pointed to by
+| 'zSPtr'.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_commonNaNToExtF80M(
+ const struct commonNaN *aPtr, struct extFloat80M *zSPtr )
+{
+
+ zSPtr->signExp = defaultNaNExtF80UI64;
+ zSPtr->signif = defaultNaNExtF80UI0;
+
+}
+
diff --git a/softfloat/source/ARM-VFPv2-defaultNaN/s_commonNaNToExtF80UI.c b/softfloat/source/ARM-VFPv2-defaultNaN/s_commonNaNToExtF80UI.c
new file mode 100644
index 0000000..e37004f
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2-defaultNaN/s_commonNaNToExtF80UI.c
@@ -0,0 +1,57 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include "platform.h"
+#include "primitiveTypes.h"
+
+#define softfloat_commonNaNToExtF80UI softfloat_commonNaNToExtF80UI
+#include "specialize.h"
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended
+| floating-point NaN, and returns the bit pattern of this value as an unsigned
+| integer.
+*----------------------------------------------------------------------------*/
+struct uint128 softfloat_commonNaNToExtF80UI( const struct commonNaN *aPtr )
+{
+ struct uint128 uiZ;
+
+ uiZ.v64 = defaultNaNExtF80UI64;
+ uiZ.v0 = defaultNaNExtF80UI0;
+ return uiZ;
+
+}
+
diff --git a/softfloat/source/ARM-VFPv2-defaultNaN/s_commonNaNToF128M.c b/softfloat/source/ARM-VFPv2-defaultNaN/s_commonNaNToF128M.c
new file mode 100644
index 0000000..2ff4c16
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2-defaultNaN/s_commonNaNToF128M.c
@@ -0,0 +1,60 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "primitiveTypes.h"
+
+#define softfloat_commonNaNToF128M softfloat_commonNaNToF128M
+#include "specialize.h"
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point
+| NaN, and stores this NaN at the location pointed to by 'zWPtr'. Argument
+| 'zWPtr' points to an array of four 32-bit elements that concatenate in the
+| platform's normal endian order to form a 128-bit floating-point value.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_commonNaNToF128M( const struct commonNaN *aPtr, uint32_t *zWPtr )
+{
+
+ zWPtr[indexWord( 4, 3 )] = defaultNaNF128UI96;
+ zWPtr[indexWord( 4, 2 )] = defaultNaNF128UI64;
+ zWPtr[indexWord( 4, 1 )] = defaultNaNF128UI32;
+ zWPtr[indexWord( 4, 0 )] = defaultNaNF128UI0;
+
+}
+
diff --git a/softfloat/source/ARM-VFPv2-defaultNaN/s_commonNaNToF128UI.c b/softfloat/source/ARM-VFPv2-defaultNaN/s_commonNaNToF128UI.c
new file mode 100644
index 0000000..05dfb5f
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2-defaultNaN/s_commonNaNToF128UI.c
@@ -0,0 +1,56 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include "platform.h"
+#include "primitiveTypes.h"
+
+#define softfloat_commonNaNToF128UI softfloat_commonNaNToF128UI
+#include "specialize.h"
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point
+| NaN, and returns the bit pattern of this value as an unsigned integer.
+*----------------------------------------------------------------------------*/
+struct uint128 softfloat_commonNaNToF128UI( const struct commonNaN *aPtr )
+{
+ struct uint128 uiZ;
+
+ uiZ.v64 = defaultNaNF128UI64;
+ uiZ.v0 = defaultNaNF128UI0;
+ return uiZ;
+
+}
+
diff --git a/softfloat/source/ARM-VFPv2-defaultNaN/s_commonNaNToF16UI.c b/softfloat/source/ARM-VFPv2-defaultNaN/s_commonNaNToF16UI.c
new file mode 100644
index 0000000..861b269
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2-defaultNaN/s_commonNaNToF16UI.c
@@ -0,0 +1,5 @@
+
+/*----------------------------------------------------------------------------
+| This file intentionally contains no code.
+*----------------------------------------------------------------------------*/
+
diff --git a/softfloat/source/ARM-VFPv2-defaultNaN/s_commonNaNToF32UI.c b/softfloat/source/ARM-VFPv2-defaultNaN/s_commonNaNToF32UI.c
new file mode 100644
index 0000000..861b269
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2-defaultNaN/s_commonNaNToF32UI.c
@@ -0,0 +1,5 @@
+
+/*----------------------------------------------------------------------------
+| This file intentionally contains no code.
+*----------------------------------------------------------------------------*/
+
diff --git a/softfloat/source/ARM-VFPv2-defaultNaN/s_commonNaNToF64UI.c b/softfloat/source/ARM-VFPv2-defaultNaN/s_commonNaNToF64UI.c
new file mode 100644
index 0000000..861b269
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2-defaultNaN/s_commonNaNToF64UI.c
@@ -0,0 +1,5 @@
+
+/*----------------------------------------------------------------------------
+| This file intentionally contains no code.
+*----------------------------------------------------------------------------*/
+
diff --git a/softfloat/source/ARM-VFPv2-defaultNaN/s_extF80MToCommonNaN.c b/softfloat/source/ARM-VFPv2-defaultNaN/s_extF80MToCommonNaN.c
new file mode 100644
index 0000000..861b269
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2-defaultNaN/s_extF80MToCommonNaN.c
@@ -0,0 +1,5 @@
+
+/*----------------------------------------------------------------------------
+| This file intentionally contains no code.
+*----------------------------------------------------------------------------*/
+
diff --git a/softfloat/source/ARM-VFPv2-defaultNaN/s_extF80UIToCommonNaN.c b/softfloat/source/ARM-VFPv2-defaultNaN/s_extF80UIToCommonNaN.c
new file mode 100644
index 0000000..861b269
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2-defaultNaN/s_extF80UIToCommonNaN.c
@@ -0,0 +1,5 @@
+
+/*----------------------------------------------------------------------------
+| This file intentionally contains no code.
+*----------------------------------------------------------------------------*/
+
diff --git a/softfloat/source/ARM-VFPv2-defaultNaN/s_f128MToCommonNaN.c b/softfloat/source/ARM-VFPv2-defaultNaN/s_f128MToCommonNaN.c
new file mode 100644
index 0000000..861b269
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2-defaultNaN/s_f128MToCommonNaN.c
@@ -0,0 +1,5 @@
+
+/*----------------------------------------------------------------------------
+| This file intentionally contains no code.
+*----------------------------------------------------------------------------*/
+
diff --git a/softfloat/source/ARM-VFPv2-defaultNaN/s_f128UIToCommonNaN.c b/softfloat/source/ARM-VFPv2-defaultNaN/s_f128UIToCommonNaN.c
new file mode 100644
index 0000000..861b269
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2-defaultNaN/s_f128UIToCommonNaN.c
@@ -0,0 +1,5 @@
+
+/*----------------------------------------------------------------------------
+| This file intentionally contains no code.
+*----------------------------------------------------------------------------*/
+
diff --git a/softfloat/source/ARM-VFPv2-defaultNaN/s_f16UIToCommonNaN.c b/softfloat/source/ARM-VFPv2-defaultNaN/s_f16UIToCommonNaN.c
new file mode 100644
index 0000000..861b269
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2-defaultNaN/s_f16UIToCommonNaN.c
@@ -0,0 +1,5 @@
+
+/*----------------------------------------------------------------------------
+| This file intentionally contains no code.
+*----------------------------------------------------------------------------*/
+
diff --git a/softfloat/source/ARM-VFPv2-defaultNaN/s_f32UIToCommonNaN.c b/softfloat/source/ARM-VFPv2-defaultNaN/s_f32UIToCommonNaN.c
new file mode 100644
index 0000000..861b269
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2-defaultNaN/s_f32UIToCommonNaN.c
@@ -0,0 +1,5 @@
+
+/*----------------------------------------------------------------------------
+| This file intentionally contains no code.
+*----------------------------------------------------------------------------*/
+
diff --git a/softfloat/source/ARM-VFPv2-defaultNaN/s_f64UIToCommonNaN.c b/softfloat/source/ARM-VFPv2-defaultNaN/s_f64UIToCommonNaN.c
new file mode 100644
index 0000000..861b269
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2-defaultNaN/s_f64UIToCommonNaN.c
@@ -0,0 +1,5 @@
+
+/*----------------------------------------------------------------------------
+| This file intentionally contains no code.
+*----------------------------------------------------------------------------*/
+
diff --git a/softfloat/source/ARM-VFPv2-defaultNaN/s_propagateNaNExtF80M.c b/softfloat/source/ARM-VFPv2-defaultNaN/s_propagateNaNExtF80M.c
new file mode 100644
index 0000000..827ed5e
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2-defaultNaN/s_propagateNaNExtF80M.c
@@ -0,0 +1,74 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "primitiveTypes.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Assuming at least one of the two 80-bit extended floating-point values
+| pointed to by 'aSPtr' and 'bSPtr' is a NaN, stores the combined NaN result
+| at the location pointed to by 'zSPtr'. If either original floating-point
+| value is a signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_propagateNaNExtF80M(
+ const struct extFloat80M *aSPtr,
+ const struct extFloat80M *bSPtr,
+ struct extFloat80M *zSPtr
+ )
+{
+ uint_fast16_t ui64;
+ uint_fast64_t ui0;
+
+ ui64 = aSPtr->signExp;
+ ui0 = aSPtr->signif;
+ if (
+ softfloat_isSigNaNExtF80UI( ui64, ui0 )
+ || (bSPtr
+ && (ui64 = bSPtr->signExp,
+ ui0 = bSPtr->signif,
+ softfloat_isSigNaNExtF80UI( ui64, ui0 )))
+ ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ zSPtr->signExp = defaultNaNExtF80UI64;
+ zSPtr->signif = defaultNaNExtF80UI0;
+
+}
+
diff --git a/softfloat/source/ARM-VFPv2-defaultNaN/s_propagateNaNExtF80UI.c b/softfloat/source/ARM-VFPv2-defaultNaN/s_propagateNaNExtF80UI.c
new file mode 100644
index 0000000..e2ddd93
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2-defaultNaN/s_propagateNaNExtF80UI.c
@@ -0,0 +1,73 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "primitiveTypes.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Interpreting the unsigned integer formed from concatenating 'uiA64' and
+| 'uiA0' as an 80-bit extended floating-point value, and likewise interpreting
+| the unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another
+| 80-bit extended floating-point value, and assuming at least on of these
+| floating-point values is a NaN, returns the bit pattern of the combined NaN
+| result. If either original floating-point value is a signaling NaN, the
+| invalid exception is raised.
+*----------------------------------------------------------------------------*/
+struct uint128
+ softfloat_propagateNaNExtF80UI(
+ uint_fast16_t uiA64,
+ uint_fast64_t uiA0,
+ uint_fast16_t uiB64,
+ uint_fast64_t uiB0
+ )
+{
+ struct uint128 uiZ;
+
+ if (
+ softfloat_isSigNaNExtF80UI( uiA64, uiA0 )
+ || softfloat_isSigNaNExtF80UI( uiB64, uiB0 )
+ ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ uiZ.v64 = defaultNaNExtF80UI64;
+ uiZ.v0 = defaultNaNExtF80UI0;
+ return uiZ;
+
+}
+
diff --git a/softfloat/source/ARM-VFPv2-defaultNaN/s_propagateNaNF128M.c b/softfloat/source/ARM-VFPv2-defaultNaN/s_propagateNaNF128M.c
new file mode 100644
index 0000000..b876ae1
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2-defaultNaN/s_propagateNaNF128M.c
@@ -0,0 +1,68 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "primitiveTypes.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Assuming at least one of the two 128-bit floating-point values pointed to by
+| 'aWPtr' and 'bWPtr' is a NaN, stores the combined NaN result at the location
+| pointed to by 'zWPtr'. If either original floating-point value is a
+| signaling NaN, the invalid exception is raised. Each of 'aWPtr', 'bWPtr',
+| and 'zWPtr' points to an array of four 32-bit elements that concatenate in
+| the platform's normal endian order to form a 128-bit floating-point value.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_propagateNaNF128M(
+ const uint32_t *aWPtr, const uint32_t *bWPtr, uint32_t *zWPtr )
+{
+
+ if (
+ f128M_isSignalingNaN( (const float128_t *) aWPtr );
+ || (bWPtr && f128M_isSignalingNaN( (const float128_t *) bWPtr ))
+ ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ zWPtr[indexWord( 4, 3 )] = defaultNaNF128UI96;
+ zWPtr[indexWord( 4, 2 )] = defaultNaNF128UI64;
+ zWPtr[indexWord( 4, 1 )] = defaultNaNF128UI32;
+ zWPtr[indexWord( 4, 0 )] = defaultNaNF128UI0;
+
+}
+
diff --git a/softfloat/source/ARM-VFPv2-defaultNaN/s_propagateNaNF128UI.c b/softfloat/source/ARM-VFPv2-defaultNaN/s_propagateNaNF128UI.c
new file mode 100644
index 0000000..31b788e
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2-defaultNaN/s_propagateNaNF128UI.c
@@ -0,0 +1,73 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "primitiveTypes.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Interpreting the unsigned integer formed from concatenating 'uiA64' and
+| 'uiA0' as a 128-bit floating-point value, and likewise interpreting the
+| unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another
+| 128-bit floating-point value, and assuming at least on of these floating-
+| point values is a NaN, returns the bit pattern of the combined NaN result.
+| If either original floating-point value is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+struct uint128
+ softfloat_propagateNaNF128UI(
+ uint_fast64_t uiA64,
+ uint_fast64_t uiA0,
+ uint_fast64_t uiB64,
+ uint_fast64_t uiB0
+ )
+{
+ struct uint128 uiZ;
+
+ if (
+ softfloat_isSigNaNF128UI( uiA64, uiA0 )
+ || softfloat_isSigNaNF128UI( uiB64, uiB0 )
+ ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ uiZ.v64 = defaultNaNF128UI64;
+ uiZ.v0 = defaultNaNF128UI0;
+ return uiZ;
+
+}
+
diff --git a/softfloat/source/ARM-VFPv2-defaultNaN/s_propagateNaNF16UI.c b/softfloat/source/ARM-VFPv2-defaultNaN/s_propagateNaNF16UI.c
new file mode 100644
index 0000000..17618fc
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2-defaultNaN/s_propagateNaNF16UI.c
@@ -0,0 +1,58 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the
+University of California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 16-bit floating-
+| point values, at least one of which is a NaN, returns the bit pattern of
+| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a
+| signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+uint_fast16_t
+ softfloat_propagateNaNF16UI( uint_fast16_t uiA, uint_fast16_t uiB )
+{
+
+ if ( softfloat_isSigNaNF16UI( uiA ) || softfloat_isSigNaNF16UI( uiB ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ return defaultNaNF16UI;
+
+}
+
diff --git a/softfloat/source/ARM-VFPv2-defaultNaN/s_propagateNaNF32UI.c b/softfloat/source/ARM-VFPv2-defaultNaN/s_propagateNaNF32UI.c
new file mode 100644
index 0000000..e4c3fc1
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2-defaultNaN/s_propagateNaNF32UI.c
@@ -0,0 +1,58 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 32-bit floating-
+| point values, at least one of which is a NaN, returns the bit pattern of
+| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a
+| signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+uint_fast32_t
+ softfloat_propagateNaNF32UI( uint_fast32_t uiA, uint_fast32_t uiB )
+{
+
+ if ( softfloat_isSigNaNF32UI( uiA ) || softfloat_isSigNaNF32UI( uiB ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ return defaultNaNF32UI;
+
+}
+
diff --git a/softfloat/source/ARM-VFPv2-defaultNaN/s_propagateNaNF64UI.c b/softfloat/source/ARM-VFPv2-defaultNaN/s_propagateNaNF64UI.c
new file mode 100644
index 0000000..75361b8
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2-defaultNaN/s_propagateNaNF64UI.c
@@ -0,0 +1,58 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 64-bit floating-
+| point values, at least one of which is a NaN, returns the bit pattern of
+| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a
+| signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+uint_fast64_t
+ softfloat_propagateNaNF64UI( uint_fast64_t uiA, uint_fast64_t uiB )
+{
+
+ if ( softfloat_isSigNaNF64UI( uiA ) || softfloat_isSigNaNF64UI( uiB ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ return defaultNaNF64UI;
+
+}
+
diff --git a/softfloat/source/ARM-VFPv2-defaultNaN/softfloat_raiseFlags.c b/softfloat/source/ARM-VFPv2-defaultNaN/softfloat_raiseFlags.c
new file mode 100644
index 0000000..f8f1065
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2-defaultNaN/softfloat_raiseFlags.c
@@ -0,0 +1,52 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include "platform.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Raises the exceptions specified by 'flags'. Floating-point traps can be
+| defined here if desired. It is currently not possible for such a trap
+| to substitute a result value. If traps are not implemented, this routine
+| should be simply 'softfloat_exceptionFlags |= flags;'.
+*----------------------------------------------------------------------------*/
+void softfloat_raiseFlags( uint_fast8_t flags )
+{
+
+ softfloat_exceptionFlags |= flags;
+
+}
+
diff --git a/softfloat/source/ARM-VFPv2-defaultNaN/specialize.h b/softfloat/source/ARM-VFPv2-defaultNaN/specialize.h
new file mode 100644
index 0000000..e4ea15d
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2-defaultNaN/specialize.h
@@ -0,0 +1,407 @@
+
+/*============================================================================
+
+This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017, 2018 The Regents of the
+University of California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#ifndef specialize_h
+#define specialize_h 1
+
+#include
+#include
+#include "primitiveTypes.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Default value for 'softfloat_detectTininess'.
+*----------------------------------------------------------------------------*/
+#define init_detectTininess softfloat_tininess_beforeRounding
+
+/*----------------------------------------------------------------------------
+| The values to return on conversions to 32-bit integer formats that raise an
+| invalid exception.
+*----------------------------------------------------------------------------*/
+#define ui32_fromPosOverflow 0xFFFFFFFF
+#define ui32_fromNegOverflow 0
+#define ui32_fromNaN 0
+#define i32_fromPosOverflow 0x7FFFFFFF
+#define i32_fromNegOverflow (-0x7FFFFFFF - 1)
+#define i32_fromNaN 0
+
+/*----------------------------------------------------------------------------
+| The values to return on conversions to 64-bit integer formats that raise an
+| invalid exception.
+*----------------------------------------------------------------------------*/
+#define ui64_fromPosOverflow UINT64_C( 0xFFFFFFFFFFFFFFFF )
+#define ui64_fromNegOverflow 0
+#define ui64_fromNaN 0
+#define i64_fromPosOverflow INT64_C( 0x7FFFFFFFFFFFFFFF )
+#define i64_fromNegOverflow (-INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1)
+#define i64_fromNaN 0
+
+/*----------------------------------------------------------------------------
+| "Common NaN" structure, used to transfer NaN representations from one format
+| to another.
+*----------------------------------------------------------------------------*/
+struct commonNaN { char _unused; };
+
+/*----------------------------------------------------------------------------
+| The bit pattern for a default generated 16-bit floating-point NaN.
+*----------------------------------------------------------------------------*/
+#define defaultNaNF16UI 0x7E00
+
+/*----------------------------------------------------------------------------
+| Returns true when 16-bit unsigned integer 'uiA' has the bit pattern of a
+| 16-bit floating-point signaling NaN.
+| Note: This macro evaluates its argument more than once.
+*----------------------------------------------------------------------------*/
+#define softfloat_isSigNaNF16UI( uiA ) ((((uiA) & 0x7E00) == 0x7C00) && ((uiA) & 0x01FF))
+
+/*----------------------------------------------------------------------------
+| Assuming 'uiA' has the bit pattern of a 16-bit floating-point NaN, converts
+| this NaN to the common NaN form, and stores the resulting common NaN at the
+| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+#define softfloat_f16UIToCommonNaN( uiA, zPtr ) if ( ! ((uiA) & 0x0200) ) softfloat_raiseFlags( softfloat_flag_invalid )
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into a 16-bit floating-point
+| NaN, and returns the bit pattern of this value as an unsigned integer.
+*----------------------------------------------------------------------------*/
+#define softfloat_commonNaNToF16UI( aPtr ) ((uint_fast16_t) defaultNaNF16UI)
+
+/*----------------------------------------------------------------------------
+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 16-bit floating-
+| point values, at least one of which is a NaN, returns the bit pattern of
+| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a
+| signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+uint_fast16_t
+ softfloat_propagateNaNF16UI( uint_fast16_t uiA, uint_fast16_t uiB );
+
+/*----------------------------------------------------------------------------
+| The bit pattern for a default generated 32-bit floating-point NaN.
+*----------------------------------------------------------------------------*/
+#define defaultNaNF32UI 0x7FC00000
+
+/*----------------------------------------------------------------------------
+| Returns true when 32-bit unsigned integer 'uiA' has the bit pattern of a
+| 32-bit floating-point signaling NaN.
+| Note: This macro evaluates its argument more than once.
+*----------------------------------------------------------------------------*/
+#define softfloat_isSigNaNF32UI( uiA ) ((((uiA) & 0x7FC00000) == 0x7F800000) && ((uiA) & 0x003FFFFF))
+
+/*----------------------------------------------------------------------------
+| Assuming 'uiA' has the bit pattern of a 32-bit floating-point NaN, converts
+| this NaN to the common NaN form, and stores the resulting common NaN at the
+| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+#define softfloat_f32UIToCommonNaN( uiA, zPtr ) if ( ! ((uiA) & 0x00400000) ) softfloat_raiseFlags( softfloat_flag_invalid )
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into a 32-bit floating-point
+| NaN, and returns the bit pattern of this value as an unsigned integer.
+*----------------------------------------------------------------------------*/
+#define softfloat_commonNaNToF32UI( aPtr ) ((uint_fast32_t) defaultNaNF32UI)
+
+/*----------------------------------------------------------------------------
+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 32-bit floating-
+| point values, at least one of which is a NaN, returns the bit pattern of
+| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a
+| signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+uint_fast32_t
+ softfloat_propagateNaNF32UI( uint_fast32_t uiA, uint_fast32_t uiB );
+
+/*----------------------------------------------------------------------------
+| The bit pattern for a default generated 64-bit floating-point NaN.
+*----------------------------------------------------------------------------*/
+#define defaultNaNF64UI UINT64_C( 0x7FF8000000000000 )
+
+/*----------------------------------------------------------------------------
+| Returns true when 64-bit unsigned integer 'uiA' has the bit pattern of a
+| 64-bit floating-point signaling NaN.
+| Note: This macro evaluates its argument more than once.
+*----------------------------------------------------------------------------*/
+#define softfloat_isSigNaNF64UI( uiA ) ((((uiA) & UINT64_C( 0x7FF8000000000000 )) == UINT64_C( 0x7FF0000000000000 )) && ((uiA) & UINT64_C( 0x0007FFFFFFFFFFFF )))
+
+/*----------------------------------------------------------------------------
+| Assuming 'uiA' has the bit pattern of a 64-bit floating-point NaN, converts
+| this NaN to the common NaN form, and stores the resulting common NaN at the
+| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+#define softfloat_f64UIToCommonNaN( uiA, zPtr ) if ( ! ((uiA) & UINT64_C( 0x0008000000000000 )) ) softfloat_raiseFlags( softfloat_flag_invalid )
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into a 64-bit floating-point
+| NaN, and returns the bit pattern of this value as an unsigned integer.
+*----------------------------------------------------------------------------*/
+#define softfloat_commonNaNToF64UI( aPtr ) ((uint_fast64_t) defaultNaNF64UI)
+
+/*----------------------------------------------------------------------------
+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 64-bit floating-
+| point values, at least one of which is a NaN, returns the bit pattern of
+| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a
+| signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+uint_fast64_t
+ softfloat_propagateNaNF64UI( uint_fast64_t uiA, uint_fast64_t uiB );
+
+/*----------------------------------------------------------------------------
+| The bit pattern for a default generated 80-bit extended floating-point NaN.
+*----------------------------------------------------------------------------*/
+#define defaultNaNExtF80UI64 0x7FFF
+#define defaultNaNExtF80UI0 UINT64_C( 0xC000000000000000 )
+
+/*----------------------------------------------------------------------------
+| Returns true when the 80-bit unsigned integer formed from concatenating
+| 16-bit 'uiA64' and 64-bit 'uiA0' has the bit pattern of an 80-bit extended
+| floating-point signaling NaN.
+| Note: This macro evaluates its arguments more than once.
+*----------------------------------------------------------------------------*/
+#define softfloat_isSigNaNExtF80UI( uiA64, uiA0 ) ((((uiA64) & 0x7FFF) == 0x7FFF) && ! ((uiA0) & UINT64_C( 0x4000000000000000 )) && ((uiA0) & UINT64_C( 0x3FFFFFFFFFFFFFFF )))
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+/*----------------------------------------------------------------------------
+| The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is
+| defined.
+*----------------------------------------------------------------------------*/
+
+/*----------------------------------------------------------------------------
+| Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0'
+| has the bit pattern of an 80-bit extended floating-point NaN, converts
+| this NaN to the common NaN form, and stores the resulting common NaN at the
+| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+#define softfloat_extF80UIToCommonNaN( uiA64, uiA0, zPtr ) if ( ! ((uiA0) & UINT64_C( 0x4000000000000000 )) ) softfloat_raiseFlags( softfloat_flag_invalid )
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended
+| floating-point NaN, and returns the bit pattern of this value as an unsigned
+| integer.
+*----------------------------------------------------------------------------*/
+#if defined INLINE && ! defined softfloat_commonNaNToExtF80UI
+INLINE
+struct uint128 softfloat_commonNaNToExtF80UI( const struct commonNaN *aPtr )
+{
+ struct uint128 uiZ;
+ uiZ.v64 = defaultNaNExtF80UI64;
+ uiZ.v0 = defaultNaNExtF80UI0;
+ return uiZ;
+}
+#else
+struct uint128 softfloat_commonNaNToExtF80UI( const struct commonNaN *aPtr );
+#endif
+
+/*----------------------------------------------------------------------------
+| Interpreting the unsigned integer formed from concatenating 'uiA64' and
+| 'uiA0' as an 80-bit extended floating-point value, and likewise interpreting
+| the unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another
+| 80-bit extended floating-point value, and assuming at least on of these
+| floating-point values is a NaN, returns the bit pattern of the combined NaN
+| result. If either original floating-point value is a signaling NaN, the
+| invalid exception is raised.
+*----------------------------------------------------------------------------*/
+struct uint128
+ softfloat_propagateNaNExtF80UI(
+ uint_fast16_t uiA64,
+ uint_fast64_t uiA0,
+ uint_fast16_t uiB64,
+ uint_fast64_t uiB0
+ );
+
+/*----------------------------------------------------------------------------
+| The bit pattern for a default generated 128-bit floating-point NaN.
+*----------------------------------------------------------------------------*/
+#define defaultNaNF128UI64 UINT64_C( 0x7FFF800000000000 )
+#define defaultNaNF128UI0 UINT64_C( 0 )
+
+/*----------------------------------------------------------------------------
+| Returns true when the 128-bit unsigned integer formed from concatenating
+| 64-bit 'uiA64' and 64-bit 'uiA0' has the bit pattern of a 128-bit floating-
+| point signaling NaN.
+| Note: This macro evaluates its arguments more than once.
+*----------------------------------------------------------------------------*/
+#define softfloat_isSigNaNF128UI( uiA64, uiA0 ) ((((uiA64) & UINT64_C( 0x7FFF800000000000 )) == UINT64_C( 0x7FFF000000000000 )) && ((uiA0) || ((uiA64) & UINT64_C( 0x00007FFFFFFFFFFF ))))
+
+/*----------------------------------------------------------------------------
+| Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0'
+| has the bit pattern of a 128-bit floating-point NaN, converts this NaN to
+| the common NaN form, and stores the resulting common NaN at the location
+| pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid exception
+| is raised.
+*----------------------------------------------------------------------------*/
+#define softfloat_f128UIToCommonNaN( uiA64, uiA0, zPtr ) if ( ! ((uiA64) & UINT64_C( 0x0000800000000000 )) ) softfloat_raiseFlags( softfloat_flag_invalid )
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point
+| NaN, and returns the bit pattern of this value as an unsigned integer.
+*----------------------------------------------------------------------------*/
+#if defined INLINE && ! defined softfloat_commonNaNToF128UI
+INLINE
+struct uint128 softfloat_commonNaNToF128UI( const struct commonNaN *aPtr )
+{
+ struct uint128 uiZ;
+ uiZ.v64 = defaultNaNF128UI64;
+ uiZ.v0 = defaultNaNF128UI0;
+ return uiZ;
+}
+#else
+struct uint128 softfloat_commonNaNToF128UI( const struct commonNaN * );
+#endif
+
+/*----------------------------------------------------------------------------
+| Interpreting the unsigned integer formed from concatenating 'uiA64' and
+| 'uiA0' as a 128-bit floating-point value, and likewise interpreting the
+| unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another
+| 128-bit floating-point value, and assuming at least on of these floating-
+| point values is a NaN, returns the bit pattern of the combined NaN result.
+| If either original floating-point value is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+struct uint128
+ softfloat_propagateNaNF128UI(
+ uint_fast64_t uiA64,
+ uint_fast64_t uiA0,
+ uint_fast64_t uiB64,
+ uint_fast64_t uiB0
+ );
+
+#else
+
+/*----------------------------------------------------------------------------
+| The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is not
+| defined.
+*----------------------------------------------------------------------------*/
+
+/*----------------------------------------------------------------------------
+| Assuming the 80-bit extended floating-point value pointed to by 'aSPtr' is
+| a NaN, converts this NaN to the common NaN form, and stores the resulting
+| common NaN at the location pointed to by 'zPtr'. If the NaN is a signaling
+| NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+#define softfloat_extF80MToCommonNaN( aSPtr, zPtr ) if ( ! ((aSPtr)->signif & UINT64_C( 0x4000000000000000 )) ) softfloat_raiseFlags( softfloat_flag_invalid )
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended
+| floating-point NaN, and stores this NaN at the location pointed to by
+| 'zSPtr'.
+*----------------------------------------------------------------------------*/
+#if defined INLINE && ! defined softfloat_commonNaNToExtF80M
+INLINE
+void
+ softfloat_commonNaNToExtF80M(
+ const struct commonNaN *aPtr, struct extFloat80M *zSPtr )
+{
+ zSPtr->signExp = defaultNaNExtF80UI64;
+ zSPtr->signif = defaultNaNExtF80UI0;
+}
+#else
+void
+ softfloat_commonNaNToExtF80M(
+ const struct commonNaN *aPtr, struct extFloat80M *zSPtr );
+#endif
+
+/*----------------------------------------------------------------------------
+| Assuming at least one of the two 80-bit extended floating-point values
+| pointed to by 'aSPtr' and 'bSPtr' is a NaN, stores the combined NaN result
+| at the location pointed to by 'zSPtr'. If either original floating-point
+| value is a signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_propagateNaNExtF80M(
+ const struct extFloat80M *aSPtr,
+ const struct extFloat80M *bSPtr,
+ struct extFloat80M *zSPtr
+ );
+
+/*----------------------------------------------------------------------------
+| The bit pattern for a default generated 128-bit floating-point NaN.
+*----------------------------------------------------------------------------*/
+#define defaultNaNF128UI96 0x7FFF8000
+#define defaultNaNF128UI64 0
+#define defaultNaNF128UI32 0
+#define defaultNaNF128UI0 0
+
+/*----------------------------------------------------------------------------
+| Assuming the 128-bit floating-point value pointed to by 'aWPtr' is a NaN,
+| converts this NaN to the common NaN form, and stores the resulting common
+| NaN at the location pointed to by 'zPtr'. If the NaN is a signaling NaN,
+| the invalid exception is raised. Argument 'aWPtr' points to an array of
+| four 32-bit elements that concatenate in the platform's normal endian order
+| to form a 128-bit floating-point value.
+*----------------------------------------------------------------------------*/
+#define softfloat_f128MToCommonNaN( aWPtr, zPtr ) if ( ! ((aWPtr)[indexWordHi( 4 )] & UINT64_C( 0x0000800000000000 )) ) softfloat_raiseFlags( softfloat_flag_invalid )
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point
+| NaN, and stores this NaN at the location pointed to by 'zWPtr'. Argument
+| 'zWPtr' points to an array of four 32-bit elements that concatenate in the
+| platform's normal endian order to form a 128-bit floating-point value.
+*----------------------------------------------------------------------------*/
+#if defined INLINE && ! defined softfloat_commonNaNToF128M
+INLINE
+void
+ softfloat_commonNaNToF128M( const struct commonNaN *aPtr, uint32_t *zWPtr )
+{
+ zWPtr[indexWord( 4, 3 )] = defaultNaNF128UI96;
+ zWPtr[indexWord( 4, 2 )] = defaultNaNF128UI64;
+ zWPtr[indexWord( 4, 1 )] = defaultNaNF128UI32;
+ zWPtr[indexWord( 4, 0 )] = defaultNaNF128UI0;
+}
+#else
+void
+ softfloat_commonNaNToF128M( const struct commonNaN *aPtr, uint32_t *zWPtr );
+#endif
+
+/*----------------------------------------------------------------------------
+| Assuming at least one of the two 128-bit floating-point values pointed to by
+| 'aWPtr' and 'bWPtr' is a NaN, stores the combined NaN result at the location
+| pointed to by 'zWPtr'. If either original floating-point value is a
+| signaling NaN, the invalid exception is raised. Each of 'aWPtr', 'bWPtr',
+| and 'zWPtr' points to an array of four 32-bit elements that concatenate in
+| the platform's normal endian order to form a 128-bit floating-point value.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_propagateNaNF128M(
+ const uint32_t *aWPtr, const uint32_t *bWPtr, uint32_t *zWPtr );
+
+#endif
+
+#endif
+
diff --git a/softfloat/source/ARM-VFPv2/extF80M_isSignalingNaN.c b/softfloat/source/ARM-VFPv2/extF80M_isSignalingNaN.c
new file mode 100644
index 0000000..c2cca65
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2/extF80M_isSignalingNaN.c
@@ -0,0 +1,57 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+bool extF80M_isSignalingNaN( const extFloat80_t *aPtr )
+{
+ const struct extFloat80M *aSPtr;
+ uint64_t uiA0;
+
+ aSPtr = (const struct extFloat80M *) aPtr;
+ if ( (aSPtr->signExp & 0x7FFF) != 0x7FFF ) return false;
+ uiA0 = aSPtr->signif;
+ return
+ ! (uiA0 & UINT64_C( 0x4000000000000000 ))
+ && (uiA0 & UINT64_C( 0x3FFFFFFFFFFFFFFF));
+
+}
+
diff --git a/softfloat/source/ARM-VFPv2/f128M_isSignalingNaN.c b/softfloat/source/ARM-VFPv2/f128M_isSignalingNaN.c
new file mode 100644
index 0000000..9ff83d7
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2/f128M_isSignalingNaN.c
@@ -0,0 +1,60 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "primitives.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+bool f128M_isSignalingNaN( const float128_t *aPtr )
+{
+ const uint32_t *aWPtr;
+ uint32_t uiA96;
+
+ aWPtr = (const uint32_t *) aPtr;
+ uiA96 = aWPtr[indexWordHi( 4 )];
+ if ( (uiA96 & 0x7FFF8000) != 0x7FFF0000 ) return false;
+ return
+ ((uiA96 & 0x00007FFF) != 0)
+ || ((aWPtr[indexWord( 4, 2 )] | aWPtr[indexWord( 4, 1 )]
+ | aWPtr[indexWord( 4, 0 )])
+ != 0);
+
+}
+
diff --git a/softfloat/source/ARM-VFPv2/s_commonNaNToExtF80M.c b/softfloat/source/ARM-VFPv2/s_commonNaNToExtF80M.c
new file mode 100644
index 0000000..6bb922a
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2/s_commonNaNToExtF80M.c
@@ -0,0 +1,56 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended
+| floating-point NaN, and stores this NaN at the location pointed to by
+| 'zSPtr'.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_commonNaNToExtF80M(
+ const struct commonNaN *aPtr, struct extFloat80M *zSPtr )
+{
+
+ zSPtr->signExp = packToExtF80UI64( aPtr->sign, 0x7FFF );
+ zSPtr->signif = UINT64_C( 0xC000000000000000 ) | aPtr->v64>>1;
+
+}
+
diff --git a/softfloat/source/ARM-VFPv2/s_commonNaNToExtF80UI.c b/softfloat/source/ARM-VFPv2/s_commonNaNToExtF80UI.c
new file mode 100644
index 0000000..5e841b2
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2/s_commonNaNToExtF80UI.c
@@ -0,0 +1,56 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "primitives.h"
+#include "specialize.h"
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended
+| floating-point NaN, and returns the bit pattern of this value as an unsigned
+| integer.
+*----------------------------------------------------------------------------*/
+struct uint128 softfloat_commonNaNToExtF80UI( const struct commonNaN *aPtr )
+{
+ struct uint128 uiZ;
+
+ uiZ.v64 = (uint_fast16_t) aPtr->sign<<15 | 0x7FFF;
+ uiZ.v0 = UINT64_C( 0xC000000000000000 ) | aPtr->v64>>1;
+ return uiZ;
+
+}
+
diff --git a/softfloat/source/ARM-VFPv2/s_commonNaNToF128M.c b/softfloat/source/ARM-VFPv2/s_commonNaNToF128M.c
new file mode 100644
index 0000000..02e2348
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2/s_commonNaNToF128M.c
@@ -0,0 +1,56 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "primitives.h"
+#include "specialize.h"
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point
+| NaN, and stores this NaN at the location pointed to by 'zWPtr'. Argument
+| 'zWPtr' points to an array of four 32-bit elements that concatenate in the
+| platform's normal endian order to form a 128-bit floating-point value.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_commonNaNToF128M( const struct commonNaN *aPtr, uint32_t *zWPtr )
+{
+
+ softfloat_shortShiftRight128M( (const uint32_t *) &aPtr->v0, 16, zWPtr );
+ zWPtr[indexWordHi( 4 )] |= (uint32_t) aPtr->sign<<31 | 0x7FFF8000;
+
+}
+
diff --git a/softfloat/source/ARM-VFPv2/s_commonNaNToF128UI.c b/softfloat/source/ARM-VFPv2/s_commonNaNToF128UI.c
new file mode 100644
index 0000000..fa87d75
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2/s_commonNaNToF128UI.c
@@ -0,0 +1,55 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "primitives.h"
+#include "specialize.h"
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point
+| NaN, and returns the bit pattern of this value as an unsigned integer.
+*----------------------------------------------------------------------------*/
+struct uint128 softfloat_commonNaNToF128UI( const struct commonNaN *aPtr )
+{
+ struct uint128 uiZ;
+
+ uiZ = softfloat_shortShiftRight128( aPtr->v64, aPtr->v0, 16 );
+ uiZ.v64 |= (uint_fast64_t) aPtr->sign<<63 | UINT64_C( 0x7FFF800000000000 );
+ return uiZ;
+
+}
+
diff --git a/softfloat/source/ARM-VFPv2/s_commonNaNToF16UI.c b/softfloat/source/ARM-VFPv2/s_commonNaNToF16UI.c
new file mode 100644
index 0000000..6d5bf9a
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2/s_commonNaNToF16UI.c
@@ -0,0 +1,51 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "specialize.h"
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into a 16-bit floating-point
+| NaN, and returns the bit pattern of this value as an unsigned integer.
+*----------------------------------------------------------------------------*/
+uint_fast16_t softfloat_commonNaNToF16UI( const struct commonNaN *aPtr )
+{
+
+ return (uint_fast16_t) aPtr->sign<<15 | 0x7E00 | aPtr->v64>>54;
+
+}
+
diff --git a/softfloat/source/ARM-VFPv2/s_commonNaNToF32UI.c b/softfloat/source/ARM-VFPv2/s_commonNaNToF32UI.c
new file mode 100644
index 0000000..e45d63b
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2/s_commonNaNToF32UI.c
@@ -0,0 +1,51 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "specialize.h"
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into a 32-bit floating-point
+| NaN, and returns the bit pattern of this value as an unsigned integer.
+*----------------------------------------------------------------------------*/
+uint_fast32_t softfloat_commonNaNToF32UI( const struct commonNaN *aPtr )
+{
+
+ return (uint_fast32_t) aPtr->sign<<31 | 0x7FC00000 | aPtr->v64>>41;
+
+}
+
diff --git a/softfloat/source/ARM-VFPv2/s_commonNaNToF64UI.c b/softfloat/source/ARM-VFPv2/s_commonNaNToF64UI.c
new file mode 100644
index 0000000..bfde88b
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2/s_commonNaNToF64UI.c
@@ -0,0 +1,53 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "specialize.h"
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into a 64-bit floating-point
+| NaN, and returns the bit pattern of this value as an unsigned integer.
+*----------------------------------------------------------------------------*/
+uint_fast64_t softfloat_commonNaNToF64UI( const struct commonNaN *aPtr )
+{
+
+ return
+ (uint_fast64_t) aPtr->sign<<63 | UINT64_C( 0x7FF8000000000000 )
+ | aPtr->v64>>12;
+
+}
+
diff --git a/softfloat/source/ARM-VFPv2/s_extF80MToCommonNaN.c b/softfloat/source/ARM-VFPv2/s_extF80MToCommonNaN.c
new file mode 100644
index 0000000..5fd54db
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2/s_extF80MToCommonNaN.c
@@ -0,0 +1,62 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Assuming the 80-bit extended floating-point value pointed to by 'aSPtr' is
+| a NaN, converts this NaN to the common NaN form, and stores the resulting
+| common NaN at the location pointed to by 'zPtr'. If the NaN is a signaling
+| NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_extF80MToCommonNaN(
+ const struct extFloat80M *aSPtr, struct commonNaN *zPtr )
+{
+
+ if ( extF80M_isSignalingNaN( (const extFloat80_t *) aSPtr ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ zPtr->sign = signExtF80UI64( aSPtr->signExp );
+ zPtr->v64 = aSPtr->signif<<1;
+ zPtr->v0 = 0;
+
+}
+
diff --git a/softfloat/source/ARM-VFPv2/s_extF80UIToCommonNaN.c b/softfloat/source/ARM-VFPv2/s_extF80UIToCommonNaN.c
new file mode 100644
index 0000000..9c0f0ca
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2/s_extF80UIToCommonNaN.c
@@ -0,0 +1,62 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0'
+| has the bit pattern of an 80-bit extended floating-point NaN, converts
+| this NaN to the common NaN form, and stores the resulting common NaN at the
+| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_extF80UIToCommonNaN(
+ uint_fast16_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr )
+{
+
+ if ( softfloat_isSigNaNExtF80UI( uiA64, uiA0 ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ zPtr->sign = uiA64>>15;
+ zPtr->v64 = uiA0<<1;
+ zPtr->v0 = 0;
+
+}
+
diff --git a/softfloat/source/ARM-VFPv2/s_f128MToCommonNaN.c b/softfloat/source/ARM-VFPv2/s_f128MToCommonNaN.c
new file mode 100644
index 0000000..e54756b
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2/s_f128MToCommonNaN.c
@@ -0,0 +1,62 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "primitives.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Assuming the 128-bit floating-point value pointed to by 'aWPtr' is a NaN,
+| converts this NaN to the common NaN form, and stores the resulting common
+| NaN at the location pointed to by 'zPtr'. If the NaN is a signaling NaN,
+| the invalid exception is raised. Argument 'aWPtr' points to an array of
+| four 32-bit elements that concatenate in the platform's normal endian order
+| to form a 128-bit floating-point value.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_f128MToCommonNaN( const uint32_t *aWPtr, struct commonNaN *zPtr )
+{
+
+ if ( f128M_isSignalingNaN( (const float128_t *) aWPtr ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ zPtr->sign = aWPtr[indexWordHi( 4 )]>>31;
+ softfloat_shortShiftLeft128M( aWPtr, 16, (uint32_t *) &zPtr->v0 );
+
+}
+
diff --git a/softfloat/source/ARM-VFPv2/s_f128UIToCommonNaN.c b/softfloat/source/ARM-VFPv2/s_f128UIToCommonNaN.c
new file mode 100644
index 0000000..27952a7
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2/s_f128UIToCommonNaN.c
@@ -0,0 +1,65 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "primitives.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0'
+| has the bit pattern of a 128-bit floating-point NaN, converts this NaN to
+| the common NaN form, and stores the resulting common NaN at the location
+| pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid exception
+| is raised.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_f128UIToCommonNaN(
+ uint_fast64_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr )
+{
+ struct uint128 NaNSig;
+
+ if ( softfloat_isSigNaNF128UI( uiA64, uiA0 ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ NaNSig = softfloat_shortShiftLeft128( uiA64, uiA0, 16 );
+ zPtr->sign = uiA64>>63;
+ zPtr->v64 = NaNSig.v64;
+ zPtr->v0 = NaNSig.v0;
+
+}
+
diff --git a/softfloat/source/ARM-VFPv2/s_f16UIToCommonNaN.c b/softfloat/source/ARM-VFPv2/s_f16UIToCommonNaN.c
new file mode 100644
index 0000000..ee1928e
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2/s_f16UIToCommonNaN.c
@@ -0,0 +1,59 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Assuming 'uiA' has the bit pattern of a 16-bit floating-point NaN, converts
+| this NaN to the common NaN form, and stores the resulting common NaN at the
+| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+void softfloat_f16UIToCommonNaN( uint_fast16_t uiA, struct commonNaN *zPtr )
+{
+
+ if ( softfloat_isSigNaNF16UI( uiA ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ zPtr->sign = uiA>>15;
+ zPtr->v64 = (uint_fast64_t) uiA<<54;
+ zPtr->v0 = 0;
+
+}
+
diff --git a/softfloat/source/ARM-VFPv2/s_f32UIToCommonNaN.c b/softfloat/source/ARM-VFPv2/s_f32UIToCommonNaN.c
new file mode 100644
index 0000000..249e478
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2/s_f32UIToCommonNaN.c
@@ -0,0 +1,59 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Assuming 'uiA' has the bit pattern of a 32-bit floating-point NaN, converts
+| this NaN to the common NaN form, and stores the resulting common NaN at the
+| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+void softfloat_f32UIToCommonNaN( uint_fast32_t uiA, struct commonNaN *zPtr )
+{
+
+ if ( softfloat_isSigNaNF32UI( uiA ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ zPtr->sign = uiA>>31;
+ zPtr->v64 = (uint_fast64_t) uiA<<41;
+ zPtr->v0 = 0;
+
+}
+
diff --git a/softfloat/source/ARM-VFPv2/s_f64UIToCommonNaN.c b/softfloat/source/ARM-VFPv2/s_f64UIToCommonNaN.c
new file mode 100644
index 0000000..adca2d0
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2/s_f64UIToCommonNaN.c
@@ -0,0 +1,59 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Assuming 'uiA' has the bit pattern of a 64-bit floating-point NaN, converts
+| this NaN to the common NaN form, and stores the resulting common NaN at the
+| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+void softfloat_f64UIToCommonNaN( uint_fast64_t uiA, struct commonNaN *zPtr )
+{
+
+ if ( softfloat_isSigNaNF64UI( uiA ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ zPtr->sign = uiA>>63;
+ zPtr->v64 = uiA<<12;
+ zPtr->v0 = 0;
+
+}
+
diff --git a/softfloat/source/ARM-VFPv2/s_propagateNaNExtF80M.c b/softfloat/source/ARM-VFPv2/s_propagateNaNExtF80M.c
new file mode 100644
index 0000000..1c14256
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2/s_propagateNaNExtF80M.c
@@ -0,0 +1,86 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Assuming at least one of the two 80-bit extended floating-point values
+| pointed to by 'aSPtr' and 'bSPtr' is a NaN, stores the combined NaN result
+| at the location pointed to by 'zSPtr'. If either original floating-point
+| value is a signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_propagateNaNExtF80M(
+ const struct extFloat80M *aSPtr,
+ const struct extFloat80M *bSPtr,
+ struct extFloat80M *zSPtr
+ )
+{
+ const struct extFloat80M *sPtr;
+ bool isSigNaNA;
+ uint_fast16_t uiZ64;
+ uint_fast64_t uiZ0;
+
+ sPtr = aSPtr;
+ isSigNaNA = extF80M_isSignalingNaN( (const extFloat80_t *) aSPtr );
+ if (
+ isSigNaNA
+ || (bSPtr
+ && extF80M_isSignalingNaN( (const extFloat80_t *) bSPtr ))
+ ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ if ( isSigNaNA ) goto copyNonsig;
+ goto copyNonsigB;
+ }
+ uiZ64 = sPtr->signExp;
+ uiZ0 = sPtr->signif;
+ if ( isNaNExtF80UI( uiZ64, uiZ0 ) ) goto returnNonsig;
+ copyNonsigB:
+ sPtr = bSPtr;
+ copyNonsig:
+ uiZ64 = sPtr->signExp;
+ uiZ0 = sPtr->signif;
+ returnNonsig:
+ zSPtr->signExp = uiZ64;
+ zSPtr->signif = uiZ0 | UINT64_C( 0xC000000000000000 );
+
+}
+
diff --git a/softfloat/source/ARM-VFPv2/s_propagateNaNExtF80UI.c b/softfloat/source/ARM-VFPv2/s_propagateNaNExtF80UI.c
new file mode 100644
index 0000000..be95414
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2/s_propagateNaNExtF80UI.c
@@ -0,0 +1,83 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Interpreting the unsigned integer formed from concatenating 'uiA64' and
+| 'uiA0' as an 80-bit extended floating-point value, and likewise interpreting
+| the unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another
+| 80-bit extended floating-point value, and assuming at least on of these
+| floating-point values is a NaN, returns the bit pattern of the combined NaN
+| result. If either original floating-point value is a signaling NaN, the
+| invalid exception is raised.
+*----------------------------------------------------------------------------*/
+struct uint128
+ softfloat_propagateNaNExtF80UI(
+ uint_fast16_t uiA64,
+ uint_fast64_t uiA0,
+ uint_fast16_t uiB64,
+ uint_fast64_t uiB0
+ )
+{
+ bool isSigNaNA;
+ struct uint128 uiZ;
+
+ isSigNaNA = softfloat_isSigNaNExtF80UI( uiA64, uiA0 );
+ if ( isSigNaNA || softfloat_isSigNaNExtF80UI( uiB64, uiB0 ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ if ( isSigNaNA ) goto returnNonsigA;
+ goto returnNonsigB;
+ }
+ if ( isNaNExtF80UI( uiA64, uiA0 ) ) {
+ returnNonsigA:
+ uiZ.v64 = uiA64;
+ uiZ.v0 = uiA0;
+ } else {
+ returnNonsigB:
+ uiZ.v64 = uiB64;
+ uiZ.v0 = uiB0;
+ }
+ uiZ.v0 | UINT64_C( 0xC000000000000000 );
+ return uiZ;
+
+}
+
diff --git a/softfloat/source/ARM-VFPv2/s_propagateNaNF128M.c b/softfloat/source/ARM-VFPv2/s_propagateNaNF128M.c
new file mode 100644
index 0000000..6a30052
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2/s_propagateNaNF128M.c
@@ -0,0 +1,77 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Assuming at least one of the two 128-bit floating-point values pointed to by
+| 'aWPtr' and 'bWPtr' is a NaN, stores the combined NaN result at the location
+| pointed to by 'zWPtr'. If either original floating-point value is a
+| signaling NaN, the invalid exception is raised. Each of 'aWPtr', 'bWPtr',
+| and 'zWPtr' points to an array of four 32-bit elements that concatenate in
+| the platform's normal endian order to form a 128-bit floating-point value.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_propagateNaNF128M(
+ const uint32_t *aWPtr, const uint32_t *bWPtr, uint32_t *zWPtr )
+{
+ const uint32_t *ptr;
+ bool isSigNaNA;
+
+ ptr = aWPtr;
+ isSigNaNA = f128M_isSignalingNaN( (const float128_t *) aWPtr );
+ if (
+ isSigNaNA
+ || (bWPtr && f128M_isSignalingNaN( (const float128_t *) bWPtr ))
+ ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ if ( ! isSigNaNA ) ptr = bWPtr;
+ goto copyNonsig;
+ }
+ if ( ! softfloat_isNaNF128M( aWPtr ) ) ptr = bWPtr;
+ copyNonsig:
+ zWPtr[indexWordHi( 4 )] = ptr[indexWordHi( 4 )] | 0x00008000;
+ zWPtr[indexWord( 4, 2 )] = ptr[indexWord( 4, 2 )];
+ zWPtr[indexWord( 4, 1 )] = ptr[indexWord( 4, 1 )];
+ zWPtr[indexWord( 4, 0 )] = ptr[indexWord( 4, 0 )];
+
+}
+
diff --git a/softfloat/source/ARM-VFPv2/s_propagateNaNF128UI.c b/softfloat/source/ARM-VFPv2/s_propagateNaNF128UI.c
new file mode 100644
index 0000000..5aece62
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2/s_propagateNaNF128UI.c
@@ -0,0 +1,83 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Interpreting the unsigned integer formed from concatenating 'uiA64' and
+| 'uiA0' as a 128-bit floating-point value, and likewise interpreting the
+| unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another
+| 128-bit floating-point value, and assuming at least on of these floating-
+| point values is a NaN, returns the bit pattern of the combined NaN result.
+| If either original floating-point value is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+struct uint128
+ softfloat_propagateNaNF128UI(
+ uint_fast64_t uiA64,
+ uint_fast64_t uiA0,
+ uint_fast64_t uiB64,
+ uint_fast64_t uiB0
+ )
+{
+ bool isSigNaNA;
+ struct uint128 uiZ;
+
+ isSigNaNA = softfloat_isSigNaNF128UI( uiA64, uiA0 );
+ if ( isSigNaNA || softfloat_isSigNaNF128UI( uiB64, uiB0 ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ if ( isSigNaNA ) goto returnNonsigA;
+ goto returnNonsigB;
+ }
+ if ( isNaNF128UI( uiA64, uiA0 ) ) {
+ returnNonsigA:
+ uiZ.v64 = uiA64;
+ uiZ.v0 = uiA0;
+ } else {
+ returnNonsigB:
+ uiZ.v64 = uiB64;
+ uiZ.v0 = uiB0;
+ }
+ uiZ.v64 |= UINT64_C( 0x0000800000000000 );
+ return uiZ;
+
+}
+
diff --git a/softfloat/source/ARM-VFPv2/s_propagateNaNF16UI.c b/softfloat/source/ARM-VFPv2/s_propagateNaNF16UI.c
new file mode 100644
index 0000000..8801460
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2/s_propagateNaNF16UI.c
@@ -0,0 +1,63 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 16-bit floating-
+| point values, at least one of which is a NaN, returns the bit pattern of
+| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a
+| signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+uint_fast16_t
+ softfloat_propagateNaNF16UI( uint_fast16_t uiA, uint_fast16_t uiB )
+{
+ bool isSigNaNA;
+
+ isSigNaNA = softfloat_isSigNaNF16UI( uiA );
+ if ( isSigNaNA || softfloat_isSigNaNF16UI( uiB ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ return (isSigNaNA ? uiA : uiB) | 0x0200;
+ }
+ return isNaNF16UI( uiA ) ? uiA : uiB;
+
+}
+
diff --git a/softfloat/source/ARM-VFPv2/s_propagateNaNF32UI.c b/softfloat/source/ARM-VFPv2/s_propagateNaNF32UI.c
new file mode 100644
index 0000000..31b289e
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2/s_propagateNaNF32UI.c
@@ -0,0 +1,63 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 32-bit floating-
+| point values, at least one of which is a NaN, returns the bit pattern of
+| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a
+| signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+uint_fast32_t
+ softfloat_propagateNaNF32UI( uint_fast32_t uiA, uint_fast32_t uiB )
+{
+ bool isSigNaNA;
+
+ isSigNaNA = softfloat_isSigNaNF32UI( uiA );
+ if ( isSigNaNA || softfloat_isSigNaNF32UI( uiB ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ return (isSigNaNA ? uiA : uiB) | 0x00400000;
+ }
+ return isNaNF32UI( uiA ) ? uiA : uiB;
+
+}
+
diff --git a/softfloat/source/ARM-VFPv2/s_propagateNaNF64UI.c b/softfloat/source/ARM-VFPv2/s_propagateNaNF64UI.c
new file mode 100644
index 0000000..224049a
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2/s_propagateNaNF64UI.c
@@ -0,0 +1,63 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 64-bit floating-
+| point values, at least one of which is a NaN, returns the bit pattern of
+| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a
+| signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+uint_fast64_t
+ softfloat_propagateNaNF64UI( uint_fast64_t uiA, uint_fast64_t uiB )
+{
+ bool isSigNaNA;
+
+ isSigNaNA = softfloat_isSigNaNF64UI( uiA );
+ if ( isSigNaNA || softfloat_isSigNaNF64UI( uiB ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ return (isSigNaNA ? uiA : uiB) | UINT64_C( 0x0008000000000000 );
+ }
+ return isNaNF64UI( uiA ) ? uiA : uiB;
+
+}
+
diff --git a/softfloat/source/ARM-VFPv2/softfloat_raiseFlags.c b/softfloat/source/ARM-VFPv2/softfloat_raiseFlags.c
new file mode 100644
index 0000000..f8f1065
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2/softfloat_raiseFlags.c
@@ -0,0 +1,52 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include "platform.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Raises the exceptions specified by 'flags'. Floating-point traps can be
+| defined here if desired. It is currently not possible for such a trap
+| to substitute a result value. If traps are not implemented, this routine
+| should be simply 'softfloat_exceptionFlags |= flags;'.
+*----------------------------------------------------------------------------*/
+void softfloat_raiseFlags( uint_fast8_t flags )
+{
+
+ softfloat_exceptionFlags |= flags;
+
+}
+
diff --git a/softfloat/source/ARM-VFPv2/specialize.h b/softfloat/source/ARM-VFPv2/specialize.h
new file mode 100644
index 0000000..10b0b35
--- /dev/null
+++ b/softfloat/source/ARM-VFPv2/specialize.h
@@ -0,0 +1,376 @@
+
+/*============================================================================
+
+This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017, 2018 The Regents of the
+University of California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#ifndef specialize_h
+#define specialize_h 1
+
+#include
+#include
+#include "primitiveTypes.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Default value for 'softfloat_detectTininess'.
+*----------------------------------------------------------------------------*/
+#define init_detectTininess softfloat_tininess_beforeRounding
+
+/*----------------------------------------------------------------------------
+| The values to return on conversions to 32-bit integer formats that raise an
+| invalid exception.
+*----------------------------------------------------------------------------*/
+#define ui32_fromPosOverflow 0xFFFFFFFF
+#define ui32_fromNegOverflow 0
+#define ui32_fromNaN 0
+#define i32_fromPosOverflow 0x7FFFFFFF
+#define i32_fromNegOverflow (-0x7FFFFFFF - 1)
+#define i32_fromNaN 0
+
+/*----------------------------------------------------------------------------
+| The values to return on conversions to 64-bit integer formats that raise an
+| invalid exception.
+*----------------------------------------------------------------------------*/
+#define ui64_fromPosOverflow UINT64_C( 0xFFFFFFFFFFFFFFFF )
+#define ui64_fromNegOverflow 0
+#define ui64_fromNaN 0
+#define i64_fromPosOverflow INT64_C( 0x7FFFFFFFFFFFFFFF )
+#define i64_fromNegOverflow (-INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1)
+#define i64_fromNaN 0
+
+/*----------------------------------------------------------------------------
+| "Common NaN" structure, used to transfer NaN representations from one format
+| to another.
+*----------------------------------------------------------------------------*/
+struct commonNaN {
+ bool sign;
+#ifdef LITTLEENDIAN
+ uint64_t v0, v64;
+#else
+ uint64_t v64, v0;
+#endif
+};
+
+/*----------------------------------------------------------------------------
+| The bit pattern for a default generated 16-bit floating-point NaN.
+*----------------------------------------------------------------------------*/
+#define defaultNaNF16UI 0x7E00
+
+/*----------------------------------------------------------------------------
+| Returns true when 16-bit unsigned integer 'uiA' has the bit pattern of a
+| 16-bit floating-point signaling NaN.
+| Note: This macro evaluates its argument more than once.
+*----------------------------------------------------------------------------*/
+#define softfloat_isSigNaNF16UI( uiA ) ((((uiA) & 0x7E00) == 0x7C00) && ((uiA) & 0x01FF))
+
+/*----------------------------------------------------------------------------
+| Assuming 'uiA' has the bit pattern of a 16-bit floating-point NaN, converts
+| this NaN to the common NaN form, and stores the resulting common NaN at the
+| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+void softfloat_f16UIToCommonNaN( uint_fast16_t uiA, struct commonNaN *zPtr );
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into a 16-bit floating-point
+| NaN, and returns the bit pattern of this value as an unsigned integer.
+*----------------------------------------------------------------------------*/
+uint_fast16_t softfloat_commonNaNToF16UI( const struct commonNaN *aPtr );
+
+/*----------------------------------------------------------------------------
+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 16-bit floating-
+| point values, at least one of which is a NaN, returns the bit pattern of
+| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a
+| signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+uint_fast16_t
+ softfloat_propagateNaNF16UI( uint_fast16_t uiA, uint_fast16_t uiB );
+
+/*----------------------------------------------------------------------------
+| The bit pattern for a default generated 32-bit floating-point NaN.
+*----------------------------------------------------------------------------*/
+#define defaultNaNF32UI 0x7FC00000
+
+/*----------------------------------------------------------------------------
+| Returns true when 32-bit unsigned integer 'uiA' has the bit pattern of a
+| 32-bit floating-point signaling NaN.
+| Note: This macro evaluates its argument more than once.
+*----------------------------------------------------------------------------*/
+#define softfloat_isSigNaNF32UI( uiA ) ((((uiA) & 0x7FC00000) == 0x7F800000) && ((uiA) & 0x003FFFFF))
+
+/*----------------------------------------------------------------------------
+| Assuming 'uiA' has the bit pattern of a 32-bit floating-point NaN, converts
+| this NaN to the common NaN form, and stores the resulting common NaN at the
+| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+void softfloat_f32UIToCommonNaN( uint_fast32_t uiA, struct commonNaN *zPtr );
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into a 32-bit floating-point
+| NaN, and returns the bit pattern of this value as an unsigned integer.
+*----------------------------------------------------------------------------*/
+uint_fast32_t softfloat_commonNaNToF32UI( const struct commonNaN *aPtr );
+
+/*----------------------------------------------------------------------------
+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 32-bit floating-
+| point values, at least one of which is a NaN, returns the bit pattern of
+| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a
+| signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+uint_fast32_t
+ softfloat_propagateNaNF32UI( uint_fast32_t uiA, uint_fast32_t uiB );
+
+/*----------------------------------------------------------------------------
+| The bit pattern for a default generated 64-bit floating-point NaN.
+*----------------------------------------------------------------------------*/
+#define defaultNaNF64UI UINT64_C( 0x7FF8000000000000 )
+
+/*----------------------------------------------------------------------------
+| Returns true when 64-bit unsigned integer 'uiA' has the bit pattern of a
+| 64-bit floating-point signaling NaN.
+| Note: This macro evaluates its argument more than once.
+*----------------------------------------------------------------------------*/
+#define softfloat_isSigNaNF64UI( uiA ) ((((uiA) & UINT64_C( 0x7FF8000000000000 )) == UINT64_C( 0x7FF0000000000000 )) && ((uiA) & UINT64_C( 0x0007FFFFFFFFFFFF )))
+
+/*----------------------------------------------------------------------------
+| Assuming 'uiA' has the bit pattern of a 64-bit floating-point NaN, converts
+| this NaN to the common NaN form, and stores the resulting common NaN at the
+| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+void softfloat_f64UIToCommonNaN( uint_fast64_t uiA, struct commonNaN *zPtr );
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into a 64-bit floating-point
+| NaN, and returns the bit pattern of this value as an unsigned integer.
+*----------------------------------------------------------------------------*/
+uint_fast64_t softfloat_commonNaNToF64UI( const struct commonNaN *aPtr );
+
+/*----------------------------------------------------------------------------
+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 64-bit floating-
+| point values, at least one of which is a NaN, returns the bit pattern of
+| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a
+| signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+uint_fast64_t
+ softfloat_propagateNaNF64UI( uint_fast64_t uiA, uint_fast64_t uiB );
+
+/*----------------------------------------------------------------------------
+| The bit pattern for a default generated 80-bit extended floating-point NaN.
+*----------------------------------------------------------------------------*/
+#define defaultNaNExtF80UI64 0x7FFF
+#define defaultNaNExtF80UI0 UINT64_C( 0xC000000000000000 )
+
+/*----------------------------------------------------------------------------
+| Returns true when the 80-bit unsigned integer formed from concatenating
+| 16-bit 'uiA64' and 64-bit 'uiA0' has the bit pattern of an 80-bit extended
+| floating-point signaling NaN.
+| Note: This macro evaluates its arguments more than once.
+*----------------------------------------------------------------------------*/
+#define softfloat_isSigNaNExtF80UI( uiA64, uiA0 ) ((((uiA64) & 0x7FFF) == 0x7FFF) && ! ((uiA0) & UINT64_C( 0x4000000000000000 )) && ((uiA0) & UINT64_C( 0x3FFFFFFFFFFFFFFF )))
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+/*----------------------------------------------------------------------------
+| The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is
+| defined.
+*----------------------------------------------------------------------------*/
+
+/*----------------------------------------------------------------------------
+| Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0'
+| has the bit pattern of an 80-bit extended floating-point NaN, converts
+| this NaN to the common NaN form, and stores the resulting common NaN at the
+| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_extF80UIToCommonNaN(
+ uint_fast16_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr );
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended
+| floating-point NaN, and returns the bit pattern of this value as an unsigned
+| integer.
+*----------------------------------------------------------------------------*/
+struct uint128 softfloat_commonNaNToExtF80UI( const struct commonNaN *aPtr );
+
+/*----------------------------------------------------------------------------
+| Interpreting the unsigned integer formed from concatenating 'uiA64' and
+| 'uiA0' as an 80-bit extended floating-point value, and likewise interpreting
+| the unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another
+| 80-bit extended floating-point value, and assuming at least on of these
+| floating-point values is a NaN, returns the bit pattern of the combined NaN
+| result. If either original floating-point value is a signaling NaN, the
+| invalid exception is raised.
+*----------------------------------------------------------------------------*/
+struct uint128
+ softfloat_propagateNaNExtF80UI(
+ uint_fast16_t uiA64,
+ uint_fast64_t uiA0,
+ uint_fast16_t uiB64,
+ uint_fast64_t uiB0
+ );
+
+/*----------------------------------------------------------------------------
+| The bit pattern for a default generated 128-bit floating-point NaN.
+*----------------------------------------------------------------------------*/
+#define defaultNaNF128UI64 UINT64_C( 0x7FFF800000000000 )
+#define defaultNaNF128UI0 UINT64_C( 0 )
+
+/*----------------------------------------------------------------------------
+| Returns true when the 128-bit unsigned integer formed from concatenating
+| 64-bit 'uiA64' and 64-bit 'uiA0' has the bit pattern of a 128-bit floating-
+| point signaling NaN.
+| Note: This macro evaluates its arguments more than once.
+*----------------------------------------------------------------------------*/
+#define softfloat_isSigNaNF128UI( uiA64, uiA0 ) ((((uiA64) & UINT64_C( 0x7FFF800000000000 )) == UINT64_C( 0x7FFF000000000000 )) && ((uiA0) || ((uiA64) & UINT64_C( 0x00007FFFFFFFFFFF ))))
+
+/*----------------------------------------------------------------------------
+| Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0'
+| has the bit pattern of a 128-bit floating-point NaN, converts this NaN to
+| the common NaN form, and stores the resulting common NaN at the location
+| pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid exception
+| is raised.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_f128UIToCommonNaN(
+ uint_fast64_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr );
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point
+| NaN, and returns the bit pattern of this value as an unsigned integer.
+*----------------------------------------------------------------------------*/
+struct uint128 softfloat_commonNaNToF128UI( const struct commonNaN * );
+
+/*----------------------------------------------------------------------------
+| Interpreting the unsigned integer formed from concatenating 'uiA64' and
+| 'uiA0' as a 128-bit floating-point value, and likewise interpreting the
+| unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another
+| 128-bit floating-point value, and assuming at least on of these floating-
+| point values is a NaN, returns the bit pattern of the combined NaN result.
+| If either original floating-point value is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+struct uint128
+ softfloat_propagateNaNF128UI(
+ uint_fast64_t uiA64,
+ uint_fast64_t uiA0,
+ uint_fast64_t uiB64,
+ uint_fast64_t uiB0
+ );
+
+#else
+
+/*----------------------------------------------------------------------------
+| The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is not
+| defined.
+*----------------------------------------------------------------------------*/
+
+/*----------------------------------------------------------------------------
+| Assuming the 80-bit extended floating-point value pointed to by 'aSPtr' is
+| a NaN, converts this NaN to the common NaN form, and stores the resulting
+| common NaN at the location pointed to by 'zPtr'. If the NaN is a signaling
+| NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_extF80MToCommonNaN(
+ const struct extFloat80M *aSPtr, struct commonNaN *zPtr );
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended
+| floating-point NaN, and stores this NaN at the location pointed to by
+| 'zSPtr'.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_commonNaNToExtF80M(
+ const struct commonNaN *aPtr, struct extFloat80M *zSPtr );
+
+/*----------------------------------------------------------------------------
+| Assuming at least one of the two 80-bit extended floating-point values
+| pointed to by 'aSPtr' and 'bSPtr' is a NaN, stores the combined NaN result
+| at the location pointed to by 'zSPtr'. If either original floating-point
+| value is a signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_propagateNaNExtF80M(
+ const struct extFloat80M *aSPtr,
+ const struct extFloat80M *bSPtr,
+ struct extFloat80M *zSPtr
+ );
+
+/*----------------------------------------------------------------------------
+| The bit pattern for a default generated 128-bit floating-point NaN.
+*----------------------------------------------------------------------------*/
+#define defaultNaNF128UI96 0x7FFF8000
+#define defaultNaNF128UI64 0
+#define defaultNaNF128UI32 0
+#define defaultNaNF128UI0 0
+
+/*----------------------------------------------------------------------------
+| Assuming the 128-bit floating-point value pointed to by 'aWPtr' is a NaN,
+| converts this NaN to the common NaN form, and stores the resulting common
+| NaN at the location pointed to by 'zPtr'. If the NaN is a signaling NaN,
+| the invalid exception is raised. Argument 'aWPtr' points to an array of
+| four 32-bit elements that concatenate in the platform's normal endian order
+| to form a 128-bit floating-point value.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_f128MToCommonNaN( const uint32_t *aWPtr, struct commonNaN *zPtr );
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point
+| NaN, and stores this NaN at the location pointed to by 'zWPtr'. Argument
+| 'zWPtr' points to an array of four 32-bit elements that concatenate in the
+| platform's normal endian order to form a 128-bit floating-point value.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_commonNaNToF128M( const struct commonNaN *aPtr, uint32_t *zWPtr );
+
+/*----------------------------------------------------------------------------
+| Assuming at least one of the two 128-bit floating-point values pointed to by
+| 'aWPtr' and 'bWPtr' is a NaN, stores the combined NaN result at the location
+| pointed to by 'zWPtr'. If either original floating-point value is a
+| signaling NaN, the invalid exception is raised. Each of 'aWPtr', 'bWPtr',
+| and 'zWPtr' points to an array of four 32-bit elements that concatenate in
+| the platform's normal endian order to form a 128-bit floating-point value.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_propagateNaNF128M(
+ const uint32_t *aWPtr, const uint32_t *bWPtr, uint32_t *zWPtr );
+
+#endif
+
+#endif
+
diff --git a/softfloat/source/RISCV/extF80M_isSignalingNaN.c b/softfloat/source/RISCV/extF80M_isSignalingNaN.c
new file mode 100644
index 0000000..c2cca65
--- /dev/null
+++ b/softfloat/source/RISCV/extF80M_isSignalingNaN.c
@@ -0,0 +1,57 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+bool extF80M_isSignalingNaN( const extFloat80_t *aPtr )
+{
+ const struct extFloat80M *aSPtr;
+ uint64_t uiA0;
+
+ aSPtr = (const struct extFloat80M *) aPtr;
+ if ( (aSPtr->signExp & 0x7FFF) != 0x7FFF ) return false;
+ uiA0 = aSPtr->signif;
+ return
+ ! (uiA0 & UINT64_C( 0x4000000000000000 ))
+ && (uiA0 & UINT64_C( 0x3FFFFFFFFFFFFFFF));
+
+}
+
diff --git a/softfloat/source/RISCV/f128M_isSignalingNaN.c b/softfloat/source/RISCV/f128M_isSignalingNaN.c
new file mode 100644
index 0000000..9ff83d7
--- /dev/null
+++ b/softfloat/source/RISCV/f128M_isSignalingNaN.c
@@ -0,0 +1,60 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "primitives.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+bool f128M_isSignalingNaN( const float128_t *aPtr )
+{
+ const uint32_t *aWPtr;
+ uint32_t uiA96;
+
+ aWPtr = (const uint32_t *) aPtr;
+ uiA96 = aWPtr[indexWordHi( 4 )];
+ if ( (uiA96 & 0x7FFF8000) != 0x7FFF0000 ) return false;
+ return
+ ((uiA96 & 0x00007FFF) != 0)
+ || ((aWPtr[indexWord( 4, 2 )] | aWPtr[indexWord( 4, 1 )]
+ | aWPtr[indexWord( 4, 0 )])
+ != 0);
+
+}
+
diff --git a/softfloat/source/RISCV/s_commonNaNToExtF80M.c b/softfloat/source/RISCV/s_commonNaNToExtF80M.c
new file mode 100644
index 0000000..6d1e67e
--- /dev/null
+++ b/softfloat/source/RISCV/s_commonNaNToExtF80M.c
@@ -0,0 +1,57 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include "platform.h"
+#include "softfloat_types.h"
+
+#define softfloat_commonNaNToExtF80M softfloat_commonNaNToExtF80M
+#include "specialize.h"
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by `aPtr' into an 80-bit extended
+| floating-point NaN, and stores this NaN at the location pointed to by
+| `zSPtr'.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_commonNaNToExtF80M(
+ const struct commonNaN *aPtr, struct extFloat80M *zSPtr )
+{
+
+ zSPtr->signExp = defaultNaNExtF80UI64;
+ zSPtr->signif = defaultNaNExtF80UI0;
+
+}
+
diff --git a/softfloat/source/RISCV/s_commonNaNToExtF80UI.c b/softfloat/source/RISCV/s_commonNaNToExtF80UI.c
new file mode 100644
index 0000000..953b97a
--- /dev/null
+++ b/softfloat/source/RISCV/s_commonNaNToExtF80UI.c
@@ -0,0 +1,57 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include "platform.h"
+#include "primitiveTypes.h"
+
+#define softfloat_commonNaNToExtF80UI softfloat_commonNaNToExtF80UI
+#include "specialize.h"
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by `aPtr' into an 80-bit extended
+| floating-point NaN, and returns the bit pattern of this value as an unsigned
+| integer.
+*----------------------------------------------------------------------------*/
+struct uint128 softfloat_commonNaNToExtF80UI( const struct commonNaN *aPtr )
+{
+ struct uint128 uiZ;
+
+ uiZ.v64 = defaultNaNExtF80UI64;
+ uiZ.v0 = defaultNaNExtF80UI0;
+ return uiZ;
+
+}
+
diff --git a/softfloat/source/RISCV/s_commonNaNToF128M.c b/softfloat/source/RISCV/s_commonNaNToF128M.c
new file mode 100644
index 0000000..d91b62e
--- /dev/null
+++ b/softfloat/source/RISCV/s_commonNaNToF128M.c
@@ -0,0 +1,60 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "primitiveTypes.h"
+
+#define softfloat_commonNaNToF128M softfloat_commonNaNToF128M
+#include "specialize.h"
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by `aPtr' into a 128-bit floating-point
+| NaN, and stores this NaN at the location pointed to by `zWPtr'. Argument
+| `zWPtr' points to an array of four 32-bit elements that concatenate in the
+| platform's normal endian order to form a 128-bit floating-point value.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_commonNaNToF128M( const struct commonNaN *aPtr, uint32_t *zWPtr )
+{
+
+ zWPtr[indexWord( 4, 3 )] = defaultNaNF128UI96;
+ zWPtr[indexWord( 4, 2 )] = defaultNaNF128UI64;
+ zWPtr[indexWord( 4, 1 )] = defaultNaNF128UI32;
+ zWPtr[indexWord( 4, 0 )] = defaultNaNF128UI0;
+
+}
+
diff --git a/softfloat/source/RISCV/s_commonNaNToF128UI.c b/softfloat/source/RISCV/s_commonNaNToF128UI.c
new file mode 100644
index 0000000..b4c578d
--- /dev/null
+++ b/softfloat/source/RISCV/s_commonNaNToF128UI.c
@@ -0,0 +1,56 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include "platform.h"
+#include "primitiveTypes.h"
+
+#define softfloat_commonNaNToF128UI softfloat_commonNaNToF128UI
+#include "specialize.h"
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by `aPtr' into a 128-bit floating-point
+| NaN, and returns the bit pattern of this value as an unsigned integer.
+*----------------------------------------------------------------------------*/
+struct uint128 softfloat_commonNaNToF128UI( const struct commonNaN *aPtr )
+{
+ struct uint128 uiZ;
+
+ uiZ.v64 = defaultNaNF128UI64;
+ uiZ.v0 = defaultNaNF128UI0;
+ return uiZ;
+
+}
+
diff --git a/softfloat/source/RISCV/s_commonNaNToF16UI.c b/softfloat/source/RISCV/s_commonNaNToF16UI.c
new file mode 100644
index 0000000..861b269
--- /dev/null
+++ b/softfloat/source/RISCV/s_commonNaNToF16UI.c
@@ -0,0 +1,5 @@
+
+/*----------------------------------------------------------------------------
+| This file intentionally contains no code.
+*----------------------------------------------------------------------------*/
+
diff --git a/softfloat/source/RISCV/s_commonNaNToF32UI.c b/softfloat/source/RISCV/s_commonNaNToF32UI.c
new file mode 100644
index 0000000..861b269
--- /dev/null
+++ b/softfloat/source/RISCV/s_commonNaNToF32UI.c
@@ -0,0 +1,5 @@
+
+/*----------------------------------------------------------------------------
+| This file intentionally contains no code.
+*----------------------------------------------------------------------------*/
+
diff --git a/softfloat/source/RISCV/s_commonNaNToF64UI.c b/softfloat/source/RISCV/s_commonNaNToF64UI.c
new file mode 100644
index 0000000..861b269
--- /dev/null
+++ b/softfloat/source/RISCV/s_commonNaNToF64UI.c
@@ -0,0 +1,5 @@
+
+/*----------------------------------------------------------------------------
+| This file intentionally contains no code.
+*----------------------------------------------------------------------------*/
+
diff --git a/softfloat/source/RISCV/s_extF80MToCommonNaN.c b/softfloat/source/RISCV/s_extF80MToCommonNaN.c
new file mode 100644
index 0000000..861b269
--- /dev/null
+++ b/softfloat/source/RISCV/s_extF80MToCommonNaN.c
@@ -0,0 +1,5 @@
+
+/*----------------------------------------------------------------------------
+| This file intentionally contains no code.
+*----------------------------------------------------------------------------*/
+
diff --git a/softfloat/source/RISCV/s_extF80UIToCommonNaN.c b/softfloat/source/RISCV/s_extF80UIToCommonNaN.c
new file mode 100644
index 0000000..861b269
--- /dev/null
+++ b/softfloat/source/RISCV/s_extF80UIToCommonNaN.c
@@ -0,0 +1,5 @@
+
+/*----------------------------------------------------------------------------
+| This file intentionally contains no code.
+*----------------------------------------------------------------------------*/
+
diff --git a/softfloat/source/RISCV/s_f128MToCommonNaN.c b/softfloat/source/RISCV/s_f128MToCommonNaN.c
new file mode 100644
index 0000000..861b269
--- /dev/null
+++ b/softfloat/source/RISCV/s_f128MToCommonNaN.c
@@ -0,0 +1,5 @@
+
+/*----------------------------------------------------------------------------
+| This file intentionally contains no code.
+*----------------------------------------------------------------------------*/
+
diff --git a/softfloat/source/RISCV/s_f128UIToCommonNaN.c b/softfloat/source/RISCV/s_f128UIToCommonNaN.c
new file mode 100644
index 0000000..861b269
--- /dev/null
+++ b/softfloat/source/RISCV/s_f128UIToCommonNaN.c
@@ -0,0 +1,5 @@
+
+/*----------------------------------------------------------------------------
+| This file intentionally contains no code.
+*----------------------------------------------------------------------------*/
+
diff --git a/softfloat/source/RISCV/s_f16UIToCommonNaN.c b/softfloat/source/RISCV/s_f16UIToCommonNaN.c
new file mode 100644
index 0000000..861b269
--- /dev/null
+++ b/softfloat/source/RISCV/s_f16UIToCommonNaN.c
@@ -0,0 +1,5 @@
+
+/*----------------------------------------------------------------------------
+| This file intentionally contains no code.
+*----------------------------------------------------------------------------*/
+
diff --git a/softfloat/source/RISCV/s_f32UIToCommonNaN.c b/softfloat/source/RISCV/s_f32UIToCommonNaN.c
new file mode 100644
index 0000000..861b269
--- /dev/null
+++ b/softfloat/source/RISCV/s_f32UIToCommonNaN.c
@@ -0,0 +1,5 @@
+
+/*----------------------------------------------------------------------------
+| This file intentionally contains no code.
+*----------------------------------------------------------------------------*/
+
diff --git a/softfloat/source/RISCV/s_f64UIToCommonNaN.c b/softfloat/source/RISCV/s_f64UIToCommonNaN.c
new file mode 100644
index 0000000..861b269
--- /dev/null
+++ b/softfloat/source/RISCV/s_f64UIToCommonNaN.c
@@ -0,0 +1,5 @@
+
+/*----------------------------------------------------------------------------
+| This file intentionally contains no code.
+*----------------------------------------------------------------------------*/
+
diff --git a/softfloat/source/RISCV/s_propagateNaNExtF80M.c b/softfloat/source/RISCV/s_propagateNaNExtF80M.c
new file mode 100644
index 0000000..8adc62e
--- /dev/null
+++ b/softfloat/source/RISCV/s_propagateNaNExtF80M.c
@@ -0,0 +1,74 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "primitiveTypes.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Assuming at least one of the two 80-bit extended floating-point values
+| pointed to by `aSPtr' and `bSPtr' is a NaN, stores the combined NaN result
+| at the location pointed to by `zSPtr'. If either original floating-point
+| value is a signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_propagateNaNExtF80M(
+ const struct extFloat80M *aSPtr,
+ const struct extFloat80M *bSPtr,
+ struct extFloat80M *zSPtr
+ )
+{
+ uint_fast16_t ui64;
+ uint_fast64_t ui0;
+
+ ui64 = aSPtr->signExp;
+ ui0 = aSPtr->signif;
+ if (
+ softfloat_isSigNaNExtF80UI( ui64, ui0 )
+ || (bSPtr
+ && (ui64 = bSPtr->signExp,
+ ui0 = bSPtr->signif,
+ softfloat_isSigNaNExtF80UI( ui64, ui0 )))
+ ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ zSPtr->signExp = defaultNaNExtF80UI64;
+ zSPtr->signif = defaultNaNExtF80UI0;
+
+}
+
diff --git a/softfloat/source/RISCV/s_propagateNaNExtF80UI.c b/softfloat/source/RISCV/s_propagateNaNExtF80UI.c
new file mode 100644
index 0000000..88bfee5
--- /dev/null
+++ b/softfloat/source/RISCV/s_propagateNaNExtF80UI.c
@@ -0,0 +1,73 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "primitiveTypes.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Interpreting the unsigned integer formed from concatenating `uiA64' and
+| `uiA0' as an 80-bit extended floating-point value, and likewise interpreting
+| the unsigned integer formed from concatenating `uiB64' and `uiB0' as another
+| 80-bit extended floating-point value, and assuming at least on of these
+| floating-point values is a NaN, returns the bit pattern of the combined NaN
+| result. If either original floating-point value is a signaling NaN, the
+| invalid exception is raised.
+*----------------------------------------------------------------------------*/
+struct uint128
+ softfloat_propagateNaNExtF80UI(
+ uint_fast16_t uiA64,
+ uint_fast64_t uiA0,
+ uint_fast16_t uiB64,
+ uint_fast64_t uiB0
+ )
+{
+ struct uint128 uiZ;
+
+ if (
+ softfloat_isSigNaNExtF80UI( uiA64, uiA0 )
+ || softfloat_isSigNaNExtF80UI( uiB64, uiB0 )
+ ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ uiZ.v64 = defaultNaNExtF80UI64;
+ uiZ.v0 = defaultNaNExtF80UI0;
+ return uiZ;
+
+}
+
diff --git a/softfloat/source/RISCV/s_propagateNaNF128M.c b/softfloat/source/RISCV/s_propagateNaNF128M.c
new file mode 100644
index 0000000..df76ab2
--- /dev/null
+++ b/softfloat/source/RISCV/s_propagateNaNF128M.c
@@ -0,0 +1,68 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2018 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "primitiveTypes.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Assuming at least one of the two 128-bit floating-point values pointed to by
+| 'aWPtr' and 'bWPtr' is a NaN, stores the combined NaN result at the location
+| pointed to by 'zWPtr'. If either original floating-point value is a
+| signaling NaN, the invalid exception is raised. Each of 'aWPtr', 'bWPtr',
+| and 'zWPtr' points to an array of four 32-bit elements that concatenate in
+| the platform's normal endian order to form a 128-bit floating-point value.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_propagateNaNF128M(
+ const uint32_t *aWPtr, const uint32_t *bWPtr, uint32_t *zWPtr )
+{
+
+ if (
+ f128M_isSignalingNaN( (const float128_t *) aWPtr )
+ || (bWPtr && f128M_isSignalingNaN( (const float128_t *) bWPtr ))
+ ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ zWPtr[indexWord( 4, 3 )] = defaultNaNF128UI96;
+ zWPtr[indexWord( 4, 2 )] = defaultNaNF128UI64;
+ zWPtr[indexWord( 4, 1 )] = defaultNaNF128UI32;
+ zWPtr[indexWord( 4, 0 )] = defaultNaNF128UI0;
+
+}
+
diff --git a/softfloat/source/RISCV/s_propagateNaNF128UI.c b/softfloat/source/RISCV/s_propagateNaNF128UI.c
new file mode 100644
index 0000000..49e2535
--- /dev/null
+++ b/softfloat/source/RISCV/s_propagateNaNF128UI.c
@@ -0,0 +1,73 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "primitiveTypes.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Interpreting the unsigned integer formed from concatenating `uiA64' and
+| `uiA0' as a 128-bit floating-point value, and likewise interpreting the
+| unsigned integer formed from concatenating `uiB64' and `uiB0' as another
+| 128-bit floating-point value, and assuming at least on of these floating-
+| point values is a NaN, returns the bit pattern of the combined NaN result.
+| If either original floating-point value is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+struct uint128
+ softfloat_propagateNaNF128UI(
+ uint_fast64_t uiA64,
+ uint_fast64_t uiA0,
+ uint_fast64_t uiB64,
+ uint_fast64_t uiB0
+ )
+{
+ struct uint128 uiZ;
+
+ if (
+ softfloat_isSigNaNF128UI( uiA64, uiA0 )
+ || softfloat_isSigNaNF128UI( uiB64, uiB0 )
+ ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ uiZ.v64 = defaultNaNF128UI64;
+ uiZ.v0 = defaultNaNF128UI0;
+ return uiZ;
+
+}
+
diff --git a/softfloat/source/RISCV/s_propagateNaNF16UI.c b/softfloat/source/RISCV/s_propagateNaNF16UI.c
new file mode 100644
index 0000000..228dcd8
--- /dev/null
+++ b/softfloat/source/RISCV/s_propagateNaNF16UI.c
@@ -0,0 +1,58 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Interpreting `uiA' and `uiB' as the bit patterns of two 16-bit floating-
+| point values, at least one of which is a NaN, returns the bit pattern of
+| the combined NaN result. If either `uiA' or `uiB' has the pattern of a
+| signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+uint_fast16_t
+ softfloat_propagateNaNF16UI( uint_fast16_t uiA, uint_fast16_t uiB )
+{
+
+ if ( softfloat_isSigNaNF16UI( uiA ) || softfloat_isSigNaNF16UI( uiB ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ return defaultNaNF16UI;
+
+}
+
diff --git a/softfloat/source/RISCV/s_propagateNaNF32UI.c b/softfloat/source/RISCV/s_propagateNaNF32UI.c
new file mode 100644
index 0000000..c6308cc
--- /dev/null
+++ b/softfloat/source/RISCV/s_propagateNaNF32UI.c
@@ -0,0 +1,58 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Interpreting `uiA' and `uiB' as the bit patterns of two 32-bit floating-
+| point values, at least one of which is a NaN, returns the bit pattern of
+| the combined NaN result. If either `uiA' or `uiB' has the pattern of a
+| signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+uint_fast32_t
+ softfloat_propagateNaNF32UI( uint_fast32_t uiA, uint_fast32_t uiB )
+{
+
+ if ( softfloat_isSigNaNF32UI( uiA ) || softfloat_isSigNaNF32UI( uiB ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ return defaultNaNF32UI;
+
+}
+
diff --git a/softfloat/source/RISCV/s_propagateNaNF64UI.c b/softfloat/source/RISCV/s_propagateNaNF64UI.c
new file mode 100644
index 0000000..2203665
--- /dev/null
+++ b/softfloat/source/RISCV/s_propagateNaNF64UI.c
@@ -0,0 +1,58 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Interpreting `uiA' and `uiB' as the bit patterns of two 64-bit floating-
+| point values, at least one of which is a NaN, returns the bit pattern of
+| the combined NaN result. If either `uiA' or `uiB' has the pattern of a
+| signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+uint_fast64_t
+ softfloat_propagateNaNF64UI( uint_fast64_t uiA, uint_fast64_t uiB )
+{
+
+ if ( softfloat_isSigNaNF64UI( uiA ) || softfloat_isSigNaNF64UI( uiB ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ return defaultNaNF64UI;
+
+}
+
diff --git a/softfloat/source/RISCV/softfloat_raiseFlags.c b/softfloat/source/RISCV/softfloat_raiseFlags.c
new file mode 100644
index 0000000..7a1aee9
--- /dev/null
+++ b/softfloat/source/RISCV/softfloat_raiseFlags.c
@@ -0,0 +1,52 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include "platform.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Raises the exceptions specified by `flags'. Floating-point traps can be
+| defined here if desired. It is currently not possible for such a trap
+| to substitute a result value. If traps are not implemented, this routine
+| should be simply `softfloat_exceptionFlags |= flags;'.
+*----------------------------------------------------------------------------*/
+void softfloat_raiseFlags( uint_fast8_t flags )
+{
+
+ softfloat_exceptionFlags |= flags;
+
+}
+
diff --git a/softfloat/source/RISCV/specialize.h b/softfloat/source/RISCV/specialize.h
new file mode 100644
index 0000000..c638264
--- /dev/null
+++ b/softfloat/source/RISCV/specialize.h
@@ -0,0 +1,407 @@
+
+/*============================================================================
+
+This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2018 The Regents of the
+University of California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#ifndef specialize_h
+#define specialize_h 1
+
+#include
+#include
+#include "primitiveTypes.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Default value for 'softfloat_detectTininess'.
+*----------------------------------------------------------------------------*/
+#define init_detectTininess softfloat_tininess_afterRounding
+
+/*----------------------------------------------------------------------------
+| The values to return on conversions to 32-bit integer formats that raise an
+| invalid exception.
+*----------------------------------------------------------------------------*/
+#define ui32_fromPosOverflow 0xFFFFFFFF
+#define ui32_fromNegOverflow 0
+#define ui32_fromNaN 0xFFFFFFFF
+#define i32_fromPosOverflow 0x7FFFFFFF
+#define i32_fromNegOverflow (-0x7FFFFFFF - 1)
+#define i32_fromNaN 0x7FFFFFFF
+
+/*----------------------------------------------------------------------------
+| The values to return on conversions to 64-bit integer formats that raise an
+| invalid exception.
+*----------------------------------------------------------------------------*/
+#define ui64_fromPosOverflow UINT64_C( 0xFFFFFFFFFFFFFFFF )
+#define ui64_fromNegOverflow 0
+#define ui64_fromNaN UINT64_C( 0xFFFFFFFFFFFFFFFF )
+#define i64_fromPosOverflow INT64_C( 0x7FFFFFFFFFFFFFFF )
+#define i64_fromNegOverflow (-INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1)
+#define i64_fromNaN INT64_C( 0x7FFFFFFFFFFFFFFF )
+
+/*----------------------------------------------------------------------------
+| "Common NaN" structure, used to transfer NaN representations from one format
+| to another.
+*----------------------------------------------------------------------------*/
+struct commonNaN { char _unused; };
+
+/*----------------------------------------------------------------------------
+| The bit pattern for a default generated 16-bit floating-point NaN.
+*----------------------------------------------------------------------------*/
+#define defaultNaNF16UI 0x7E00
+
+/*----------------------------------------------------------------------------
+| Returns true when 16-bit unsigned integer 'uiA' has the bit pattern of a
+| 16-bit floating-point signaling NaN.
+| Note: This macro evaluates its argument more than once.
+*----------------------------------------------------------------------------*/
+#define softfloat_isSigNaNF16UI( uiA ) ((((uiA) & 0x7E00) == 0x7C00) && ((uiA) & 0x01FF))
+
+/*----------------------------------------------------------------------------
+| Assuming 'uiA' has the bit pattern of a 16-bit floating-point NaN, converts
+| this NaN to the common NaN form, and stores the resulting common NaN at the
+| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+#define softfloat_f16UIToCommonNaN( uiA, zPtr ) if ( ! ((uiA) & 0x0200) ) softfloat_raiseFlags( softfloat_flag_invalid )
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into a 16-bit floating-point
+| NaN, and returns the bit pattern of this value as an unsigned integer.
+*----------------------------------------------------------------------------*/
+#define softfloat_commonNaNToF16UI( aPtr ) ((uint_fast16_t) defaultNaNF16UI)
+
+/*----------------------------------------------------------------------------
+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 16-bit floating-
+| point values, at least one of which is a NaN, returns the bit pattern of
+| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a
+| signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+uint_fast16_t
+ softfloat_propagateNaNF16UI( uint_fast16_t uiA, uint_fast16_t uiB );
+
+/*----------------------------------------------------------------------------
+| The bit pattern for a default generated 32-bit floating-point NaN.
+*----------------------------------------------------------------------------*/
+#define defaultNaNF32UI 0x7FC00000
+
+/*----------------------------------------------------------------------------
+| Returns true when 32-bit unsigned integer 'uiA' has the bit pattern of a
+| 32-bit floating-point signaling NaN.
+| Note: This macro evaluates its argument more than once.
+*----------------------------------------------------------------------------*/
+#define softfloat_isSigNaNF32UI( uiA ) ((((uiA) & 0x7FC00000) == 0x7F800000) && ((uiA) & 0x003FFFFF))
+
+/*----------------------------------------------------------------------------
+| Assuming 'uiA' has the bit pattern of a 32-bit floating-point NaN, converts
+| this NaN to the common NaN form, and stores the resulting common NaN at the
+| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+#define softfloat_f32UIToCommonNaN( uiA, zPtr ) if ( ! ((uiA) & 0x00400000) ) softfloat_raiseFlags( softfloat_flag_invalid )
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into a 32-bit floating-point
+| NaN, and returns the bit pattern of this value as an unsigned integer.
+*----------------------------------------------------------------------------*/
+#define softfloat_commonNaNToF32UI( aPtr ) ((uint_fast32_t) defaultNaNF32UI)
+
+/*----------------------------------------------------------------------------
+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 32-bit floating-
+| point values, at least one of which is a NaN, returns the bit pattern of
+| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a
+| signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+uint_fast32_t
+ softfloat_propagateNaNF32UI( uint_fast32_t uiA, uint_fast32_t uiB );
+
+/*----------------------------------------------------------------------------
+| The bit pattern for a default generated 64-bit floating-point NaN.
+*----------------------------------------------------------------------------*/
+#define defaultNaNF64UI UINT64_C( 0x7FF8000000000000 )
+
+/*----------------------------------------------------------------------------
+| Returns true when 64-bit unsigned integer 'uiA' has the bit pattern of a
+| 64-bit floating-point signaling NaN.
+| Note: This macro evaluates its argument more than once.
+*----------------------------------------------------------------------------*/
+#define softfloat_isSigNaNF64UI( uiA ) ((((uiA) & UINT64_C( 0x7FF8000000000000 )) == UINT64_C( 0x7FF0000000000000 )) && ((uiA) & UINT64_C( 0x0007FFFFFFFFFFFF )))
+
+/*----------------------------------------------------------------------------
+| Assuming 'uiA' has the bit pattern of a 64-bit floating-point NaN, converts
+| this NaN to the common NaN form, and stores the resulting common NaN at the
+| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+#define softfloat_f64UIToCommonNaN( uiA, zPtr ) if ( ! ((uiA) & UINT64_C( 0x0008000000000000 )) ) softfloat_raiseFlags( softfloat_flag_invalid )
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into a 64-bit floating-point
+| NaN, and returns the bit pattern of this value as an unsigned integer.
+*----------------------------------------------------------------------------*/
+#define softfloat_commonNaNToF64UI( aPtr ) ((uint_fast64_t) defaultNaNF64UI)
+
+/*----------------------------------------------------------------------------
+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 64-bit floating-
+| point values, at least one of which is a NaN, returns the bit pattern of
+| the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a
+| signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+uint_fast64_t
+ softfloat_propagateNaNF64UI( uint_fast64_t uiA, uint_fast64_t uiB );
+
+/*----------------------------------------------------------------------------
+| The bit pattern for a default generated 80-bit extended floating-point NaN.
+*----------------------------------------------------------------------------*/
+#define defaultNaNExtF80UI64 0x7FFF
+#define defaultNaNExtF80UI0 UINT64_C( 0xC000000000000000 )
+
+/*----------------------------------------------------------------------------
+| Returns true when the 80-bit unsigned integer formed from concatenating
+| 16-bit 'uiA64' and 64-bit 'uiA0' has the bit pattern of an 80-bit extended
+| floating-point signaling NaN.
+| Note: This macro evaluates its arguments more than once.
+*----------------------------------------------------------------------------*/
+#define softfloat_isSigNaNExtF80UI( uiA64, uiA0 ) ((((uiA64) & 0x7FFF) == 0x7FFF) && ! ((uiA0) & UINT64_C( 0x4000000000000000 )) && ((uiA0) & UINT64_C( 0x3FFFFFFFFFFFFFFF )))
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+/*----------------------------------------------------------------------------
+| The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is
+| defined.
+*----------------------------------------------------------------------------*/
+
+/*----------------------------------------------------------------------------
+| Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0'
+| has the bit pattern of an 80-bit extended floating-point NaN, converts
+| this NaN to the common NaN form, and stores the resulting common NaN at the
+| location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+#define softfloat_extF80UIToCommonNaN( uiA64, uiA0, zPtr ) if ( ! ((uiA0) & UINT64_C( 0x4000000000000000 )) ) softfloat_raiseFlags( softfloat_flag_invalid )
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended
+| floating-point NaN, and returns the bit pattern of this value as an unsigned
+| integer.
+*----------------------------------------------------------------------------*/
+#if defined INLINE && ! defined softfloat_commonNaNToExtF80UI
+INLINE
+struct uint128 softfloat_commonNaNToExtF80UI( const struct commonNaN *aPtr )
+{
+ struct uint128 uiZ;
+ uiZ.v64 = defaultNaNExtF80UI64;
+ uiZ.v0 = defaultNaNExtF80UI0;
+ return uiZ;
+}
+#else
+struct uint128 softfloat_commonNaNToExtF80UI( const struct commonNaN *aPtr );
+#endif
+
+/*----------------------------------------------------------------------------
+| Interpreting the unsigned integer formed from concatenating 'uiA64' and
+| 'uiA0' as an 80-bit extended floating-point value, and likewise interpreting
+| the unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another
+| 80-bit extended floating-point value, and assuming at least on of these
+| floating-point values is a NaN, returns the bit pattern of the combined NaN
+| result. If either original floating-point value is a signaling NaN, the
+| invalid exception is raised.
+*----------------------------------------------------------------------------*/
+struct uint128
+ softfloat_propagateNaNExtF80UI(
+ uint_fast16_t uiA64,
+ uint_fast64_t uiA0,
+ uint_fast16_t uiB64,
+ uint_fast64_t uiB0
+ );
+
+/*----------------------------------------------------------------------------
+| The bit pattern for a default generated 128-bit floating-point NaN.
+*----------------------------------------------------------------------------*/
+#define defaultNaNF128UI64 UINT64_C( 0x7FFF800000000000 )
+#define defaultNaNF128UI0 UINT64_C( 0 )
+
+/*----------------------------------------------------------------------------
+| Returns true when the 128-bit unsigned integer formed from concatenating
+| 64-bit 'uiA64' and 64-bit 'uiA0' has the bit pattern of a 128-bit floating-
+| point signaling NaN.
+| Note: This macro evaluates its arguments more than once.
+*----------------------------------------------------------------------------*/
+#define softfloat_isSigNaNF128UI( uiA64, uiA0 ) ((((uiA64) & UINT64_C( 0x7FFF800000000000 )) == UINT64_C( 0x7FFF000000000000 )) && ((uiA0) || ((uiA64) & UINT64_C( 0x00007FFFFFFFFFFF ))))
+
+/*----------------------------------------------------------------------------
+| Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0'
+| has the bit pattern of a 128-bit floating-point NaN, converts this NaN to
+| the common NaN form, and stores the resulting common NaN at the location
+| pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid exception
+| is raised.
+*----------------------------------------------------------------------------*/
+#define softfloat_f128UIToCommonNaN( uiA64, uiA0, zPtr ) if ( ! ((uiA64) & UINT64_C( 0x0000800000000000 )) ) softfloat_raiseFlags( softfloat_flag_invalid )
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point
+| NaN, and returns the bit pattern of this value as an unsigned integer.
+*----------------------------------------------------------------------------*/
+#if defined INLINE && ! defined softfloat_commonNaNToF128UI
+INLINE
+struct uint128 softfloat_commonNaNToF128UI( const struct commonNaN *aPtr )
+{
+ struct uint128 uiZ;
+ uiZ.v64 = defaultNaNF128UI64;
+ uiZ.v0 = defaultNaNF128UI0;
+ return uiZ;
+}
+#else
+struct uint128 softfloat_commonNaNToF128UI( const struct commonNaN * );
+#endif
+
+/*----------------------------------------------------------------------------
+| Interpreting the unsigned integer formed from concatenating 'uiA64' and
+| 'uiA0' as a 128-bit floating-point value, and likewise interpreting the
+| unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another
+| 128-bit floating-point value, and assuming at least on of these floating-
+| point values is a NaN, returns the bit pattern of the combined NaN result.
+| If either original floating-point value is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+struct uint128
+ softfloat_propagateNaNF128UI(
+ uint_fast64_t uiA64,
+ uint_fast64_t uiA0,
+ uint_fast64_t uiB64,
+ uint_fast64_t uiB0
+ );
+
+#else
+
+/*----------------------------------------------------------------------------
+| The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is not
+| defined.
+*----------------------------------------------------------------------------*/
+
+/*----------------------------------------------------------------------------
+| Assuming the 80-bit extended floating-point value pointed to by 'aSPtr' is
+| a NaN, converts this NaN to the common NaN form, and stores the resulting
+| common NaN at the location pointed to by 'zPtr'. If the NaN is a signaling
+| NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+#define softfloat_extF80MToCommonNaN( aSPtr, zPtr ) if ( ! ((aSPtr)->signif & UINT64_C( 0x4000000000000000 )) ) softfloat_raiseFlags( softfloat_flag_invalid )
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended
+| floating-point NaN, and stores this NaN at the location pointed to by
+| 'zSPtr'.
+*----------------------------------------------------------------------------*/
+#if defined INLINE && ! defined softfloat_commonNaNToExtF80M
+INLINE
+void
+ softfloat_commonNaNToExtF80M(
+ const struct commonNaN *aPtr, struct extFloat80M *zSPtr )
+{
+ zSPtr->signExp = defaultNaNExtF80UI64;
+ zSPtr->signif = defaultNaNExtF80UI0;
+}
+#else
+void
+ softfloat_commonNaNToExtF80M(
+ const struct commonNaN *aPtr, struct extFloat80M *zSPtr );
+#endif
+
+/*----------------------------------------------------------------------------
+| Assuming at least one of the two 80-bit extended floating-point values
+| pointed to by 'aSPtr' and 'bSPtr' is a NaN, stores the combined NaN result
+| at the location pointed to by 'zSPtr'. If either original floating-point
+| value is a signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_propagateNaNExtF80M(
+ const struct extFloat80M *aSPtr,
+ const struct extFloat80M *bSPtr,
+ struct extFloat80M *zSPtr
+ );
+
+/*----------------------------------------------------------------------------
+| The bit pattern for a default generated 128-bit floating-point NaN.
+*----------------------------------------------------------------------------*/
+#define defaultNaNF128UI96 0x7FFF8000
+#define defaultNaNF128UI64 0
+#define defaultNaNF128UI32 0
+#define defaultNaNF128UI0 0
+
+/*----------------------------------------------------------------------------
+| Assuming the 128-bit floating-point value pointed to by 'aWPtr' is a NaN,
+| converts this NaN to the common NaN form, and stores the resulting common
+| NaN at the location pointed to by 'zPtr'. If the NaN is a signaling NaN,
+| the invalid exception is raised. Argument 'aWPtr' points to an array of
+| four 32-bit elements that concatenate in the platform's normal endian order
+| to form a 128-bit floating-point value.
+*----------------------------------------------------------------------------*/
+#define softfloat_f128MToCommonNaN( aWPtr, zPtr ) if ( ! ((aWPtr)[indexWordHi( 4 )] & UINT64_C( 0x0000800000000000 )) ) softfloat_raiseFlags( softfloat_flag_invalid )
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point
+| NaN, and stores this NaN at the location pointed to by 'zWPtr'. Argument
+| 'zWPtr' points to an array of four 32-bit elements that concatenate in the
+| platform's normal endian order to form a 128-bit floating-point value.
+*----------------------------------------------------------------------------*/
+#if defined INLINE && ! defined softfloat_commonNaNToF128M
+INLINE
+void
+ softfloat_commonNaNToF128M( const struct commonNaN *aPtr, uint32_t *zWPtr )
+{
+ zWPtr[indexWord( 4, 3 )] = defaultNaNF128UI96;
+ zWPtr[indexWord( 4, 2 )] = defaultNaNF128UI64;
+ zWPtr[indexWord( 4, 1 )] = defaultNaNF128UI32;
+ zWPtr[indexWord( 4, 0 )] = defaultNaNF128UI0;
+}
+#else
+void
+ softfloat_commonNaNToF128M( const struct commonNaN *aPtr, uint32_t *zWPtr );
+#endif
+
+/*----------------------------------------------------------------------------
+| Assuming at least one of the two 128-bit floating-point values pointed to by
+| 'aWPtr' and 'bWPtr' is a NaN, stores the combined NaN result at the location
+| pointed to by 'zWPtr'. If either original floating-point value is a
+| signaling NaN, the invalid exception is raised. Each of 'aWPtr', 'bWPtr',
+| and 'zWPtr' points to an array of four 32-bit elements that concatenate in
+| the platform's normal endian order to form a 128-bit floating-point value.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_propagateNaNF128M(
+ const uint32_t *aWPtr, const uint32_t *bWPtr, uint32_t *zWPtr );
+
+#endif
+
+#endif
+
diff --git a/softfloat/source/extF80M_add.c b/softfloat/source/extF80M_add.c
new file mode 100644
index 0000000..4ba6a31
--- /dev/null
+++ b/softfloat/source/extF80M_add.c
@@ -0,0 +1,100 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "internals.h"
+#include "softfloat.h"
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+void
+ extF80M_add(
+ const extFloat80_t *aPtr, const extFloat80_t *bPtr, extFloat80_t *zPtr )
+{
+ const struct extFloat80M *aSPtr, *bSPtr;
+ uint_fast16_t uiA64;
+ uint_fast64_t uiA0;
+ bool signA;
+ uint_fast16_t uiB64;
+ uint_fast64_t uiB0;
+ bool signB;
+#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 2)
+ extFloat80_t
+ (*magsFuncPtr)(
+ uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool );
+#endif
+
+ aSPtr = (const struct extFloat80M *) aPtr;
+ bSPtr = (const struct extFloat80M *) bPtr;
+ uiA64 = aSPtr->signExp;
+ uiA0 = aSPtr->signif;
+ signA = signExtF80UI64( uiA64 );
+ uiB64 = bSPtr->signExp;
+ uiB0 = bSPtr->signif;
+ signB = signExtF80UI64( uiB64 );
+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)
+ if ( signA == signB ) {
+ *zPtr = softfloat_addMagsExtF80( uiA64, uiA0, uiB64, uiB0, signA );
+ } else {
+ *zPtr = softfloat_subMagsExtF80( uiA64, uiA0, uiB64, uiB0, signA );
+ }
+#else
+ magsFuncPtr =
+ (signA == signB) ? softfloat_addMagsExtF80 : softfloat_subMagsExtF80;
+ *zPtr = (*magsFuncPtr)( uiA64, uiA0, uiB64, uiB0, signA );
+#endif
+
+}
+
+#else
+
+void
+ extF80M_add(
+ const extFloat80_t *aPtr, const extFloat80_t *bPtr, extFloat80_t *zPtr )
+{
+
+ softfloat_addExtF80M(
+ (const struct extFloat80M *) aPtr,
+ (const struct extFloat80M *) bPtr,
+ (struct extFloat80M *) zPtr,
+ false
+ );
+
+}
+
+#endif
+
diff --git a/softfloat/source/extF80M_div.c b/softfloat/source/extF80M_div.c
new file mode 100644
index 0000000..24c069a
--- /dev/null
+++ b/softfloat/source/extF80M_div.c
@@ -0,0 +1,194 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+void
+ extF80M_div(
+ const extFloat80_t *aPtr, const extFloat80_t *bPtr, extFloat80_t *zPtr )
+{
+
+ *zPtr = extF80_div( *aPtr, *bPtr );
+
+}
+
+#else
+
+void
+ extF80M_div(
+ const extFloat80_t *aPtr, const extFloat80_t *bPtr, extFloat80_t *zPtr )
+{
+ const struct extFloat80M *aSPtr, *bSPtr;
+ struct extFloat80M *zSPtr;
+ uint_fast16_t uiA64;
+ int32_t expA;
+ uint_fast16_t uiB64;
+ int32_t expB;
+ bool signZ;
+ uint64_t sigA, x64;
+ int32_t expZ;
+ int shiftDist;
+ uint32_t y[3], recip32, sigB[3];
+ int ix;
+ uint32_t q, qs[2];
+ uint_fast16_t uiZ64;
+ uint64_t uiZ0;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ aSPtr = (const struct extFloat80M *) aPtr;
+ bSPtr = (const struct extFloat80M *) bPtr;
+ zSPtr = (struct extFloat80M *) zPtr;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uiA64 = aSPtr->signExp;
+ expA = expExtF80UI64( uiA64 );
+ uiB64 = bSPtr->signExp;
+ expB = expExtF80UI64( uiB64 );
+ signZ = signExtF80UI64( uiA64 ) ^ signExtF80UI64( uiB64 );
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( (expA == 0x7FFF) || (expB == 0x7FFF) ) {
+ if ( softfloat_tryPropagateNaNExtF80M( aSPtr, bSPtr, zSPtr ) ) return;
+ if ( expA == 0x7FFF ) {
+ if ( expB == 0x7FFF ) goto invalid;
+ goto infinity;
+ }
+ goto zero;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ sigA = aSPtr->signif;
+ x64 = bSPtr->signif;
+ if ( ! expB ) expB = 1;
+ if ( ! (x64 & UINT64_C( 0x8000000000000000 )) ) {
+ if ( ! x64 ) {
+ if ( ! sigA ) goto invalid;
+ softfloat_raiseFlags( softfloat_flag_infinite );
+ goto infinity;
+ }
+ expB += softfloat_normExtF80SigM( &x64 );
+ }
+ if ( ! expA ) expA = 1;
+ if ( ! (sigA & UINT64_C( 0x8000000000000000 )) ) {
+ if ( ! sigA ) goto zero;
+ expA += softfloat_normExtF80SigM( &sigA );
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ expZ = expA - expB + 0x3FFF;
+ shiftDist = 29;
+ if ( sigA < x64 ) {
+ --expZ;
+ shiftDist = 30;
+ }
+ softfloat_shortShiftLeft64To96M( sigA, shiftDist, y );
+ recip32 = softfloat_approxRecip32_1( x64>>32 );
+ sigB[indexWord( 3, 0 )] = (uint32_t) x64<<30;
+ x64 >>= 2;
+ sigB[indexWord( 3, 2 )] = x64>>32;
+ sigB[indexWord( 3, 1 )] = x64;
+ ix = 2;
+ for (;;) {
+ x64 = (uint64_t) y[indexWordHi( 3 )] * recip32;
+ q = (x64 + 0x80000000)>>32;
+ --ix;
+ if ( ix < 0 ) break;
+ softfloat_remStep96MBy32( y, 29, sigB, q, y );
+ if ( y[indexWordHi( 3 )] & 0x80000000 ) {
+ --q;
+ softfloat_add96M( y, sigB, y );
+ }
+ qs[ix] = q;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( ((q + 1) & 0x3FFFFF) < 2 ) {
+ softfloat_remStep96MBy32( y, 29, sigB, q, y );
+ if ( y[indexWordHi( 3 )] & 0x80000000 ) {
+ --q;
+ softfloat_add96M( y, sigB, y );
+ } else if ( softfloat_compare96M( sigB, y ) <= 0 ) {
+ ++q;
+ softfloat_sub96M( y, sigB, y );
+ }
+ if (
+ y[indexWordLo( 3 )] || y[indexWord( 3, 1 )] || y[indexWord( 3, 2 )]
+ ) {
+ q |= 1;
+ }
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ x64 = (uint64_t) q<<9;
+ y[indexWord( 3, 0 )] = x64;
+ x64 = ((uint64_t) qs[0]<<6) + (x64>>32);
+ y[indexWord( 3, 1 )] = x64;
+ y[indexWord( 3, 2 )] = (qs[1]<<3) + (x64>>32);
+ softfloat_roundPackMToExtF80M(
+ signZ, expZ, y, extF80_roundingPrecision, zSPtr );
+ return;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ invalid:
+ softfloat_invalidExtF80M( zSPtr );
+ return;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ infinity:
+ uiZ64 = packToExtF80UI64( signZ, 0x7FFF );
+ uiZ0 = UINT64_C( 0x8000000000000000 );
+ goto uiZ;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ zero:
+ uiZ64 = packToExtF80UI64( signZ, 0 );
+ uiZ0 = 0;
+ uiZ:
+ zSPtr->signExp = uiZ64;
+ zSPtr->signif = uiZ0;
+
+}
+
+#endif
+
diff --git a/softfloat/source/extF80M_eq.c b/softfloat/source/extF80M_eq.c
new file mode 100644
index 0000000..2480037
--- /dev/null
+++ b/softfloat/source/extF80M_eq.c
@@ -0,0 +1,98 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+bool extF80M_eq( const extFloat80_t *aPtr, const extFloat80_t *bPtr )
+{
+
+ return extF80_eq( *aPtr, *bPtr );
+
+}
+
+#else
+
+bool extF80M_eq( const extFloat80_t *aPtr, const extFloat80_t *bPtr )
+{
+ const struct extFloat80M *aSPtr, *bSPtr;
+ uint_fast16_t uiA64;
+ uint64_t uiA0;
+ uint_fast16_t uiB64;
+ uint64_t uiB0;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ aSPtr = (const struct extFloat80M *) aPtr;
+ bSPtr = (const struct extFloat80M *) bPtr;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uiA64 = aSPtr->signExp;
+ uiA0 = aSPtr->signif;
+ uiB64 = bSPtr->signExp;
+ uiB0 = bSPtr->signif;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) {
+ if (
+ softfloat_isSigNaNExtF80UI( uiA64, uiA0 )
+ || softfloat_isSigNaNExtF80UI( uiB64, uiB0 )
+ ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ return false;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( uiA0 == uiB0 ) {
+ return (uiA64 == uiB64) || ! uiA0;
+ } else {
+ if ( ! ((uiA0 & uiB0) & UINT64_C( 0x8000000000000000 )) ) {
+ return ! softfloat_compareNonnormExtF80M( aSPtr, bSPtr );
+ }
+ return false;
+ }
+
+}
+
+#endif
+
diff --git a/softfloat/source/extF80M_eq_signaling.c b/softfloat/source/extF80M_eq_signaling.c
new file mode 100644
index 0000000..785eba1
--- /dev/null
+++ b/softfloat/source/extF80M_eq_signaling.c
@@ -0,0 +1,92 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "softfloat.h"
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+bool extF80M_eq_signaling( const extFloat80_t *aPtr, const extFloat80_t *bPtr )
+{
+
+ return extF80_eq_signaling( *aPtr, *bPtr );
+
+}
+
+#else
+
+bool extF80M_eq_signaling( const extFloat80_t *aPtr, const extFloat80_t *bPtr )
+{
+ const struct extFloat80M *aSPtr, *bSPtr;
+ uint_fast16_t uiA64;
+ uint64_t uiA0;
+ uint_fast16_t uiB64;
+ uint64_t uiB0;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ aSPtr = (const struct extFloat80M *) aPtr;
+ bSPtr = (const struct extFloat80M *) bPtr;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uiA64 = aSPtr->signExp;
+ uiA0 = aSPtr->signif;
+ uiB64 = bSPtr->signExp;
+ uiB0 = bSPtr->signif;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ return false;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( uiA0 == uiB0 ) {
+ return (uiA64 == uiB64) || ! uiA0;
+ } else {
+ if ( ! ((uiA0 & uiB0) & UINT64_C( 0x8000000000000000 )) ) {
+ return ! softfloat_compareNonnormExtF80M( aSPtr, bSPtr );
+ }
+ return false;
+ }
+
+}
+
+#endif
+
diff --git a/softfloat/source/extF80M_le.c b/softfloat/source/extF80M_le.c
new file mode 100644
index 0000000..24edae8
--- /dev/null
+++ b/softfloat/source/extF80M_le.c
@@ -0,0 +1,106 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "softfloat.h"
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+bool extF80M_le( const extFloat80_t *aPtr, const extFloat80_t *bPtr )
+{
+
+ return extF80_le( *aPtr, *bPtr );
+
+}
+
+#else
+
+bool extF80M_le( const extFloat80_t *aPtr, const extFloat80_t *bPtr )
+{
+ const struct extFloat80M *aSPtr, *bSPtr;
+ uint_fast16_t uiA64;
+ uint64_t uiA0;
+ uint_fast16_t uiB64;
+ uint64_t uiB0;
+ bool signA, ltMags;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ aSPtr = (const struct extFloat80M *) aPtr;
+ bSPtr = (const struct extFloat80M *) bPtr;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uiA64 = aSPtr->signExp;
+ uiA0 = aSPtr->signif;
+ uiB64 = bSPtr->signExp;
+ uiB0 = bSPtr->signif;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ return false;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ signA = signExtF80UI64( uiA64 );
+ if ( (uiA64 ^ uiB64) & 0x8000 ) {
+ /*--------------------------------------------------------------------
+ | Signs are different.
+ *--------------------------------------------------------------------*/
+ return signA || ! (uiA0 | uiB0);
+ } else {
+ /*--------------------------------------------------------------------
+ | Signs are the same.
+ *--------------------------------------------------------------------*/
+ if ( ! ((uiA0 & uiB0) & UINT64_C( 0x8000000000000000 )) ) {
+ return (softfloat_compareNonnormExtF80M( aSPtr, bSPtr ) <= 0);
+ }
+ if ( uiA64 == uiB64 ) {
+ if ( uiA0 == uiB0 ) return true;
+ ltMags = (uiA0 < uiB0);
+ } else {
+ ltMags = (uiA64 < uiB64);
+ }
+ return signA ^ ltMags;
+ }
+
+}
+
+#endif
+
diff --git a/softfloat/source/extF80M_le_quiet.c b/softfloat/source/extF80M_le_quiet.c
new file mode 100644
index 0000000..3880e36
--- /dev/null
+++ b/softfloat/source/extF80M_le_quiet.c
@@ -0,0 +1,112 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+bool extF80M_le_quiet( const extFloat80_t *aPtr, const extFloat80_t *bPtr )
+{
+
+ return extF80_le_quiet( *aPtr, *bPtr );
+
+}
+
+#else
+
+bool extF80M_le_quiet( const extFloat80_t *aPtr, const extFloat80_t *bPtr )
+{
+ const struct extFloat80M *aSPtr, *bSPtr;
+ uint_fast16_t uiA64;
+ uint64_t uiA0;
+ uint_fast16_t uiB64;
+ uint64_t uiB0;
+ bool signA, ltMags;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ aSPtr = (const struct extFloat80M *) aPtr;
+ bSPtr = (const struct extFloat80M *) bPtr;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uiA64 = aSPtr->signExp;
+ uiA0 = aSPtr->signif;
+ uiB64 = bSPtr->signExp;
+ uiB0 = bSPtr->signif;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) {
+ if (
+ softfloat_isSigNaNExtF80UI( uiA64, uiA0 )
+ || softfloat_isSigNaNExtF80UI( uiB64, uiB0 )
+ ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ return false;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ signA = signExtF80UI64( uiA64 );
+ if ( (uiA64 ^ uiB64) & 0x8000 ) {
+ /*--------------------------------------------------------------------
+ | Signs are different.
+ *--------------------------------------------------------------------*/
+ return signA || ! (uiA0 | uiB0);
+ } else {
+ /*--------------------------------------------------------------------
+ | Signs are the same.
+ *--------------------------------------------------------------------*/
+ if ( ! ((uiA0 & uiB0) & UINT64_C( 0x8000000000000000 )) ) {
+ return (softfloat_compareNonnormExtF80M( aSPtr, bSPtr ) <= 0);
+ }
+ if ( uiA64 == uiB64 ) {
+ if ( uiA0 == uiB0 ) return true;
+ ltMags = (uiA0 < uiB0);
+ } else {
+ ltMags = (uiA64 < uiB64);
+ }
+ return signA ^ ltMags;
+ }
+
+}
+
+#endif
+
diff --git a/softfloat/source/extF80M_lt.c b/softfloat/source/extF80M_lt.c
new file mode 100644
index 0000000..70fa8f0
--- /dev/null
+++ b/softfloat/source/extF80M_lt.c
@@ -0,0 +1,106 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "softfloat.h"
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+bool extF80M_lt( const extFloat80_t *aPtr, const extFloat80_t *bPtr )
+{
+
+ return extF80_lt( *aPtr, *bPtr );
+
+}
+
+#else
+
+bool extF80M_lt( const extFloat80_t *aPtr, const extFloat80_t *bPtr )
+{
+ const struct extFloat80M *aSPtr, *bSPtr;
+ uint_fast16_t uiA64;
+ uint64_t uiA0;
+ uint_fast16_t uiB64;
+ uint64_t uiB0;
+ bool signA, ltMags;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ aSPtr = (const struct extFloat80M *) aPtr;
+ bSPtr = (const struct extFloat80M *) bPtr;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uiA64 = aSPtr->signExp;
+ uiA0 = aSPtr->signif;
+ uiB64 = bSPtr->signExp;
+ uiB0 = bSPtr->signif;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ return false;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ signA = signExtF80UI64( uiA64 );
+ if ( (uiA64 ^ uiB64) & 0x8000 ) {
+ /*--------------------------------------------------------------------
+ | Signs are different.
+ *--------------------------------------------------------------------*/
+ return signA && ((uiA0 | uiB0) != 0);
+ } else {
+ /*--------------------------------------------------------------------
+ | Signs are the same.
+ *--------------------------------------------------------------------*/
+ if ( ! ((uiA0 & uiB0) & UINT64_C( 0x8000000000000000 )) ) {
+ return (softfloat_compareNonnormExtF80M( aSPtr, bSPtr ) < 0);
+ }
+ if ( uiA64 == uiB64 ) {
+ if ( uiA0 == uiB0 ) return false;
+ ltMags = (uiA0 < uiB0);
+ } else {
+ ltMags = (uiA64 < uiB64);
+ }
+ return signA ^ ltMags;
+ }
+
+}
+
+#endif
+
diff --git a/softfloat/source/extF80M_lt_quiet.c b/softfloat/source/extF80M_lt_quiet.c
new file mode 100644
index 0000000..b119af3
--- /dev/null
+++ b/softfloat/source/extF80M_lt_quiet.c
@@ -0,0 +1,112 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+bool extF80M_lt_quiet( const extFloat80_t *aPtr, const extFloat80_t *bPtr )
+{
+
+ return extF80_lt_quiet( *aPtr, *bPtr );
+
+}
+
+#else
+
+bool extF80M_lt_quiet( const extFloat80_t *aPtr, const extFloat80_t *bPtr )
+{
+ const struct extFloat80M *aSPtr, *bSPtr;
+ uint_fast16_t uiA64;
+ uint64_t uiA0;
+ uint_fast16_t uiB64;
+ uint64_t uiB0;
+ bool signA, ltMags;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ aSPtr = (const struct extFloat80M *) aPtr;
+ bSPtr = (const struct extFloat80M *) bPtr;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uiA64 = aSPtr->signExp;
+ uiA0 = aSPtr->signif;
+ uiB64 = bSPtr->signExp;
+ uiB0 = bSPtr->signif;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) {
+ if (
+ softfloat_isSigNaNExtF80UI( uiA64, uiA0 )
+ || softfloat_isSigNaNExtF80UI( uiB64, uiB0 )
+ ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ return false;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ signA = signExtF80UI64( uiA64 );
+ if ( (uiA64 ^ uiB64) & 0x8000 ) {
+ /*--------------------------------------------------------------------
+ | Signs are different.
+ *--------------------------------------------------------------------*/
+ return signA && ((uiA0 | uiB0) != 0);
+ } else {
+ /*--------------------------------------------------------------------
+ | Signs are the same.
+ *--------------------------------------------------------------------*/
+ if ( ! ((uiA0 & uiB0) & UINT64_C( 0x8000000000000000 )) ) {
+ return (softfloat_compareNonnormExtF80M( aSPtr, bSPtr ) < 0);
+ }
+ if ( uiA64 == uiB64 ) {
+ if ( uiA0 == uiB0 ) return false;
+ ltMags = (uiA0 < uiB0);
+ } else {
+ ltMags = (uiA64 < uiB64);
+ }
+ return signA ^ ltMags;
+ }
+
+}
+
+#endif
+
diff --git a/softfloat/source/extF80M_mul.c b/softfloat/source/extF80M_mul.c
new file mode 100644
index 0000000..2734449
--- /dev/null
+++ b/softfloat/source/extF80M_mul.c
@@ -0,0 +1,139 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+void
+ extF80M_mul(
+ const extFloat80_t *aPtr, const extFloat80_t *bPtr, extFloat80_t *zPtr )
+{
+
+ *zPtr = extF80_mul( *aPtr, *bPtr );
+
+}
+
+#else
+
+void
+ extF80M_mul(
+ const extFloat80_t *aPtr, const extFloat80_t *bPtr, extFloat80_t *zPtr )
+{
+ const struct extFloat80M *aSPtr, *bSPtr;
+ struct extFloat80M *zSPtr;
+ uint_fast16_t uiA64;
+ int32_t expA;
+ uint_fast16_t uiB64;
+ int32_t expB;
+ bool signZ;
+ uint_fast16_t exp, uiZ64;
+ uint64_t uiZ0, sigA, sigB;
+ int32_t expZ;
+ uint32_t sigProd[4], *extSigZPtr;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ aSPtr = (const struct extFloat80M *) aPtr;
+ bSPtr = (const struct extFloat80M *) bPtr;
+ zSPtr = (struct extFloat80M *) zPtr;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uiA64 = aSPtr->signExp;
+ expA = expExtF80UI64( uiA64 );
+ uiB64 = bSPtr->signExp;
+ expB = expExtF80UI64( uiB64 );
+ signZ = signExtF80UI64( uiA64 ) ^ signExtF80UI64( uiB64 );
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( (expA == 0x7FFF) || (expB == 0x7FFF) ) {
+ if ( softfloat_tryPropagateNaNExtF80M( aSPtr, bSPtr, zSPtr ) ) return;
+ if (
+ (! aSPtr->signif && (expA != 0x7FFF))
+ || (! bSPtr->signif && (expB != 0x7FFF))
+ ) {
+ softfloat_invalidExtF80M( zSPtr );
+ return;
+ }
+ uiZ64 = packToExtF80UI64( signZ, 0x7FFF );
+ uiZ0 = UINT64_C( 0x8000000000000000 );
+ goto uiZ;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( ! expA ) expA = 1;
+ sigA = aSPtr->signif;
+ if ( ! (sigA & UINT64_C( 0x8000000000000000 )) ) {
+ if ( ! sigA ) goto zero;
+ expA += softfloat_normExtF80SigM( &sigA );
+ }
+ if ( ! expB ) expB = 1;
+ sigB = bSPtr->signif;
+ if ( ! (sigB & UINT64_C( 0x8000000000000000 )) ) {
+ if ( ! sigB ) goto zero;
+ expB += softfloat_normExtF80SigM( &sigB );
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ expZ = expA + expB - 0x3FFE;
+ softfloat_mul64To128M( sigA, sigB, sigProd );
+ if ( sigProd[indexWordLo( 4 )] ) sigProd[indexWord( 4, 1 )] |= 1;
+ extSigZPtr = &sigProd[indexMultiwordHi( 4, 3 )];
+ if ( sigProd[indexWordHi( 4 )] < 0x80000000 ) {
+ --expZ;
+ softfloat_add96M( extSigZPtr, extSigZPtr, extSigZPtr );
+ }
+ softfloat_roundPackMToExtF80M(
+ signZ, expZ, extSigZPtr, extF80_roundingPrecision, zSPtr );
+ return;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ zero:
+ uiZ64 = packToExtF80UI64( signZ, 0 );
+ uiZ0 = 0;
+ uiZ:
+ zSPtr->signExp = uiZ64;
+ zSPtr->signif = uiZ0;
+
+}
+
+#endif
+
diff --git a/softfloat/source/extF80M_rem.c b/softfloat/source/extF80M_rem.c
new file mode 100644
index 0000000..065e271
--- /dev/null
+++ b/softfloat/source/extF80M_rem.c
@@ -0,0 +1,204 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+void
+ extF80M_rem(
+ const extFloat80_t *aPtr, const extFloat80_t *bPtr, extFloat80_t *zPtr )
+{
+
+ *zPtr = extF80_rem( *aPtr, *bPtr );
+
+}
+
+#else
+
+void
+ extF80M_rem(
+ const extFloat80_t *aPtr, const extFloat80_t *bPtr, extFloat80_t *zPtr )
+{
+ const struct extFloat80M *aSPtr, *bSPtr;
+ struct extFloat80M *zSPtr;
+ uint_fast16_t uiA64;
+ int32_t expA, expB;
+ uint64_t x64;
+ bool signRem;
+ uint64_t sigA;
+ int32_t expDiff;
+ uint32_t rem[3], x[3], sig32B, q, recip32, rem2[3], *remPtr, *altRemPtr;
+ uint32_t *newRemPtr, wordMeanRem;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ aSPtr = (const struct extFloat80M *) aPtr;
+ bSPtr = (const struct extFloat80M *) bPtr;
+ zSPtr = (struct extFloat80M *) zPtr;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uiA64 = aSPtr->signExp;
+ expA = expExtF80UI64( uiA64 );
+ expB = expExtF80UI64( bSPtr->signExp );
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( (expA == 0x7FFF) || (expB == 0x7FFF) ) {
+ if ( softfloat_tryPropagateNaNExtF80M( aSPtr, bSPtr, zSPtr ) ) return;
+ if ( expA == 0x7FFF ) goto invalid;
+ /*--------------------------------------------------------------------
+ | If we get here, then argument b is an infinity and `expB' is 0x7FFF;
+ | Doubling `expB' is an easy way to ensure that `expDiff' later is
+ | less than -1, which will result in returning a canonicalized version
+ | of argument a.
+ *--------------------------------------------------------------------*/
+ expB += expB;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( ! expB ) expB = 1;
+ x64 = bSPtr->signif;
+ if ( ! (x64 & UINT64_C( 0x8000000000000000 )) ) {
+ if ( ! x64 ) goto invalid;
+ expB += softfloat_normExtF80SigM( &x64 );
+ }
+ signRem = signExtF80UI64( uiA64 );
+ if ( ! expA ) expA = 1;
+ sigA = aSPtr->signif;
+ if ( ! (sigA & UINT64_C( 0x8000000000000000 )) ) {
+ if ( ! sigA ) {
+ expA = 0;
+ goto copyA;
+ }
+ expA += softfloat_normExtF80SigM( &sigA );
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ expDiff = expA - expB;
+ if ( expDiff < -1 ) goto copyA;
+ rem[indexWord( 3, 2 )] = sigA>>34;
+ rem[indexWord( 3, 1 )] = sigA>>2;
+ rem[indexWord( 3, 0 )] = (uint32_t) sigA<<30;
+ x[indexWord( 3, 0 )] = (uint32_t) x64<<30;
+ sig32B = x64>>32;
+ x64 >>= 2;
+ x[indexWord( 3, 2 )] = x64>>32;
+ x[indexWord( 3, 1 )] = x64;
+ if ( expDiff < 1 ) {
+ if ( expDiff ) {
+ --expB;
+ softfloat_add96M( x, x, x );
+ q = 0;
+ } else {
+ q = (softfloat_compare96M( x, rem ) <= 0);
+ if ( q ) softfloat_sub96M( rem, x, rem );
+ }
+ } else {
+ recip32 = softfloat_approxRecip32_1( sig32B );
+ expDiff -= 30;
+ for (;;) {
+ x64 = (uint64_t) rem[indexWordHi( 3 )] * recip32;
+ if ( expDiff < 0 ) break;
+ q = (x64 + 0x80000000)>>32;
+ softfloat_remStep96MBy32( rem, 29, x, q, rem );
+ if ( rem[indexWordHi( 3 )] & 0x80000000 ) {
+ softfloat_add96M( rem, x, rem );
+ }
+ expDiff -= 29;
+ }
+ /*--------------------------------------------------------------------
+ | (`expDiff' cannot be less than -29 here.)
+ *--------------------------------------------------------------------*/
+ q = (uint32_t) (x64>>32)>>(~expDiff & 31);
+ softfloat_remStep96MBy32( rem, expDiff + 30, x, q, rem );
+ if ( rem[indexWordHi( 3 )] & 0x80000000 ) {
+ remPtr = rem;
+ altRemPtr = rem2;
+ softfloat_add96M( remPtr, x, altRemPtr );
+ goto selectRem;
+ }
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ remPtr = rem;
+ altRemPtr = rem2;
+ do {
+ ++q;
+ newRemPtr = altRemPtr;
+ softfloat_sub96M( remPtr, x, newRemPtr );
+ altRemPtr = remPtr;
+ remPtr = newRemPtr;
+ } while ( ! (remPtr[indexWordHi( 3 )] & 0x80000000) );
+ selectRem:
+ softfloat_add96M( remPtr, altRemPtr, x );
+ wordMeanRem = x[indexWordHi( 3 )];
+ if (
+ (wordMeanRem & 0x80000000)
+ || (! wordMeanRem && (q & 1) && ! x[indexWord( 3, 0 )]
+ && ! x[indexWord( 3, 1 )])
+ ) {
+ remPtr = altRemPtr;
+ }
+ if ( remPtr[indexWordHi( 3 )] & 0x80000000 ) {
+ signRem = ! signRem;
+ softfloat_negX96M( remPtr );
+ }
+ softfloat_normRoundPackMToExtF80M( signRem, expB + 2, remPtr, 80, zSPtr );
+ return;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ invalid:
+ softfloat_invalidExtF80M( zSPtr );
+ return;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ copyA:
+ if ( expA < 1 ) {
+ sigA >>= 1 - expA;
+ expA = 0;
+ }
+ zSPtr->signExp = packToExtF80UI64( signRem, expA );
+ zSPtr->signif = sigA;
+
+}
+
+#endif
+
diff --git a/softfloat/source/extF80M_roundToInt.c b/softfloat/source/extF80M_roundToInt.c
new file mode 100644
index 0000000..ff4ae87
--- /dev/null
+++ b/softfloat/source/extF80M_roundToInt.c
@@ -0,0 +1,176 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+void
+ extF80M_roundToInt(
+ const extFloat80_t *aPtr,
+ uint_fast8_t roundingMode,
+ bool exact,
+ extFloat80_t *zPtr
+ )
+{
+
+ *zPtr = extF80_roundToInt( *aPtr, roundingMode, exact );
+
+}
+
+#else
+
+void
+ extF80M_roundToInt(
+ const extFloat80_t *aPtr,
+ uint_fast8_t roundingMode,
+ bool exact,
+ extFloat80_t *zPtr
+ )
+{
+ const struct extFloat80M *aSPtr;
+ struct extFloat80M *zSPtr;
+ uint_fast16_t uiA64, signUI64;
+ int32_t exp;
+ uint64_t sigA;
+ uint_fast16_t uiZ64;
+ uint64_t sigZ, lastBitMask, roundBitsMask;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ aSPtr = (const struct extFloat80M *) aPtr;
+ zSPtr = (struct extFloat80M *) zPtr;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uiA64 = aSPtr->signExp;
+ signUI64 = uiA64 & packToExtF80UI64( 1, 0 );
+ exp = expExtF80UI64( uiA64 );
+ sigA = aSPtr->signif;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( !(sigA & UINT64_C( 0x8000000000000000 )) && (exp != 0x7FFF) ) {
+ if ( !sigA ) {
+ uiZ64 = signUI64;
+ sigZ = 0;
+ goto uiZ;
+ }
+ exp += softfloat_normExtF80SigM( &sigA );
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( exp <= 0x3FFE ) {
+ if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;
+ switch ( roundingMode ) {
+ case softfloat_round_near_even:
+ if ( !(sigA & UINT64_C( 0x7FFFFFFFFFFFFFFF )) ) break;
+ case softfloat_round_near_maxMag:
+ if ( exp == 0x3FFE ) goto mag1;
+ break;
+ case softfloat_round_min:
+ if ( signUI64 ) goto mag1;
+ break;
+ case softfloat_round_max:
+ if ( !signUI64 ) goto mag1;
+ break;
+#ifdef SOFTFLOAT_ROUND_ODD
+ case softfloat_round_odd:
+ goto mag1;
+#endif
+ }
+ uiZ64 = signUI64;
+ sigZ = 0;
+ goto uiZ;
+ mag1:
+ uiZ64 = signUI64 | 0x3FFF;
+ sigZ = UINT64_C( 0x8000000000000000 );
+ goto uiZ;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( 0x403E <= exp ) {
+ if ( exp == 0x7FFF ) {
+ if ( sigA & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) {
+ softfloat_propagateNaNExtF80M( aSPtr, 0, zSPtr );
+ return;
+ }
+ sigZ = UINT64_C( 0x8000000000000000 );
+ } else {
+ sigZ = sigA;
+ }
+ uiZ64 = signUI64 | exp;
+ goto uiZ;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uiZ64 = signUI64 | exp;
+ lastBitMask = (uint64_t) 1<<(0x403E - exp);
+ roundBitsMask = lastBitMask - 1;
+ sigZ = sigA;
+ if ( roundingMode == softfloat_round_near_maxMag ) {
+ sigZ += lastBitMask>>1;
+ } else if ( roundingMode == softfloat_round_near_even ) {
+ sigZ += lastBitMask>>1;
+ if ( !(sigZ & roundBitsMask) ) sigZ &= ~lastBitMask;
+ } else if (
+ roundingMode == (signUI64 ? softfloat_round_min : softfloat_round_max)
+ ) {
+ sigZ += roundBitsMask;
+ }
+ sigZ &= ~roundBitsMask;
+ if ( !sigZ ) {
+ ++uiZ64;
+ sigZ = UINT64_C( 0x8000000000000000 );
+ }
+ if ( sigZ != sigA ) {
+#ifdef SOFTFLOAT_ROUND_ODD
+ if ( roundingMode == softfloat_round_odd ) sigZ |= lastBitMask;
+#endif
+ if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;
+ }
+ uiZ:
+ zSPtr->signExp = uiZ64;
+ zSPtr->signif = sigZ;
+ return;
+
+}
+
+#endif
+
diff --git a/softfloat/source/extF80M_sqrt.c b/softfloat/source/extF80M_sqrt.c
new file mode 100644
index 0000000..21c15da
--- /dev/null
+++ b/softfloat/source/extF80M_sqrt.c
@@ -0,0 +1,180 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+void extF80M_sqrt( const extFloat80_t *aPtr, extFloat80_t *zPtr )
+{
+
+ *zPtr = extF80_sqrt( *aPtr );
+
+}
+
+#else
+
+void extF80M_sqrt( const extFloat80_t *aPtr, extFloat80_t *zPtr )
+{
+ const struct extFloat80M *aSPtr;
+ struct extFloat80M *zSPtr;
+ uint_fast16_t uiA64, signUI64;
+ int32_t expA;
+ uint64_t rem64;
+ int32_t expZ;
+ uint32_t rem96[3], sig32A, recipSqrt32, sig32Z, q;
+ uint64_t sig64Z, x64;
+ uint32_t rem32, term[4], rem[4], extSigZ[3];
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ aSPtr = (const struct extFloat80M *) aPtr;
+ zSPtr = (struct extFloat80M *) zPtr;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uiA64 = aSPtr->signExp;
+ signUI64 = uiA64 & packToExtF80UI64( 1, 0 );
+ expA = expExtF80UI64( uiA64 );
+ rem64 = aSPtr->signif;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( expA == 0x7FFF ) {
+ if ( rem64 & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) {
+ softfloat_propagateNaNExtF80M( aSPtr, 0, zSPtr );
+ return;
+ }
+ if ( signUI64 ) goto invalid;
+ rem64 = UINT64_C( 0x8000000000000000 );
+ goto copyA;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( ! expA ) expA = 1;
+ if ( ! (rem64 & UINT64_C( 0x8000000000000000 )) ) {
+ if ( ! rem64 ) {
+ uiA64 = signUI64;
+ goto copyA;
+ }
+ expA += softfloat_normExtF80SigM( &rem64 );
+ }
+ if ( signUI64 ) goto invalid;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ expZ = ((expA - 0x3FFF)>>1) + 0x3FFF;
+ expA &= 1;
+ softfloat_shortShiftLeft64To96M( rem64, 30 - expA, rem96 );
+ sig32A = rem64>>32;
+ recipSqrt32 = softfloat_approxRecipSqrt32_1( expA, sig32A );
+ sig32Z = ((uint64_t) sig32A * recipSqrt32)>>32;
+ if ( expA ) sig32Z >>= 1;
+ rem64 =
+ ((uint64_t) rem96[indexWord( 3, 2 )]<<32 | rem96[indexWord( 3, 1 )])
+ - (uint64_t) sig32Z * sig32Z;
+ rem96[indexWord( 3, 2 )] = rem64>>32;
+ rem96[indexWord( 3, 1 )] = rem64;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ q = ((uint32_t) (rem64>>2) * (uint64_t) recipSqrt32)>>32;
+ sig64Z = ((uint64_t) sig32Z<<32) + ((uint64_t) q<<3);
+ term[indexWord( 3, 2 )] = 0;
+ /*------------------------------------------------------------------------
+ | (Repeating this loop is a rare occurrence.)
+ *------------------------------------------------------------------------*/
+ for (;;) {
+ x64 = ((uint64_t) sig32Z<<32) + sig64Z;
+ term[indexWord( 3, 1 )] = x64>>32;
+ term[indexWord( 3, 0 )] = x64;
+ softfloat_remStep96MBy32(
+ rem96, 29, term, q, &rem[indexMultiwordHi( 4, 3 )] );
+ rem32 = rem[indexWord( 4, 3 )];
+ if ( ! (rem32 & 0x80000000) ) break;
+ --q;
+ sig64Z -= 1<<3;
+ }
+ rem64 = (uint64_t) rem32<<32 | rem[indexWord( 4, 2 )];
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ q = (((uint32_t) (rem64>>2) * (uint64_t) recipSqrt32)>>32) + 2;
+ if ( rem64>>34 ) q += recipSqrt32;
+ x64 = (uint64_t) q<<7;
+ extSigZ[indexWord( 3, 0 )] = x64;
+ x64 = (sig64Z<<1) + (x64>>32);
+ extSigZ[indexWord( 3, 2 )] = x64>>32;
+ extSigZ[indexWord( 3, 1 )] = x64;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( (q & 0xFFFFFF) <= 2 ) {
+ q &= ~(uint32_t) 0xFFFF;
+ extSigZ[indexWordLo( 3 )] = q<<7;
+ x64 = sig64Z + (q>>27);
+ term[indexWord( 4, 3 )] = 0;
+ term[indexWord( 4, 2 )] = x64>>32;
+ term[indexWord( 4, 1 )] = x64;
+ term[indexWord( 4, 0 )] = q<<5;
+ rem[indexWord( 4, 0 )] = 0;
+ softfloat_remStep128MBy32( rem, 28, term, q, rem );
+ q = rem[indexWordHi( 4 )];
+ if ( q & 0x80000000 ) {
+ softfloat_sub1X96M( extSigZ );
+ } else {
+ if ( q || rem[indexWord( 4, 1 )] || rem[indexWord( 4, 2 )] ) {
+ extSigZ[indexWordLo( 3 )] |= 1;
+ }
+ }
+ }
+ softfloat_roundPackMToExtF80M(
+ 0, expZ, extSigZ, extF80_roundingPrecision, zSPtr );
+ return;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ invalid:
+ softfloat_invalidExtF80M( zSPtr );
+ return;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ copyA:
+ zSPtr->signExp = uiA64;
+ zSPtr->signif = rem64;
+
+}
+
+#endif
+
diff --git a/softfloat/source/extF80M_sub.c b/softfloat/source/extF80M_sub.c
new file mode 100644
index 0000000..4f9f1a6
--- /dev/null
+++ b/softfloat/source/extF80M_sub.c
@@ -0,0 +1,100 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "internals.h"
+#include "softfloat.h"
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+void
+ extF80M_sub(
+ const extFloat80_t *aPtr, const extFloat80_t *bPtr, extFloat80_t *zPtr )
+{
+ const struct extFloat80M *aSPtr, *bSPtr;
+ uint_fast16_t uiA64;
+ uint_fast64_t uiA0;
+ bool signA;
+ uint_fast16_t uiB64;
+ uint_fast64_t uiB0;
+ bool signB;
+#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 2)
+ extFloat80_t
+ (*magsFuncPtr)(
+ uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool );
+#endif
+
+ aSPtr = (const struct extFloat80M *) aPtr;
+ bSPtr = (const struct extFloat80M *) bPtr;
+ uiA64 = aSPtr->signExp;
+ uiA0 = aSPtr->signif;
+ signA = signExtF80UI64( uiA64 );
+ uiB64 = bSPtr->signExp;
+ uiB0 = bSPtr->signif;
+ signB = signExtF80UI64( uiB64 );
+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)
+ if ( signA == signB ) {
+ *zPtr = softfloat_subMagsExtF80( uiA64, uiA0, uiB64, uiB0, signA );
+ } else {
+ *zPtr = softfloat_addMagsExtF80( uiA64, uiA0, uiB64, uiB0, signA );
+ }
+#else
+ magsFuncPtr =
+ (signA == signB) ? softfloat_subMagsExtF80 : softfloat_addMagsExtF80;
+ *zPtr = (*magsFuncPtr)( uiA64, uiA0, uiB64, uiB0, signA );
+#endif
+
+}
+
+#else
+
+void
+ extF80M_sub(
+ const extFloat80_t *aPtr, const extFloat80_t *bPtr, extFloat80_t *zPtr )
+{
+
+ softfloat_addExtF80M(
+ (const struct extFloat80M *) aPtr,
+ (const struct extFloat80M *) bPtr,
+ (struct extFloat80M *) zPtr,
+ true
+ );
+
+}
+
+#endif
+
diff --git a/softfloat/source/extF80M_to_f128M.c b/softfloat/source/extF80M_to_f128M.c
new file mode 100644
index 0000000..c0306af
--- /dev/null
+++ b/softfloat/source/extF80M_to_f128M.c
@@ -0,0 +1,125 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+void extF80M_to_f128M( const extFloat80_t *aPtr, float128_t *zPtr )
+{
+
+ *zPtr = extF80_to_f128( *aPtr );
+
+}
+
+#else
+
+void extF80M_to_f128M( const extFloat80_t *aPtr, float128_t *zPtr )
+{
+ const struct extFloat80M *aSPtr;
+ uint32_t *zWPtr;
+ uint_fast16_t uiA64;
+ bool sign;
+ int32_t exp;
+ uint64_t sig;
+ struct commonNaN commonNaN;
+ uint32_t uiZ96;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ aSPtr = (const struct extFloat80M *) aPtr;
+ zWPtr = (uint32_t *) zPtr;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uiA64 = aSPtr->signExp;
+ sign = signExtF80UI64( uiA64 );
+ exp = expExtF80UI64( uiA64 );
+ sig = aSPtr->signif;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ zWPtr[indexWord( 4, 0 )] = 0;
+ if ( exp == 0x7FFF ) {
+ if ( sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) {
+ softfloat_extF80MToCommonNaN( aSPtr, &commonNaN );
+ softfloat_commonNaNToF128M( &commonNaN, zWPtr );
+ return;
+ }
+ uiZ96 = packToF128UI96( sign, 0x7FFF, 0 );
+ goto uiZ;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( exp ) --exp;
+ if ( ! (sig & UINT64_C( 0x8000000000000000 )) ) {
+ if ( ! sig ) {
+ uiZ96 = packToF128UI96( sign, 0, 0 );
+ goto uiZ;
+ }
+ exp += softfloat_normExtF80SigM( &sig );
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ zWPtr[indexWord( 4, 1 )] = (uint32_t) sig<<17;
+ sig >>= 15;
+ zWPtr[indexWord( 4, 2 )] = sig;
+ if ( exp < 0 ) {
+ zWPtr[indexWordHi( 4 )] = sig>>32;
+ softfloat_shiftRight96M(
+ &zWPtr[indexMultiwordHi( 4, 3 )],
+ -exp,
+ &zWPtr[indexMultiwordHi( 4, 3 )]
+ );
+ exp = 0;
+ sig = (uint64_t) zWPtr[indexWordHi( 4 )]<<32;
+ }
+ zWPtr[indexWordHi( 4 )] = packToF128UI96( sign, exp, sig>>32 );
+ return;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uiZ:
+ zWPtr[indexWord( 4, 3 )] = uiZ96;
+ zWPtr[indexWord( 4, 2 )] = 0;
+ zWPtr[indexWord( 4, 1 )] = 0;
+
+}
+
+#endif
+
diff --git a/softfloat/source/extF80M_to_f16.c b/softfloat/source/extF80M_to_f16.c
new file mode 100644
index 0000000..7ff56de
--- /dev/null
+++ b/softfloat/source/extF80M_to_f16.c
@@ -0,0 +1,112 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+float16_t extF80M_to_f16( const extFloat80_t *aPtr )
+{
+
+ return extF80_to_f16( *aPtr );
+
+}
+
+#else
+
+float16_t extF80M_to_f16( const extFloat80_t *aPtr )
+{
+ const struct extFloat80M *aSPtr;
+ uint_fast16_t uiA64;
+ bool sign;
+ int32_t exp;
+ uint64_t sig;
+ struct commonNaN commonNaN;
+ uint16_t uiZ, sig16;
+ union ui16_f16 uZ;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ aSPtr = (const struct extFloat80M *) aPtr;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uiA64 = aSPtr->signExp;
+ sign = signExtF80UI64( uiA64 );
+ exp = expExtF80UI64( uiA64 );
+ sig = aSPtr->signif;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( exp == 0x7FFF ) {
+ if ( sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) {
+ softfloat_extF80MToCommonNaN( aSPtr, &commonNaN );
+ uiZ = softfloat_commonNaNToF16UI( &commonNaN );
+ } else {
+ uiZ = packToF16UI( sign, 0x1F, 0 );
+ }
+ goto uiZ;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( ! (sig & UINT64_C( 0x8000000000000000 )) ) {
+ if ( ! sig ) {
+ uiZ = packToF16UI( sign, 0, 0 );
+ goto uiZ;
+ }
+ exp += softfloat_normExtF80SigM( &sig );
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ sig16 = softfloat_shortShiftRightJam64( sig, 49 );
+ exp -= 0x3FF1;
+ if ( sizeof (int_fast16_t) < sizeof (int32_t) ) {
+ if ( exp < -0x40 ) exp = -0x40;
+ }
+ return softfloat_roundPackToF16( sign, exp, sig16 );
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uiZ:
+ uZ.ui = uiZ;
+ return uZ.f;
+
+}
+
+#endif
+
diff --git a/softfloat/source/extF80M_to_f32.c b/softfloat/source/extF80M_to_f32.c
new file mode 100644
index 0000000..bb1166f
--- /dev/null
+++ b/softfloat/source/extF80M_to_f32.c
@@ -0,0 +1,112 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+float32_t extF80M_to_f32( const extFloat80_t *aPtr )
+{
+
+ return extF80_to_f32( *aPtr );
+
+}
+
+#else
+
+float32_t extF80M_to_f32( const extFloat80_t *aPtr )
+{
+ const struct extFloat80M *aSPtr;
+ uint_fast16_t uiA64;
+ bool sign;
+ int32_t exp;
+ uint64_t sig;
+ struct commonNaN commonNaN;
+ uint32_t uiZ, sig32;
+ union ui32_f32 uZ;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ aSPtr = (const struct extFloat80M *) aPtr;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uiA64 = aSPtr->signExp;
+ sign = signExtF80UI64( uiA64 );
+ exp = expExtF80UI64( uiA64 );
+ sig = aSPtr->signif;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( exp == 0x7FFF ) {
+ if ( sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) {
+ softfloat_extF80MToCommonNaN( aSPtr, &commonNaN );
+ uiZ = softfloat_commonNaNToF32UI( &commonNaN );
+ } else {
+ uiZ = packToF32UI( sign, 0xFF, 0 );
+ }
+ goto uiZ;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( ! (sig & UINT64_C( 0x8000000000000000 )) ) {
+ if ( ! sig ) {
+ uiZ = packToF32UI( sign, 0, 0 );
+ goto uiZ;
+ }
+ exp += softfloat_normExtF80SigM( &sig );
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ sig32 = softfloat_shortShiftRightJam64( sig, 33 );
+ exp -= 0x3F81;
+ if ( sizeof (int_fast16_t) < sizeof (int32_t) ) {
+ if ( exp < -0x1000 ) exp = -0x1000;
+ }
+ return softfloat_roundPackToF32( sign, exp, sig32 );
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uiZ:
+ uZ.ui = uiZ;
+ return uZ.f;
+
+}
+
+#endif
+
diff --git a/softfloat/source/extF80M_to_f64.c b/softfloat/source/extF80M_to_f64.c
new file mode 100644
index 0000000..696255f
--- /dev/null
+++ b/softfloat/source/extF80M_to_f64.c
@@ -0,0 +1,112 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+float64_t extF80M_to_f64( const extFloat80_t *aPtr )
+{
+
+ return extF80_to_f64( *aPtr );
+
+}
+
+#else
+
+float64_t extF80M_to_f64( const extFloat80_t *aPtr )
+{
+ const struct extFloat80M *aSPtr;
+ uint_fast16_t uiA64;
+ bool sign;
+ int32_t exp;
+ uint64_t sig;
+ struct commonNaN commonNaN;
+ uint64_t uiZ;
+ union ui64_f64 uZ;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ aSPtr = (const struct extFloat80M *) aPtr;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uiA64 = aSPtr->signExp;
+ sign = signExtF80UI64( uiA64 );
+ exp = expExtF80UI64( uiA64 );
+ sig = aSPtr->signif;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( exp == 0x7FFF ) {
+ if ( sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) {
+ softfloat_extF80MToCommonNaN( aSPtr, &commonNaN );
+ uiZ = softfloat_commonNaNToF64UI( &commonNaN );
+ } else {
+ uiZ = packToF64UI( sign, 0x7FF, 0 );
+ }
+ goto uiZ;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( ! (sig & UINT64_C( 0x8000000000000000 )) ) {
+ if ( ! sig ) {
+ uiZ = packToF64UI( sign, 0, 0 );
+ goto uiZ;
+ }
+ exp += softfloat_normExtF80SigM( &sig );
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ sig = softfloat_shortShiftRightJam64( sig, 1 );
+ exp -= 0x3C01;
+ if ( sizeof (int_fast16_t) < sizeof (int32_t) ) {
+ if ( exp < -0x1000 ) exp = -0x1000;
+ }
+ return softfloat_roundPackToF64( sign, exp, sig );
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uiZ:
+ uZ.ui = uiZ;
+ return uZ.f;
+
+}
+
+#endif
+
diff --git a/softfloat/source/extF80M_to_i32.c b/softfloat/source/extF80M_to_i32.c
new file mode 100644
index 0000000..c0464b1
--- /dev/null
+++ b/softfloat/source/extF80M_to_i32.c
@@ -0,0 +1,100 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the
+University of California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+int_fast32_t
+ extF80M_to_i32(
+ const extFloat80_t *aPtr, uint_fast8_t roundingMode, bool exact )
+{
+
+ return extF80_to_i32( *aPtr, roundingMode, exact );
+
+}
+
+#else
+
+int_fast32_t
+ extF80M_to_i32(
+ const extFloat80_t *aPtr, uint_fast8_t roundingMode, bool exact )
+{
+ const struct extFloat80M *aSPtr;
+ uint_fast16_t uiA64;
+ bool sign;
+ int32_t exp;
+ uint64_t sig;
+ int32_t shiftDist;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ aSPtr = (const struct extFloat80M *) aPtr;
+ uiA64 = aSPtr->signExp;
+ sign = signExtF80UI64( uiA64 );
+ exp = expExtF80UI64( uiA64 );
+ sig = aSPtr->signif;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ shiftDist = 0x4032 - exp;
+ if ( shiftDist <= 0 ) {
+ if ( sig>>32 ) goto invalid;
+ if ( -32 < shiftDist ) {
+ sig <<= -shiftDist;
+ } else {
+ if ( (uint32_t) sig ) goto invalid;
+ }
+ } else {
+ sig = softfloat_shiftRightJam64( sig, shiftDist );
+ }
+ return softfloat_roundToI32( sign, sig, roundingMode, exact );
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ invalid:
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ return
+ (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF )) ? i32_fromNaN
+ : sign ? i32_fromNegOverflow : i32_fromPosOverflow;
+
+}
+
+#endif
+
diff --git a/softfloat/source/extF80M_to_i32_r_minMag.c b/softfloat/source/extF80M_to_i32_r_minMag.c
new file mode 100644
index 0000000..9a803cc
--- /dev/null
+++ b/softfloat/source/extF80M_to_i32_r_minMag.c
@@ -0,0 +1,120 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+int_fast32_t extF80M_to_i32_r_minMag( const extFloat80_t *aPtr, bool exact )
+{
+
+ return extF80_to_i32_r_minMag( *aPtr, exact );
+
+}
+
+#else
+
+int_fast32_t extF80M_to_i32_r_minMag( const extFloat80_t *aPtr, bool exact )
+{
+ const struct extFloat80M *aSPtr;
+ uint_fast16_t uiA64;
+ int32_t exp;
+ uint64_t sig;
+ int32_t shiftDist;
+ bool sign, raiseInexact;
+ int32_t z;
+ uint64_t shiftedSig;
+ uint32_t absZ;
+ union { uint32_t ui; int32_t i; } u;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ aSPtr = (const struct extFloat80M *) aPtr;
+ uiA64 = aSPtr->signExp;
+ exp = expExtF80UI64( uiA64 );
+ sig = aSPtr->signif;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( ! sig && (exp != 0x7FFF) ) return 0;
+ shiftDist = 0x403E - exp;
+ if ( 64 <= shiftDist ) {
+ raiseInexact = exact;
+ z = 0;
+ } else {
+ sign = signExtF80UI64( uiA64 );
+ raiseInexact = false;
+ if ( shiftDist < 0 ) {
+ if ( sig>>32 || (shiftDist <= -31) ) goto invalid;
+ shiftedSig = (uint64_t) (uint32_t) sig<<-shiftDist;
+ if ( shiftedSig>>32 ) goto invalid;
+ absZ = shiftedSig;
+ } else {
+ shiftedSig = sig;
+ if ( shiftDist ) shiftedSig >>= shiftDist;
+ if ( shiftedSig>>32 ) goto invalid;
+ absZ = shiftedSig;
+ if ( exact && shiftDist ) {
+ raiseInexact = ((uint64_t) absZ<
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+int_fast64_t
+ extF80M_to_i64(
+ const extFloat80_t *aPtr, uint_fast8_t roundingMode, bool exact )
+{
+
+ return extF80_to_i64( *aPtr, roundingMode, exact );
+
+}
+
+#else
+
+int_fast64_t
+ extF80M_to_i64(
+ const extFloat80_t *aPtr, uint_fast8_t roundingMode, bool exact )
+{
+ const struct extFloat80M *aSPtr;
+ uint_fast16_t uiA64;
+ bool sign;
+ int32_t exp;
+ uint64_t sig;
+ int32_t shiftDist;
+ uint32_t extSig[3];
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ aSPtr = (const struct extFloat80M *) aPtr;
+ uiA64 = aSPtr->signExp;
+ sign = signExtF80UI64( uiA64 );
+ exp = expExtF80UI64( uiA64 );
+ sig = aSPtr->signif;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ shiftDist = 0x403E - exp;
+ if ( shiftDist < 0 ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ return
+ (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ))
+ ? i64_fromNaN
+ : sign ? i64_fromNegOverflow : i64_fromPosOverflow;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ extSig[indexWord( 3, 2 )] = sig>>32;
+ extSig[indexWord( 3, 1 )] = sig;
+ extSig[indexWord( 3, 0 )] = 0;
+ if ( shiftDist ) softfloat_shiftRightJam96M( extSig, shiftDist, extSig );
+ return softfloat_roundMToI64( sign, extSig, roundingMode, exact );
+
+}
+
+#endif
+
diff --git a/softfloat/source/extF80M_to_i64_r_minMag.c b/softfloat/source/extF80M_to_i64_r_minMag.c
new file mode 100644
index 0000000..07282cd
--- /dev/null
+++ b/softfloat/source/extF80M_to_i64_r_minMag.c
@@ -0,0 +1,115 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+int_fast64_t extF80M_to_i64_r_minMag( const extFloat80_t *aPtr, bool exact )
+{
+
+ return extF80_to_i64_r_minMag( *aPtr, exact );
+
+}
+
+#else
+
+int_fast64_t extF80M_to_i64_r_minMag( const extFloat80_t *aPtr, bool exact )
+{
+ const struct extFloat80M *aSPtr;
+ uint_fast16_t uiA64;
+ int32_t exp;
+ uint64_t sig;
+ int32_t shiftDist;
+ bool sign, raiseInexact;
+ int64_t z;
+ uint64_t absZ;
+ union { uint64_t ui; int64_t i; } u;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ aSPtr = (const struct extFloat80M *) aPtr;
+ uiA64 = aSPtr->signExp;
+ exp = expExtF80UI64( uiA64 );
+ sig = aSPtr->signif;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( ! sig && (exp != 0x7FFF) ) return 0;
+ shiftDist = 0x403E - exp;
+ if ( 64 <= shiftDist ) {
+ raiseInexact = exact;
+ z = 0;
+ } else {
+ sign = signExtF80UI64( uiA64 );
+ raiseInexact = false;
+ if ( shiftDist < 0 ) {
+ if ( shiftDist <= -63 ) goto invalid;
+ shiftDist = -shiftDist;
+ absZ = sig<>shiftDist != sig ) goto invalid;
+ } else {
+ absZ = sig;
+ if ( shiftDist ) absZ >>= shiftDist;
+ if ( exact && shiftDist ) raiseInexact = (absZ<
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+uint_fast32_t
+ extF80M_to_ui32(
+ const extFloat80_t *aPtr, uint_fast8_t roundingMode, bool exact )
+{
+
+ return extF80_to_ui32( *aPtr, roundingMode, exact );
+
+}
+
+#else
+
+uint_fast32_t
+ extF80M_to_ui32(
+ const extFloat80_t *aPtr, uint_fast8_t roundingMode, bool exact )
+{
+ const struct extFloat80M *aSPtr;
+ uint_fast16_t uiA64;
+ bool sign;
+ int32_t exp;
+ uint64_t sig;
+ int32_t shiftDist;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ aSPtr = (const struct extFloat80M *) aPtr;
+ uiA64 = aSPtr->signExp;
+ sign = signExtF80UI64( uiA64 );
+ exp = expExtF80UI64( uiA64 );
+ sig = aSPtr->signif;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ shiftDist = 0x4032 - exp;
+ if ( shiftDist <= 0 ) {
+ if ( sig>>32 ) goto invalid;
+ if ( -32 < shiftDist ) {
+ sig <<= -shiftDist;
+ } else {
+ if ( (uint32_t) sig ) goto invalid;
+ }
+ } else {
+ sig = softfloat_shiftRightJam64( sig, shiftDist );
+ }
+ return softfloat_roundToUI32( sign, sig, roundingMode, exact );
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ invalid:
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ return
+ (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ))
+ ? ui32_fromNaN
+ : sign ? ui32_fromNegOverflow : ui32_fromPosOverflow;
+
+}
+
+#endif
+
diff --git a/softfloat/source/extF80M_to_ui32_r_minMag.c b/softfloat/source/extF80M_to_ui32_r_minMag.c
new file mode 100644
index 0000000..c09e483
--- /dev/null
+++ b/softfloat/source/extF80M_to_ui32_r_minMag.c
@@ -0,0 +1,111 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+uint_fast32_t extF80M_to_ui32_r_minMag( const extFloat80_t *aPtr, bool exact )
+{
+
+ return extF80_to_ui32_r_minMag( *aPtr, exact );
+
+}
+
+#else
+
+uint_fast32_t extF80M_to_ui32_r_minMag( const extFloat80_t *aPtr, bool exact )
+{
+ const struct extFloat80M *aSPtr;
+ uint_fast16_t uiA64;
+ int32_t exp;
+ uint64_t sig;
+ int32_t shiftDist;
+ bool sign;
+ uint64_t shiftedSig;
+ uint32_t z;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ aSPtr = (const struct extFloat80M *) aPtr;
+ uiA64 = aSPtr->signExp;
+ exp = expExtF80UI64( uiA64 );
+ sig = aSPtr->signif;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( ! sig && (exp != 0x7FFF) ) return 0;
+ shiftDist = 0x403E - exp;
+ if ( 64 <= shiftDist ) {
+ if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;
+ return 0;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ sign = signExtF80UI64( uiA64 );
+ if ( shiftDist < 0 ) {
+ if ( sign || sig>>32 || (shiftDist <= -31) ) goto invalid;
+ shiftedSig = (uint64_t) (uint32_t) sig<<-shiftDist;
+ if ( shiftedSig>>32 ) goto invalid;
+ z = shiftedSig;
+ } else {
+ shiftedSig = sig;
+ if ( shiftDist ) shiftedSig >>= shiftDist;
+ if ( shiftedSig>>32 ) goto invalid;
+ z = shiftedSig;
+ if ( sign && z ) goto invalid;
+ if ( exact && shiftDist && ((uint64_t) z<
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+uint_fast64_t
+ extF80M_to_ui64(
+ const extFloat80_t *aPtr, uint_fast8_t roundingMode, bool exact )
+{
+
+ return extF80_to_ui64( *aPtr, roundingMode, exact );
+
+}
+
+#else
+
+uint_fast64_t
+ extF80M_to_ui64(
+ const extFloat80_t *aPtr, uint_fast8_t roundingMode, bool exact )
+{
+ const struct extFloat80M *aSPtr;
+ uint_fast16_t uiA64;
+ bool sign;
+ int32_t exp;
+ uint64_t sig;
+ int32_t shiftDist;
+ uint32_t extSig[3];
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ aSPtr = (const struct extFloat80M *) aPtr;
+ uiA64 = aSPtr->signExp;
+ sign = signExtF80UI64( uiA64 );
+ exp = expExtF80UI64( uiA64 );
+ sig = aSPtr->signif;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ shiftDist = 0x403E - exp;
+ if ( shiftDist < 0 ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ return
+ (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ))
+ ? ui64_fromNaN
+ : sign ? ui64_fromNegOverflow : ui64_fromPosOverflow;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ extSig[indexWord( 3, 2 )] = sig>>32;
+ extSig[indexWord( 3, 1 )] = sig;
+ extSig[indexWord( 3, 0 )] = 0;
+ if ( shiftDist ) softfloat_shiftRightJam96M( extSig, shiftDist, extSig );
+ return softfloat_roundMToUI64( sign, extSig, roundingMode, exact );
+
+}
+
+#endif
+
diff --git a/softfloat/source/extF80M_to_ui64_r_minMag.c b/softfloat/source/extF80M_to_ui64_r_minMag.c
new file mode 100644
index 0000000..bf48390
--- /dev/null
+++ b/softfloat/source/extF80M_to_ui64_r_minMag.c
@@ -0,0 +1,108 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+uint_fast64_t extF80M_to_ui64_r_minMag( const extFloat80_t *aPtr, bool exact )
+{
+
+ return extF80_to_ui64_r_minMag( *aPtr, exact );
+
+}
+
+#else
+
+uint_fast64_t extF80M_to_ui64_r_minMag( const extFloat80_t *aPtr, bool exact )
+{
+ const struct extFloat80M *aSPtr;
+ uint_fast16_t uiA64;
+ int32_t exp;
+ uint64_t sig;
+ int32_t shiftDist;
+ bool sign;
+ uint64_t z;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ aSPtr = (const struct extFloat80M *) aPtr;
+ uiA64 = aSPtr->signExp;
+ exp = expExtF80UI64( uiA64 );
+ sig = aSPtr->signif;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( ! sig && (exp != 0x7FFF) ) return 0;
+ shiftDist = 0x403E - exp;
+ if ( 64 <= shiftDist ) {
+ if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;
+ return 0;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ sign = signExtF80UI64( uiA64 );
+ if ( shiftDist < 0 ) {
+ if ( sign || (shiftDist <= -63) ) goto invalid;
+ shiftDist = -shiftDist;
+ z = sig<>shiftDist != sig ) goto invalid;
+ } else {
+ z = sig;
+ if ( shiftDist ) z >>= shiftDist;
+ if ( sign && z ) goto invalid;
+ if ( exact && shiftDist && (z<
+#include
+#include "platform.h"
+#include "internals.h"
+#include "softfloat.h"
+
+extFloat80_t extF80_add( extFloat80_t a, extFloat80_t b )
+{
+ union { struct extFloat80M s; extFloat80_t f; } uA;
+ uint_fast16_t uiA64;
+ uint_fast64_t uiA0;
+ bool signA;
+ union { struct extFloat80M s; extFloat80_t f; } uB;
+ uint_fast16_t uiB64;
+ uint_fast64_t uiB0;
+ bool signB;
+#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 2)
+ extFloat80_t
+ (*magsFuncPtr)(
+ uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool );
+#endif
+
+ uA.f = a;
+ uiA64 = uA.s.signExp;
+ uiA0 = uA.s.signif;
+ signA = signExtF80UI64( uiA64 );
+ uB.f = b;
+ uiB64 = uB.s.signExp;
+ uiB0 = uB.s.signif;
+ signB = signExtF80UI64( uiB64 );
+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)
+ if ( signA == signB ) {
+ return softfloat_addMagsExtF80( uiA64, uiA0, uiB64, uiB0, signA );
+ } else {
+ return softfloat_subMagsExtF80( uiA64, uiA0, uiB64, uiB0, signA );
+ }
+#else
+ magsFuncPtr =
+ (signA == signB) ? softfloat_addMagsExtF80 : softfloat_subMagsExtF80;
+ return (*magsFuncPtr)( uiA64, uiA0, uiB64, uiB0, signA );
+#endif
+
+}
+
diff --git a/softfloat/source/extF80_div.c b/softfloat/source/extF80_div.c
new file mode 100644
index 0000000..7d649c5
--- /dev/null
+++ b/softfloat/source/extF80_div.c
@@ -0,0 +1,203 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+extFloat80_t extF80_div( extFloat80_t a, extFloat80_t b )
+{
+ union { struct extFloat80M s; extFloat80_t f; } uA;
+ uint_fast16_t uiA64;
+ uint_fast64_t uiA0;
+ bool signA;
+ int_fast32_t expA;
+ uint_fast64_t sigA;
+ union { struct extFloat80M s; extFloat80_t f; } uB;
+ uint_fast16_t uiB64;
+ uint_fast64_t uiB0;
+ bool signB;
+ int_fast32_t expB;
+ uint_fast64_t sigB;
+ bool signZ;
+ struct exp32_sig64 normExpSig;
+ int_fast32_t expZ;
+ struct uint128 rem;
+ uint_fast32_t recip32;
+ uint_fast64_t sigZ;
+ int ix;
+ uint_fast64_t q64;
+ uint_fast32_t q;
+ struct uint128 term;
+ uint_fast64_t sigZExtra;
+ struct uint128 uiZ;
+ uint_fast16_t uiZ64;
+ uint_fast64_t uiZ0;
+ union { struct extFloat80M s; extFloat80_t f; } uZ;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uA.f = a;
+ uiA64 = uA.s.signExp;
+ uiA0 = uA.s.signif;
+ signA = signExtF80UI64( uiA64 );
+ expA = expExtF80UI64( uiA64 );
+ sigA = uiA0;
+ uB.f = b;
+ uiB64 = uB.s.signExp;
+ uiB0 = uB.s.signif;
+ signB = signExtF80UI64( uiB64 );
+ expB = expExtF80UI64( uiB64 );
+ sigB = uiB0;
+ signZ = signA ^ signB;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( expA == 0x7FFF ) {
+ if ( sigA & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) goto propagateNaN;
+ if ( expB == 0x7FFF ) {
+ if ( sigB & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) goto propagateNaN;
+ goto invalid;
+ }
+ goto infinity;
+ }
+ if ( expB == 0x7FFF ) {
+ if ( sigB & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) goto propagateNaN;
+ goto zero;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( ! expB ) expB = 1;
+ if ( ! (sigB & UINT64_C( 0x8000000000000000 )) ) {
+ if ( ! sigB ) {
+ if ( ! sigA ) goto invalid;
+ softfloat_raiseFlags( softfloat_flag_infinite );
+ goto infinity;
+ }
+ normExpSig = softfloat_normSubnormalExtF80Sig( sigB );
+ expB += normExpSig.exp;
+ sigB = normExpSig.sig;
+ }
+ if ( ! expA ) expA = 1;
+ if ( ! (sigA & UINT64_C( 0x8000000000000000 )) ) {
+ if ( ! sigA ) goto zero;
+ normExpSig = softfloat_normSubnormalExtF80Sig( sigA );
+ expA += normExpSig.exp;
+ sigA = normExpSig.sig;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ expZ = expA - expB + 0x3FFF;
+ if ( sigA < sigB ) {
+ --expZ;
+ rem = softfloat_shortShiftLeft128( 0, sigA, 32 );
+ } else {
+ rem = softfloat_shortShiftLeft128( 0, sigA, 31 );
+ }
+ recip32 = softfloat_approxRecip32_1( sigB>>32 );
+ sigZ = 0;
+ ix = 2;
+ for (;;) {
+ q64 = (uint_fast64_t) (uint32_t) (rem.v64>>2) * recip32;
+ q = (q64 + 0x80000000)>>32;
+ --ix;
+ if ( ix < 0 ) break;
+ rem = softfloat_shortShiftLeft128( rem.v64, rem.v0, 29 );
+ term = softfloat_mul64ByShifted32To128( sigB, q );
+ rem = softfloat_sub128( rem.v64, rem.v0, term.v64, term.v0 );
+ if ( rem.v64 & UINT64_C( 0x8000000000000000 ) ) {
+ --q;
+ rem = softfloat_add128( rem.v64, rem.v0, sigB>>32, sigB<<32 );
+ }
+ sigZ = (sigZ<<29) + q;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( ((q + 1) & 0x3FFFFF) < 2 ) {
+ rem = softfloat_shortShiftLeft128( rem.v64, rem.v0, 29 );
+ term = softfloat_mul64ByShifted32To128( sigB, q );
+ rem = softfloat_sub128( rem.v64, rem.v0, term.v64, term.v0 );
+ term = softfloat_shortShiftLeft128( 0, sigB, 32 );
+ if ( rem.v64 & UINT64_C( 0x8000000000000000 ) ) {
+ --q;
+ rem = softfloat_add128( rem.v64, rem.v0, term.v64, term.v0 );
+ } else if ( softfloat_le128( term.v64, term.v0, rem.v64, rem.v0 ) ) {
+ ++q;
+ rem = softfloat_sub128( rem.v64, rem.v0, term.v64, term.v0 );
+ }
+ if ( rem.v64 | rem.v0 ) q |= 1;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ sigZ = (sigZ<<6) + (q>>23);
+ sigZExtra = (uint64_t) ((uint_fast64_t) q<<41);
+ return
+ softfloat_roundPackToExtF80(
+ signZ, expZ, sigZ, sigZExtra, extF80_roundingPrecision );
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ propagateNaN:
+ uiZ = softfloat_propagateNaNExtF80UI( uiA64, uiA0, uiB64, uiB0 );
+ uiZ64 = uiZ.v64;
+ uiZ0 = uiZ.v0;
+ goto uiZ;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ invalid:
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ uiZ64 = defaultNaNExtF80UI64;
+ uiZ0 = defaultNaNExtF80UI0;
+ goto uiZ;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ infinity:
+ uiZ64 = packToExtF80UI64( signZ, 0x7FFF );
+ uiZ0 = UINT64_C( 0x8000000000000000 );
+ goto uiZ;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ zero:
+ uiZ64 = packToExtF80UI64( signZ, 0 );
+ uiZ0 = 0;
+ uiZ:
+ uZ.s.signExp = uiZ64;
+ uZ.s.signif = uiZ0;
+ return uZ.f;
+
+}
+
diff --git a/softfloat/source/extF80_eq.c b/softfloat/source/extF80_eq.c
new file mode 100644
index 0000000..60f29da
--- /dev/null
+++ b/softfloat/source/extF80_eq.c
@@ -0,0 +1,73 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+bool extF80_eq( extFloat80_t a, extFloat80_t b )
+{
+ union { struct extFloat80M s; extFloat80_t f; } uA;
+ uint_fast16_t uiA64;
+ uint_fast64_t uiA0;
+ union { struct extFloat80M s; extFloat80_t f; } uB;
+ uint_fast16_t uiB64;
+ uint_fast64_t uiB0;
+
+ uA.f = a;
+ uiA64 = uA.s.signExp;
+ uiA0 = uA.s.signif;
+ uB.f = b;
+ uiB64 = uB.s.signExp;
+ uiB0 = uB.s.signif;
+ if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) {
+ if (
+ softfloat_isSigNaNExtF80UI( uiA64, uiA0 )
+ || softfloat_isSigNaNExtF80UI( uiB64, uiB0 )
+ ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ return false;
+ }
+ return
+ (uiA0 == uiB0)
+ && ((uiA64 == uiB64) || (! uiA0 && ! ((uiA64 | uiB64) & 0x7FFF)));
+
+}
+
diff --git a/softfloat/source/extF80_eq_signaling.c b/softfloat/source/extF80_eq_signaling.c
new file mode 100644
index 0000000..5a0dfe4
--- /dev/null
+++ b/softfloat/source/extF80_eq_signaling.c
@@ -0,0 +1,67 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "softfloat.h"
+
+bool extF80_eq_signaling( extFloat80_t a, extFloat80_t b )
+{
+ union { struct extFloat80M s; extFloat80_t f; } uA;
+ uint_fast16_t uiA64;
+ uint_fast64_t uiA0;
+ union { struct extFloat80M s; extFloat80_t f; } uB;
+ uint_fast16_t uiB64;
+ uint_fast64_t uiB0;
+
+ uA.f = a;
+ uiA64 = uA.s.signExp;
+ uiA0 = uA.s.signif;
+ uB.f = b;
+ uiB64 = uB.s.signExp;
+ uiB0 = uB.s.signif;
+ if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ return false;
+ }
+ return
+ (uiA0 == uiB0)
+ && ((uiA64 == uiB64) || (! uiA0 && ! ((uiA64 | uiB64) & 0x7FFF)));
+
+}
+
diff --git a/softfloat/source/extF80_isSignalingNaN.c b/softfloat/source/extF80_isSignalingNaN.c
new file mode 100644
index 0000000..6086f4b
--- /dev/null
+++ b/softfloat/source/extF80_isSignalingNaN.c
@@ -0,0 +1,51 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+bool extF80_isSignalingNaN( extFloat80_t a )
+{
+ union { struct extFloat80M s; extFloat80_t f; } uA;
+
+ uA.f = a;
+ return softfloat_isSigNaNExtF80UI( uA.s.signExp, uA.s.signif );
+
+}
+
diff --git a/softfloat/source/extF80_le.c b/softfloat/source/extF80_le.c
new file mode 100644
index 0000000..2a1ee60
--- /dev/null
+++ b/softfloat/source/extF80_le.c
@@ -0,0 +1,73 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+bool extF80_le( extFloat80_t a, extFloat80_t b )
+{
+ union { struct extFloat80M s; extFloat80_t f; } uA;
+ uint_fast16_t uiA64;
+ uint_fast64_t uiA0;
+ union { struct extFloat80M s; extFloat80_t f; } uB;
+ uint_fast16_t uiB64;
+ uint_fast64_t uiB0;
+ bool signA, signB;
+
+ uA.f = a;
+ uiA64 = uA.s.signExp;
+ uiA0 = uA.s.signif;
+ uB.f = b;
+ uiB64 = uB.s.signExp;
+ uiB0 = uB.s.signif;
+ if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ return false;
+ }
+ signA = signExtF80UI64( uiA64 );
+ signB = signExtF80UI64( uiB64 );
+ return
+ (signA != signB)
+ ? signA || ! (((uiA64 | uiB64) & 0x7FFF) | uiA0 | uiB0)
+ : ((uiA64 == uiB64) && (uiA0 == uiB0))
+ || (signA ^ softfloat_lt128( uiA64, uiA0, uiB64, uiB0 ));
+
+}
+
diff --git a/softfloat/source/extF80_le_quiet.c b/softfloat/source/extF80_le_quiet.c
new file mode 100644
index 0000000..5d0c3ae
--- /dev/null
+++ b/softfloat/source/extF80_le_quiet.c
@@ -0,0 +1,78 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+bool extF80_le_quiet( extFloat80_t a, extFloat80_t b )
+{
+ union { struct extFloat80M s; extFloat80_t f; } uA;
+ uint_fast16_t uiA64;
+ uint_fast64_t uiA0;
+ union { struct extFloat80M s; extFloat80_t f; } uB;
+ uint_fast16_t uiB64;
+ uint_fast64_t uiB0;
+ bool signA, signB;
+
+ uA.f = a;
+ uiA64 = uA.s.signExp;
+ uiA0 = uA.s.signif;
+ uB.f = b;
+ uiB64 = uB.s.signExp;
+ uiB0 = uB.s.signif;
+ if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) {
+ if (
+ softfloat_isSigNaNExtF80UI( uiA64, uiA0 )
+ || softfloat_isSigNaNExtF80UI( uiB64, uiB0 )
+ ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ return false;
+ }
+ signA = signExtF80UI64( uiA64 );
+ signB = signExtF80UI64( uiB64 );
+ return
+ (signA != signB)
+ ? signA || ! (((uiA64 | uiB64) & 0x7FFF) | uiA0 | uiB0)
+ : ((uiA64 == uiB64) && (uiA0 == uiB0))
+ || (signA ^ softfloat_lt128( uiA64, uiA0, uiB64, uiB0 ));
+
+}
+
diff --git a/softfloat/source/extF80_lt.c b/softfloat/source/extF80_lt.c
new file mode 100644
index 0000000..9560d8e
--- /dev/null
+++ b/softfloat/source/extF80_lt.c
@@ -0,0 +1,73 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+bool extF80_lt( extFloat80_t a, extFloat80_t b )
+{
+ union { struct extFloat80M s; extFloat80_t f; } uA;
+ uint_fast16_t uiA64;
+ uint_fast64_t uiA0;
+ union { struct extFloat80M s; extFloat80_t f; } uB;
+ uint_fast16_t uiB64;
+ uint_fast64_t uiB0;
+ bool signA, signB;
+
+ uA.f = a;
+ uiA64 = uA.s.signExp;
+ uiA0 = uA.s.signif;
+ uB.f = b;
+ uiB64 = uB.s.signExp;
+ uiB0 = uB.s.signif;
+ if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ return false;
+ }
+ signA = signExtF80UI64( uiA64 );
+ signB = signExtF80UI64( uiB64 );
+ return
+ (signA != signB)
+ ? signA && (((uiA64 | uiB64) & 0x7FFF) | uiA0 | uiB0)
+ : ((uiA64 != uiB64) || (uiA0 != uiB0))
+ && (signA ^ softfloat_lt128( uiA64, uiA0, uiB64, uiB0 ));
+
+}
+
diff --git a/softfloat/source/extF80_lt_quiet.c b/softfloat/source/extF80_lt_quiet.c
new file mode 100644
index 0000000..711652c
--- /dev/null
+++ b/softfloat/source/extF80_lt_quiet.c
@@ -0,0 +1,78 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+bool extF80_lt_quiet( extFloat80_t a, extFloat80_t b )
+{
+ union { struct extFloat80M s; extFloat80_t f; } uA;
+ uint_fast16_t uiA64;
+ uint_fast64_t uiA0;
+ union { struct extFloat80M s; extFloat80_t f; } uB;
+ uint_fast16_t uiB64;
+ uint_fast64_t uiB0;
+ bool signA, signB;
+
+ uA.f = a;
+ uiA64 = uA.s.signExp;
+ uiA0 = uA.s.signif;
+ uB.f = b;
+ uiB64 = uB.s.signExp;
+ uiB0 = uB.s.signif;
+ if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) {
+ if (
+ softfloat_isSigNaNExtF80UI( uiA64, uiA0 )
+ || softfloat_isSigNaNExtF80UI( uiB64, uiB0 )
+ ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ return false;
+ }
+ signA = signExtF80UI64( uiA64 );
+ signB = signExtF80UI64( uiB64 );
+ return
+ (signA != signB)
+ ? signA && (((uiA64 | uiB64) & 0x7FFF) | uiA0 | uiB0)
+ : ((uiA64 != uiB64) || (uiA0 != uiB0))
+ && (signA ^ softfloat_lt128( uiA64, uiA0, uiB64, uiB0 ));
+
+}
+
diff --git a/softfloat/source/extF80_mul.c b/softfloat/source/extF80_mul.c
new file mode 100644
index 0000000..c0c50a6
--- /dev/null
+++ b/softfloat/source/extF80_mul.c
@@ -0,0 +1,158 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+extFloat80_t extF80_mul( extFloat80_t a, extFloat80_t b )
+{
+ union { struct extFloat80M s; extFloat80_t f; } uA;
+ uint_fast16_t uiA64;
+ uint_fast64_t uiA0;
+ bool signA;
+ int_fast32_t expA;
+ uint_fast64_t sigA;
+ union { struct extFloat80M s; extFloat80_t f; } uB;
+ uint_fast16_t uiB64;
+ uint_fast64_t uiB0;
+ bool signB;
+ int_fast32_t expB;
+ uint_fast64_t sigB;
+ bool signZ;
+ uint_fast64_t magBits;
+ struct exp32_sig64 normExpSig;
+ int_fast32_t expZ;
+ struct uint128 sig128Z, uiZ;
+ uint_fast16_t uiZ64;
+ uint_fast64_t uiZ0;
+ union { struct extFloat80M s; extFloat80_t f; } uZ;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uA.f = a;
+ uiA64 = uA.s.signExp;
+ uiA0 = uA.s.signif;
+ signA = signExtF80UI64( uiA64 );
+ expA = expExtF80UI64( uiA64 );
+ sigA = uiA0;
+ uB.f = b;
+ uiB64 = uB.s.signExp;
+ uiB0 = uB.s.signif;
+ signB = signExtF80UI64( uiB64 );
+ expB = expExtF80UI64( uiB64 );
+ sigB = uiB0;
+ signZ = signA ^ signB;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( expA == 0x7FFF ) {
+ if (
+ (sigA & UINT64_C( 0x7FFFFFFFFFFFFFFF ))
+ || ((expB == 0x7FFF) && (sigB & UINT64_C( 0x7FFFFFFFFFFFFFFF )))
+ ) {
+ goto propagateNaN;
+ }
+ magBits = expB | sigB;
+ goto infArg;
+ }
+ if ( expB == 0x7FFF ) {
+ if ( sigB & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) goto propagateNaN;
+ magBits = expA | sigA;
+ goto infArg;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( ! expA ) expA = 1;
+ if ( ! (sigA & UINT64_C( 0x8000000000000000 )) ) {
+ if ( ! sigA ) goto zero;
+ normExpSig = softfloat_normSubnormalExtF80Sig( sigA );
+ expA += normExpSig.exp;
+ sigA = normExpSig.sig;
+ }
+ if ( ! expB ) expB = 1;
+ if ( ! (sigB & UINT64_C( 0x8000000000000000 )) ) {
+ if ( ! sigB ) goto zero;
+ normExpSig = softfloat_normSubnormalExtF80Sig( sigB );
+ expB += normExpSig.exp;
+ sigB = normExpSig.sig;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ expZ = expA + expB - 0x3FFE;
+ sig128Z = softfloat_mul64To128( sigA, sigB );
+ if ( sig128Z.v64 < UINT64_C( 0x8000000000000000 ) ) {
+ --expZ;
+ sig128Z =
+ softfloat_add128(
+ sig128Z.v64, sig128Z.v0, sig128Z.v64, sig128Z.v0 );
+ }
+ return
+ softfloat_roundPackToExtF80(
+ signZ, expZ, sig128Z.v64, sig128Z.v0, extF80_roundingPrecision );
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ propagateNaN:
+ uiZ = softfloat_propagateNaNExtF80UI( uiA64, uiA0, uiB64, uiB0 );
+ uiZ64 = uiZ.v64;
+ uiZ0 = uiZ.v0;
+ goto uiZ;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ infArg:
+ if ( ! magBits ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ uiZ64 = defaultNaNExtF80UI64;
+ uiZ0 = defaultNaNExtF80UI0;
+ } else {
+ uiZ64 = packToExtF80UI64( signZ, 0x7FFF );
+ uiZ0 = UINT64_C( 0x8000000000000000 );
+ }
+ goto uiZ;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ zero:
+ uiZ64 = packToExtF80UI64( signZ, 0 );
+ uiZ0 = 0;
+ uiZ:
+ uZ.s.signExp = uiZ64;
+ uZ.s.signif = uiZ0;
+ return uZ.f;
+
+}
+
diff --git a/softfloat/source/extF80_rem.c b/softfloat/source/extF80_rem.c
new file mode 100644
index 0000000..a2ebaad
--- /dev/null
+++ b/softfloat/source/extF80_rem.c
@@ -0,0 +1,225 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the
+University of California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+extFloat80_t extF80_rem( extFloat80_t a, extFloat80_t b )
+{
+ union { struct extFloat80M s; extFloat80_t f; } uA;
+ uint_fast16_t uiA64;
+ uint_fast64_t uiA0;
+ bool signA;
+ int_fast32_t expA;
+ uint_fast64_t sigA;
+ union { struct extFloat80M s; extFloat80_t f; } uB;
+ uint_fast16_t uiB64;
+ uint_fast64_t uiB0;
+ int_fast32_t expB;
+ uint_fast64_t sigB;
+ struct exp32_sig64 normExpSig;
+ int_fast32_t expDiff;
+ struct uint128 rem, shiftedSigB;
+ uint_fast32_t q, recip32;
+ uint_fast64_t q64;
+ struct uint128 term, altRem, meanRem;
+ bool signRem;
+ struct uint128 uiZ;
+ uint_fast16_t uiZ64;
+ uint_fast64_t uiZ0;
+ union { struct extFloat80M s; extFloat80_t f; } uZ;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uA.f = a;
+ uiA64 = uA.s.signExp;
+ uiA0 = uA.s.signif;
+ signA = signExtF80UI64( uiA64 );
+ expA = expExtF80UI64( uiA64 );
+ sigA = uiA0;
+ uB.f = b;
+ uiB64 = uB.s.signExp;
+ uiB0 = uB.s.signif;
+ expB = expExtF80UI64( uiB64 );
+ sigB = uiB0;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( expA == 0x7FFF ) {
+ if (
+ (sigA & UINT64_C( 0x7FFFFFFFFFFFFFFF ))
+ || ((expB == 0x7FFF) && (sigB & UINT64_C( 0x7FFFFFFFFFFFFFFF )))
+ ) {
+ goto propagateNaN;
+ }
+ goto invalid;
+ }
+ if ( expB == 0x7FFF ) {
+ if ( sigB & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) goto propagateNaN;
+ /*--------------------------------------------------------------------
+ | Argument b is an infinity. Doubling `expB' is an easy way to ensure
+ | that `expDiff' later is less than -1, which will result in returning
+ | a canonicalized version of argument a.
+ *--------------------------------------------------------------------*/
+ expB += expB;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( ! expB ) expB = 1;
+ if ( ! (sigB & UINT64_C( 0x8000000000000000 )) ) {
+ if ( ! sigB ) goto invalid;
+ normExpSig = softfloat_normSubnormalExtF80Sig( sigB );
+ expB += normExpSig.exp;
+ sigB = normExpSig.sig;
+ }
+ if ( ! expA ) expA = 1;
+ if ( ! (sigA & UINT64_C( 0x8000000000000000 )) ) {
+ if ( ! sigA ) {
+ expA = 0;
+ goto copyA;
+ }
+ normExpSig = softfloat_normSubnormalExtF80Sig( sigA );
+ expA += normExpSig.exp;
+ sigA = normExpSig.sig;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ expDiff = expA - expB;
+ if ( expDiff < -1 ) goto copyA;
+ rem = softfloat_shortShiftLeft128( 0, sigA, 32 );
+ shiftedSigB = softfloat_shortShiftLeft128( 0, sigB, 32 );
+ if ( expDiff < 1 ) {
+ if ( expDiff ) {
+ --expB;
+ shiftedSigB = softfloat_shortShiftLeft128( 0, sigB, 33 );
+ q = 0;
+ } else {
+ q = (sigB <= sigA);
+ if ( q ) {
+ rem =
+ softfloat_sub128(
+ rem.v64, rem.v0, shiftedSigB.v64, shiftedSigB.v0 );
+ }
+ }
+ } else {
+ recip32 = softfloat_approxRecip32_1( sigB>>32 );
+ expDiff -= 30;
+ for (;;) {
+ q64 = (uint_fast64_t) (uint32_t) (rem.v64>>2) * recip32;
+ if ( expDiff < 0 ) break;
+ q = (q64 + 0x80000000)>>32;
+ rem = softfloat_shortShiftLeft128( rem.v64, rem.v0, 29 );
+ term = softfloat_mul64ByShifted32To128( sigB, q );
+ rem = softfloat_sub128( rem.v64, rem.v0, term.v64, term.v0 );
+ if ( rem.v64 & UINT64_C( 0x8000000000000000 ) ) {
+ rem =
+ softfloat_add128(
+ rem.v64, rem.v0, shiftedSigB.v64, shiftedSigB.v0 );
+ }
+ expDiff -= 29;
+ }
+ /*--------------------------------------------------------------------
+ | (`expDiff' cannot be less than -29 here.)
+ *--------------------------------------------------------------------*/
+ q = (uint32_t) (q64>>32)>>(~expDiff & 31);
+ rem = softfloat_shortShiftLeft128( rem.v64, rem.v0, expDiff + 30 );
+ term = softfloat_mul64ByShifted32To128( sigB, q );
+ rem = softfloat_sub128( rem.v64, rem.v0, term.v64, term.v0 );
+ if ( rem.v64 & UINT64_C( 0x8000000000000000 ) ) {
+ altRem =
+ softfloat_add128(
+ rem.v64, rem.v0, shiftedSigB.v64, shiftedSigB.v0 );
+ goto selectRem;
+ }
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ do {
+ altRem = rem;
+ ++q;
+ rem =
+ softfloat_sub128(
+ rem.v64, rem.v0, shiftedSigB.v64, shiftedSigB.v0 );
+ } while ( ! (rem.v64 & UINT64_C( 0x8000000000000000 )) );
+ selectRem:
+ meanRem = softfloat_add128( rem.v64, rem.v0, altRem.v64, altRem.v0 );
+ if (
+ (meanRem.v64 & UINT64_C( 0x8000000000000000 ))
+ || (! (meanRem.v64 | meanRem.v0) && (q & 1))
+ ) {
+ rem = altRem;
+ }
+ signRem = signA;
+ if ( rem.v64 & UINT64_C( 0x8000000000000000 ) ) {
+ signRem = ! signRem;
+ rem = softfloat_sub128( 0, 0, rem.v64, rem.v0 );
+ }
+ return
+ softfloat_normRoundPackToExtF80(
+ signRem, rem.v64 | rem.v0 ? expB + 32 : 0, rem.v64, rem.v0, 80 );
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ propagateNaN:
+ uiZ = softfloat_propagateNaNExtF80UI( uiA64, uiA0, uiB64, uiB0 );
+ uiZ64 = uiZ.v64;
+ uiZ0 = uiZ.v0;
+ goto uiZ;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ invalid:
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ uiZ64 = defaultNaNExtF80UI64;
+ uiZ0 = defaultNaNExtF80UI0;
+ goto uiZ;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ copyA:
+ if ( expA < 1 ) {
+ sigA >>= 1 - expA;
+ expA = 0;
+ }
+ uiZ64 = packToExtF80UI64( signA, expA );
+ uiZ0 = sigA;
+ uiZ:
+ uZ.s.signExp = uiZ64;
+ uZ.s.signif = uiZ0;
+ return uZ.f;
+
+}
+
diff --git a/softfloat/source/extF80_roundToInt.c b/softfloat/source/extF80_roundToInt.c
new file mode 100644
index 0000000..8103dae
--- /dev/null
+++ b/softfloat/source/extF80_roundToInt.c
@@ -0,0 +1,154 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+extFloat80_t
+ extF80_roundToInt( extFloat80_t a, uint_fast8_t roundingMode, bool exact )
+{
+ union { struct extFloat80M s; extFloat80_t f; } uA;
+ uint_fast16_t uiA64, signUI64;
+ int_fast32_t exp;
+ uint_fast64_t sigA;
+ uint_fast16_t uiZ64;
+ uint_fast64_t sigZ;
+ struct exp32_sig64 normExpSig;
+ struct uint128 uiZ;
+ uint_fast64_t lastBitMask, roundBitsMask;
+ union { struct extFloat80M s; extFloat80_t f; } uZ;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uA.f = a;
+ uiA64 = uA.s.signExp;
+ signUI64 = uiA64 & packToExtF80UI64( 1, 0 );
+ exp = expExtF80UI64( uiA64 );
+ sigA = uA.s.signif;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( !(sigA & UINT64_C( 0x8000000000000000 )) && (exp != 0x7FFF) ) {
+ if ( !sigA ) {
+ uiZ64 = signUI64;
+ sigZ = 0;
+ goto uiZ;
+ }
+ normExpSig = softfloat_normSubnormalExtF80Sig( sigA );
+ exp += normExpSig.exp;
+ sigA = normExpSig.sig;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( 0x403E <= exp ) {
+ if ( exp == 0x7FFF ) {
+ if ( sigA & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) {
+ uiZ = softfloat_propagateNaNExtF80UI( uiA64, sigA, 0, 0 );
+ uiZ64 = uiZ.v64;
+ sigZ = uiZ.v0;
+ goto uiZ;
+ }
+ sigZ = UINT64_C( 0x8000000000000000 );
+ } else {
+ sigZ = sigA;
+ }
+ uiZ64 = signUI64 | exp;
+ goto uiZ;
+ }
+ if ( exp <= 0x3FFE ) {
+ if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;
+ switch ( roundingMode ) {
+ case softfloat_round_near_even:
+ if ( !(sigA & UINT64_C( 0x7FFFFFFFFFFFFFFF )) ) break;
+ case softfloat_round_near_maxMag:
+ if ( exp == 0x3FFE ) goto mag1;
+ break;
+ case softfloat_round_min:
+ if ( signUI64 ) goto mag1;
+ break;
+ case softfloat_round_max:
+ if ( !signUI64 ) goto mag1;
+ break;
+#ifdef SOFTFLOAT_ROUND_ODD
+ case softfloat_round_odd:
+ goto mag1;
+#endif
+ }
+ uiZ64 = signUI64;
+ sigZ = 0;
+ goto uiZ;
+ mag1:
+ uiZ64 = signUI64 | 0x3FFF;
+ sigZ = UINT64_C( 0x8000000000000000 );
+ goto uiZ;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uiZ64 = signUI64 | exp;
+ lastBitMask = (uint_fast64_t) 1<<(0x403E - exp);
+ roundBitsMask = lastBitMask - 1;
+ sigZ = sigA;
+ if ( roundingMode == softfloat_round_near_maxMag ) {
+ sigZ += lastBitMask>>1;
+ } else if ( roundingMode == softfloat_round_near_even ) {
+ sigZ += lastBitMask>>1;
+ if ( !(sigZ & roundBitsMask) ) sigZ &= ~lastBitMask;
+ } else if (
+ roundingMode == (signUI64 ? softfloat_round_min : softfloat_round_max)
+ ) {
+ sigZ += roundBitsMask;
+ }
+ sigZ &= ~roundBitsMask;
+ if ( !sigZ ) {
+ ++uiZ64;
+ sigZ = UINT64_C( 0x8000000000000000 );
+ }
+ if ( sigZ != sigA ) {
+#ifdef SOFTFLOAT_ROUND_ODD
+ if ( roundingMode == softfloat_round_odd ) sigZ |= lastBitMask;
+#endif
+ if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;
+ }
+ uiZ:
+ uZ.s.signExp = uiZ64;
+ uZ.s.signif = sigZ;
+ return uZ.f;
+
+}
+
diff --git a/softfloat/source/extF80_sqrt.c b/softfloat/source/extF80_sqrt.c
new file mode 100644
index 0000000..5d328a0
--- /dev/null
+++ b/softfloat/source/extF80_sqrt.c
@@ -0,0 +1,176 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the
+University of California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+extFloat80_t extF80_sqrt( extFloat80_t a )
+{
+ union { struct extFloat80M s; extFloat80_t f; } uA;
+ uint_fast16_t uiA64;
+ uint_fast64_t uiA0;
+ bool signA;
+ int_fast32_t expA;
+ uint_fast64_t sigA;
+ struct uint128 uiZ;
+ uint_fast16_t uiZ64;
+ uint_fast64_t uiZ0;
+ struct exp32_sig64 normExpSig;
+ int_fast32_t expZ;
+ uint_fast32_t sig32A, recipSqrt32, sig32Z;
+ struct uint128 rem;
+ uint_fast64_t q, x64, sigZ;
+ struct uint128 y, term;
+ uint_fast64_t sigZExtra;
+ union { struct extFloat80M s; extFloat80_t f; } uZ;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uA.f = a;
+ uiA64 = uA.s.signExp;
+ uiA0 = uA.s.signif;
+ signA = signExtF80UI64( uiA64 );
+ expA = expExtF80UI64( uiA64 );
+ sigA = uiA0;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( expA == 0x7FFF ) {
+ if ( sigA & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) {
+ uiZ = softfloat_propagateNaNExtF80UI( uiA64, uiA0, 0, 0 );
+ uiZ64 = uiZ.v64;
+ uiZ0 = uiZ.v0;
+ goto uiZ;
+ }
+ if ( ! signA ) return a;
+ goto invalid;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( signA ) {
+ if ( ! sigA ) goto zero;
+ goto invalid;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( ! expA ) expA = 1;
+ if ( ! (sigA & UINT64_C( 0x8000000000000000 )) ) {
+ if ( ! sigA ) goto zero;
+ normExpSig = softfloat_normSubnormalExtF80Sig( sigA );
+ expA += normExpSig.exp;
+ sigA = normExpSig.sig;
+ }
+ /*------------------------------------------------------------------------
+ | (`sig32Z' is guaranteed to be a lower bound on the square root of
+ | `sig32A', which makes `sig32Z' also a lower bound on the square root of
+ | `sigA'.)
+ *------------------------------------------------------------------------*/
+ expZ = ((expA - 0x3FFF)>>1) + 0x3FFF;
+ expA &= 1;
+ sig32A = sigA>>32;
+ recipSqrt32 = softfloat_approxRecipSqrt32_1( expA, sig32A );
+ sig32Z = ((uint_fast64_t) sig32A * recipSqrt32)>>32;
+ if ( expA ) {
+ sig32Z >>= 1;
+ rem = softfloat_shortShiftLeft128( 0, sigA, 61 );
+ } else {
+ rem = softfloat_shortShiftLeft128( 0, sigA, 62 );
+ }
+ rem.v64 -= (uint_fast64_t) sig32Z * sig32Z;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ q = ((uint32_t) (rem.v64>>2) * (uint_fast64_t) recipSqrt32)>>32;
+ x64 = (uint_fast64_t) sig32Z<<32;
+ sigZ = x64 + (q<<3);
+ y = softfloat_shortShiftLeft128( rem.v64, rem.v0, 29 );
+ /*------------------------------------------------------------------------
+ | (Repeating this loop is a rare occurrence.)
+ *------------------------------------------------------------------------*/
+ for (;;) {
+ term = softfloat_mul64ByShifted32To128( x64 + sigZ, q );
+ rem = softfloat_sub128( y.v64, y.v0, term.v64, term.v0 );
+ if ( ! (rem.v64 & UINT64_C( 0x8000000000000000 )) ) break;
+ --q;
+ sigZ -= 1<<3;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ q = (((rem.v64>>2) * recipSqrt32)>>32) + 2;
+ x64 = sigZ;
+ sigZ = (sigZ<<1) + (q>>25);
+ sigZExtra = (uint64_t) (q<<39);
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( (q & 0xFFFFFF) <= 2 ) {
+ q &= ~(uint_fast64_t) 0xFFFF;
+ sigZExtra = (uint64_t) (q<<39);
+ term = softfloat_mul64ByShifted32To128( x64 + (q>>27), q );
+ x64 = (uint32_t) (q<<5) * (uint_fast64_t) (uint32_t) q;
+ term = softfloat_add128( term.v64, term.v0, 0, x64 );
+ rem = softfloat_shortShiftLeft128( rem.v64, rem.v0, 28 );
+ rem = softfloat_sub128( rem.v64, rem.v0, term.v64, term.v0 );
+ if ( rem.v64 & UINT64_C( 0x8000000000000000 ) ) {
+ if ( ! sigZExtra ) --sigZ;
+ --sigZExtra;
+ } else {
+ if ( rem.v64 | rem.v0 ) sigZExtra |= 1;
+ }
+ }
+ return
+ softfloat_roundPackToExtF80(
+ 0, expZ, sigZ, sigZExtra, extF80_roundingPrecision );
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ invalid:
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ uiZ64 = defaultNaNExtF80UI64;
+ uiZ0 = defaultNaNExtF80UI0;
+ goto uiZ;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ zero:
+ uiZ64 = packToExtF80UI64( signA, 0 );
+ uiZ0 = 0;
+ uiZ:
+ uZ.s.signExp = uiZ64;
+ uZ.s.signif = uiZ0;
+ return uZ.f;
+
+}
+
diff --git a/softfloat/source/extF80_sub.c b/softfloat/source/extF80_sub.c
new file mode 100644
index 0000000..494d316
--- /dev/null
+++ b/softfloat/source/extF80_sub.c
@@ -0,0 +1,80 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "softfloat.h"
+
+extFloat80_t extF80_sub( extFloat80_t a, extFloat80_t b )
+{
+ union { struct extFloat80M s; extFloat80_t f; } uA;
+ uint_fast16_t uiA64;
+ uint_fast64_t uiA0;
+ bool signA;
+ union { struct extFloat80M s; extFloat80_t f; } uB;
+ uint_fast16_t uiB64;
+ uint_fast64_t uiB0;
+ bool signB;
+#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 2)
+ extFloat80_t
+ (*magsFuncPtr)(
+ uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool );
+#endif
+
+ uA.f = a;
+ uiA64 = uA.s.signExp;
+ uiA0 = uA.s.signif;
+ signA = signExtF80UI64( uiA64 );
+ uB.f = b;
+ uiB64 = uB.s.signExp;
+ uiB0 = uB.s.signif;
+ signB = signExtF80UI64( uiB64 );
+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)
+ if ( signA == signB ) {
+ return softfloat_subMagsExtF80( uiA64, uiA0, uiB64, uiB0, signA );
+ } else {
+ return softfloat_addMagsExtF80( uiA64, uiA0, uiB64, uiB0, signA );
+ }
+#else
+ magsFuncPtr =
+ (signA == signB) ? softfloat_subMagsExtF80 : softfloat_addMagsExtF80;
+ return (*magsFuncPtr)( uiA64, uiA0, uiB64, uiB0, signA );
+#endif
+
+}
+
diff --git a/softfloat/source/extF80_to_f128.c b/softfloat/source/extF80_to_f128.c
new file mode 100644
index 0000000..7fbc9cb
--- /dev/null
+++ b/softfloat/source/extF80_to_f128.c
@@ -0,0 +1,75 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+float128_t extF80_to_f128( extFloat80_t a )
+{
+ union { struct extFloat80M s; extFloat80_t f; } uA;
+ uint_fast16_t uiA64;
+ uint_fast64_t uiA0;
+ uint_fast16_t exp;
+ uint_fast64_t frac;
+ struct commonNaN commonNaN;
+ struct uint128 uiZ;
+ bool sign;
+ struct uint128 frac128;
+ union ui128_f128 uZ;
+
+ uA.f = a;
+ uiA64 = uA.s.signExp;
+ uiA0 = uA.s.signif;
+ exp = expExtF80UI64( uiA64 );
+ frac = uiA0 & UINT64_C( 0x7FFFFFFFFFFFFFFF );
+ if ( (exp == 0x7FFF) && frac ) {
+ softfloat_extF80UIToCommonNaN( uiA64, uiA0, &commonNaN );
+ uiZ = softfloat_commonNaNToF128UI( &commonNaN );
+ } else {
+ sign = signExtF80UI64( uiA64 );
+ frac128 = softfloat_shortShiftLeft128( 0, frac, 49 );
+ uiZ.v64 = packToF128UI64( sign, exp, frac128.v64 );
+ uiZ.v0 = frac128.v0;
+ }
+ uZ.ui = uiZ;
+ return uZ.f;
+
+}
+
diff --git a/softfloat/source/extF80_to_f16.c b/softfloat/source/extF80_to_f16.c
new file mode 100644
index 0000000..ca5050f
--- /dev/null
+++ b/softfloat/source/extF80_to_f16.c
@@ -0,0 +1,96 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+float16_t extF80_to_f16( extFloat80_t a )
+{
+ union { struct extFloat80M s; extFloat80_t f; } uA;
+ uint_fast16_t uiA64;
+ uint_fast64_t uiA0;
+ bool sign;
+ int_fast32_t exp;
+ uint_fast64_t sig;
+ struct commonNaN commonNaN;
+ uint_fast16_t uiZ, sig16;
+ union ui16_f16 uZ;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uA.f = a;
+ uiA64 = uA.s.signExp;
+ uiA0 = uA.s.signif;
+ sign = signExtF80UI64( uiA64 );
+ exp = expExtF80UI64( uiA64 );
+ sig = uiA0;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( exp == 0x7FFF ) {
+ if ( sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) {
+ softfloat_extF80UIToCommonNaN( uiA64, uiA0, &commonNaN );
+ uiZ = softfloat_commonNaNToF16UI( &commonNaN );
+ } else {
+ uiZ = packToF16UI( sign, 0x1F, 0 );
+ }
+ goto uiZ;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ sig16 = softfloat_shortShiftRightJam64( sig, 49 );
+ if ( ! (exp | sig16) ) {
+ uiZ = packToF16UI( sign, 0, 0 );
+ goto uiZ;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ exp -= 0x3FF1;
+ if ( sizeof (int_fast16_t) < sizeof (int_fast32_t) ) {
+ if ( exp < -0x40 ) exp = -0x40;
+ }
+ return softfloat_roundPackToF16( sign, exp, sig16 );
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uiZ:
+ uZ.ui = uiZ;
+ return uZ.f;
+
+}
+
diff --git a/softfloat/source/extF80_to_f32.c b/softfloat/source/extF80_to_f32.c
new file mode 100644
index 0000000..357f56e
--- /dev/null
+++ b/softfloat/source/extF80_to_f32.c
@@ -0,0 +1,96 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+float32_t extF80_to_f32( extFloat80_t a )
+{
+ union { struct extFloat80M s; extFloat80_t f; } uA;
+ uint_fast16_t uiA64;
+ uint_fast64_t uiA0;
+ bool sign;
+ int_fast32_t exp;
+ uint_fast64_t sig;
+ struct commonNaN commonNaN;
+ uint_fast32_t uiZ, sig32;
+ union ui32_f32 uZ;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uA.f = a;
+ uiA64 = uA.s.signExp;
+ uiA0 = uA.s.signif;
+ sign = signExtF80UI64( uiA64 );
+ exp = expExtF80UI64( uiA64 );
+ sig = uiA0;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( exp == 0x7FFF ) {
+ if ( sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) {
+ softfloat_extF80UIToCommonNaN( uiA64, uiA0, &commonNaN );
+ uiZ = softfloat_commonNaNToF32UI( &commonNaN );
+ } else {
+ uiZ = packToF32UI( sign, 0xFF, 0 );
+ }
+ goto uiZ;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ sig32 = softfloat_shortShiftRightJam64( sig, 33 );
+ if ( ! (exp | sig32) ) {
+ uiZ = packToF32UI( sign, 0, 0 );
+ goto uiZ;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ exp -= 0x3F81;
+ if ( sizeof (int_fast16_t) < sizeof (int_fast32_t) ) {
+ if ( exp < -0x1000 ) exp = -0x1000;
+ }
+ return softfloat_roundPackToF32( sign, exp, sig32 );
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uiZ:
+ uZ.ui = uiZ;
+ return uZ.f;
+
+}
+
diff --git a/softfloat/source/extF80_to_f64.c b/softfloat/source/extF80_to_f64.c
new file mode 100644
index 0000000..c387399
--- /dev/null
+++ b/softfloat/source/extF80_to_f64.c
@@ -0,0 +1,96 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+float64_t extF80_to_f64( extFloat80_t a )
+{
+ union { struct extFloat80M s; extFloat80_t f; } uA;
+ uint_fast16_t uiA64;
+ uint_fast64_t uiA0;
+ bool sign;
+ int_fast32_t exp;
+ uint_fast64_t sig;
+ struct commonNaN commonNaN;
+ uint_fast64_t uiZ;
+ union ui64_f64 uZ;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uA.f = a;
+ uiA64 = uA.s.signExp;
+ uiA0 = uA.s.signif;
+ sign = signExtF80UI64( uiA64 );
+ exp = expExtF80UI64( uiA64 );
+ sig = uiA0;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( ! (exp | sig) ) {
+ uiZ = packToF64UI( sign, 0, 0 );
+ goto uiZ;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( exp == 0x7FFF ) {
+ if ( sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) {
+ softfloat_extF80UIToCommonNaN( uiA64, uiA0, &commonNaN );
+ uiZ = softfloat_commonNaNToF64UI( &commonNaN );
+ } else {
+ uiZ = packToF64UI( sign, 0x7FF, 0 );
+ }
+ goto uiZ;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ sig = softfloat_shortShiftRightJam64( sig, 1 );
+ exp -= 0x3C01;
+ if ( sizeof (int_fast16_t) < sizeof (int_fast32_t) ) {
+ if ( exp < -0x1000 ) exp = -0x1000;
+ }
+ return softfloat_roundPackToF64( sign, exp, sig );
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uiZ:
+ uZ.ui = uiZ;
+ return uZ.f;
+
+}
+
diff --git a/softfloat/source/extF80_to_i32.c b/softfloat/source/extF80_to_i32.c
new file mode 100644
index 0000000..549ca76
--- /dev/null
+++ b/softfloat/source/extF80_to_i32.c
@@ -0,0 +1,83 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the
+University of California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+int_fast32_t
+ extF80_to_i32( extFloat80_t a, uint_fast8_t roundingMode, bool exact )
+{
+ union { struct extFloat80M s; extFloat80_t f; } uA;
+ uint_fast16_t uiA64;
+ bool sign;
+ int_fast32_t exp;
+ uint_fast64_t sig;
+ int_fast32_t shiftDist;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uA.f = a;
+ uiA64 = uA.s.signExp;
+ sign = signExtF80UI64( uiA64 );
+ exp = expExtF80UI64( uiA64 );
+ sig = uA.s.signif;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+#if (i32_fromNaN != i32_fromPosOverflow) || (i32_fromNaN != i32_fromNegOverflow)
+ if ( (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF )) ) {
+#if (i32_fromNaN == i32_fromPosOverflow)
+ sign = 0;
+#elif (i32_fromNaN == i32_fromNegOverflow)
+ sign = 1;
+#else
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ return i32_fromNaN;
+#endif
+ }
+#endif
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ shiftDist = 0x4032 - exp;
+ if ( shiftDist <= 0 ) shiftDist = 1;
+ sig = softfloat_shiftRightJam64( sig, shiftDist );
+ return softfloat_roundToI32( sign, sig, roundingMode, exact );
+
+}
+
diff --git a/softfloat/source/extF80_to_i32_r_minMag.c b/softfloat/source/extF80_to_i32_r_minMag.c
new file mode 100644
index 0000000..2b7b9e2
--- /dev/null
+++ b/softfloat/source/extF80_to_i32_r_minMag.c
@@ -0,0 +1,97 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+int_fast32_t extF80_to_i32_r_minMag( extFloat80_t a, bool exact )
+{
+ union { struct extFloat80M s; extFloat80_t f; } uA;
+ uint_fast16_t uiA64;
+ int_fast32_t exp;
+ uint_fast64_t sig;
+ int_fast32_t shiftDist;
+ bool sign;
+ int_fast32_t absZ;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uA.f = a;
+ uiA64 = uA.s.signExp;
+ exp = expExtF80UI64( uiA64 );
+ sig = uA.s.signif;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ shiftDist = 0x403E - exp;
+ if ( 64 <= shiftDist ) {
+ if ( exact && (exp | sig) ) {
+ softfloat_exceptionFlags |= softfloat_flag_inexact;
+ }
+ return 0;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ sign = signExtF80UI64( uiA64 );
+ if ( shiftDist < 33 ) {
+ if (
+ (uiA64 == packToExtF80UI64( 1, 0x401E ))
+ && (sig < UINT64_C( 0x8000000100000000 ))
+ ) {
+ if ( exact && (sig & UINT64_C( 0x00000000FFFFFFFF )) ) {
+ softfloat_exceptionFlags |= softfloat_flag_inexact;
+ }
+ return -0x7FFFFFFF - 1;
+ }
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ return
+ (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ))
+ ? i32_fromNaN
+ : sign ? i32_fromNegOverflow : i32_fromPosOverflow;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ absZ = sig>>shiftDist;
+ if ( exact && ((uint_fast64_t) (uint_fast32_t) absZ<
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+int_fast64_t
+ extF80_to_i64( extFloat80_t a, uint_fast8_t roundingMode, bool exact )
+{
+ union { struct extFloat80M s; extFloat80_t f; } uA;
+ uint_fast16_t uiA64;
+ bool sign;
+ int_fast32_t exp;
+ uint_fast64_t sig;
+ int_fast32_t shiftDist;
+ uint_fast64_t sigExtra;
+ struct uint64_extra sig64Extra;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uA.f = a;
+ uiA64 = uA.s.signExp;
+ sign = signExtF80UI64( uiA64 );
+ exp = expExtF80UI64( uiA64 );
+ sig = uA.s.signif;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ shiftDist = 0x403E - exp;
+ if ( shiftDist <= 0 ) {
+ /*--------------------------------------------------------------------
+ *--------------------------------------------------------------------*/
+ if ( shiftDist ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ return
+ (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ))
+ ? i64_fromNaN
+ : sign ? i64_fromNegOverflow : i64_fromPosOverflow;
+ }
+ /*--------------------------------------------------------------------
+ *--------------------------------------------------------------------*/
+ sigExtra = 0;
+ } else {
+ /*--------------------------------------------------------------------
+ *--------------------------------------------------------------------*/
+ sig64Extra = softfloat_shiftRightJam64Extra( sig, 0, shiftDist );
+ sig = sig64Extra.v;
+ sigExtra = sig64Extra.extra;
+ }
+ return softfloat_roundToI64( sign, sig, sigExtra, roundingMode, exact );
+
+}
+
diff --git a/softfloat/source/extF80_to_i64_r_minMag.c b/softfloat/source/extF80_to_i64_r_minMag.c
new file mode 100644
index 0000000..215876d
--- /dev/null
+++ b/softfloat/source/extF80_to_i64_r_minMag.c
@@ -0,0 +1,94 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+int_fast64_t extF80_to_i64_r_minMag( extFloat80_t a, bool exact )
+{
+ union { struct extFloat80M s; extFloat80_t f; } uA;
+ uint_fast16_t uiA64;
+ int_fast32_t exp;
+ uint_fast64_t sig;
+ int_fast32_t shiftDist;
+ bool sign;
+ int_fast64_t absZ;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uA.f = a;
+ uiA64 = uA.s.signExp;
+ exp = expExtF80UI64( uiA64 );
+ sig = uA.s.signif;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ shiftDist = 0x403E - exp;
+ if ( 64 <= shiftDist ) {
+ if ( exact && (exp | sig) ) {
+ softfloat_exceptionFlags |= softfloat_flag_inexact;
+ }
+ return 0;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ sign = signExtF80UI64( uiA64 );
+ if ( shiftDist <= 0 ) {
+ if (
+ (uiA64 == packToExtF80UI64( 1, 0x403E ))
+ && (sig == UINT64_C( 0x8000000000000000 ))
+ ) {
+ return -INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1;
+ }
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ return
+ (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ))
+ ? i64_fromNaN
+ : sign ? i64_fromNegOverflow : i64_fromPosOverflow;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ absZ = sig>>shiftDist;
+ if ( exact && (uint64_t) (sig<<(-shiftDist & 63)) ) {
+ softfloat_exceptionFlags |= softfloat_flag_inexact;
+ }
+ return sign ? -absZ : absZ;
+
+}
+
diff --git a/softfloat/source/extF80_to_ui32.c b/softfloat/source/extF80_to_ui32.c
new file mode 100644
index 0000000..d121c48
--- /dev/null
+++ b/softfloat/source/extF80_to_ui32.c
@@ -0,0 +1,83 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the
+University of California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+uint_fast32_t
+ extF80_to_ui32( extFloat80_t a, uint_fast8_t roundingMode, bool exact )
+{
+ union { struct extFloat80M s; extFloat80_t f; } uA;
+ uint_fast16_t uiA64;
+ bool sign;
+ int_fast32_t exp;
+ uint_fast64_t sig;
+ int_fast32_t shiftDist;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uA.f = a;
+ uiA64 = uA.s.signExp;
+ sign = signExtF80UI64( uiA64 );
+ exp = expExtF80UI64( uiA64 );
+ sig = uA.s.signif;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+#if (ui32_fromNaN != ui32_fromPosOverflow) || (ui32_fromNaN != ui32_fromNegOverflow)
+ if ( (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF )) ) {
+#if (ui32_fromNaN == ui32_fromPosOverflow)
+ sign = 0;
+#elif (ui32_fromNaN == ui32_fromNegOverflow)
+ sign = 1;
+#else
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ return ui32_fromNaN;
+#endif
+ }
+#endif
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ shiftDist = 0x4032 - exp;
+ if ( shiftDist <= 0 ) shiftDist = 1;
+ sig = softfloat_shiftRightJam64( sig, shiftDist );
+ return softfloat_roundToUI32( sign, sig, roundingMode, exact );
+
+}
+
diff --git a/softfloat/source/extF80_to_ui32_r_minMag.c b/softfloat/source/extF80_to_ui32_r_minMag.c
new file mode 100644
index 0000000..ad30483
--- /dev/null
+++ b/softfloat/source/extF80_to_ui32_r_minMag.c
@@ -0,0 +1,88 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+uint_fast32_t extF80_to_ui32_r_minMag( extFloat80_t a, bool exact )
+{
+ union { struct extFloat80M s; extFloat80_t f; } uA;
+ uint_fast16_t uiA64;
+ int_fast32_t exp;
+ uint_fast64_t sig;
+ int_fast32_t shiftDist;
+ bool sign;
+ uint_fast32_t z;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uA.f = a;
+ uiA64 = uA.s.signExp;
+ exp = expExtF80UI64( uiA64 );
+ sig = uA.s.signif;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ shiftDist = 0x403E - exp;
+ if ( 64 <= shiftDist ) {
+ if ( exact && (exp | sig) ) {
+ softfloat_exceptionFlags |= softfloat_flag_inexact;
+ }
+ return 0;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ sign = signExtF80UI64( uiA64 );
+ if ( sign || (shiftDist < 32) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ return
+ (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ))
+ ? ui32_fromNaN
+ : sign ? ui32_fromNegOverflow : ui32_fromPosOverflow;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ z = sig>>shiftDist;
+ if ( exact && ((uint_fast64_t) z<
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+uint_fast64_t
+ extF80_to_ui64( extFloat80_t a, uint_fast8_t roundingMode, bool exact )
+{
+ union { struct extFloat80M s; extFloat80_t f; } uA;
+ uint_fast16_t uiA64;
+ bool sign;
+ int_fast32_t exp;
+ uint_fast64_t sig;
+ int_fast32_t shiftDist;
+ uint_fast64_t sigExtra;
+ struct uint64_extra sig64Extra;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uA.f = a;
+ uiA64 = uA.s.signExp;
+ sign = signExtF80UI64( uiA64 );
+ exp = expExtF80UI64( uiA64 );
+ sig = uA.s.signif;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ shiftDist = 0x403E - exp;
+ if ( shiftDist < 0 ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ return
+ (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ))
+ ? ui64_fromNaN
+ : sign ? ui64_fromNegOverflow : ui64_fromPosOverflow;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ sigExtra = 0;
+ if ( shiftDist ) {
+ sig64Extra = softfloat_shiftRightJam64Extra( sig, 0, shiftDist );
+ sig = sig64Extra.v;
+ sigExtra = sig64Extra.extra;
+ }
+ return softfloat_roundToUI64( sign, sig, sigExtra, roundingMode, exact );
+
+}
+
diff --git a/softfloat/source/extF80_to_ui64_r_minMag.c b/softfloat/source/extF80_to_ui64_r_minMag.c
new file mode 100644
index 0000000..65adfe7
--- /dev/null
+++ b/softfloat/source/extF80_to_ui64_r_minMag.c
@@ -0,0 +1,88 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+uint_fast64_t extF80_to_ui64_r_minMag( extFloat80_t a, bool exact )
+{
+ union { struct extFloat80M s; extFloat80_t f; } uA;
+ uint_fast16_t uiA64;
+ int_fast32_t exp;
+ uint_fast64_t sig;
+ int_fast32_t shiftDist;
+ bool sign;
+ uint_fast64_t z;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uA.f = a;
+ uiA64 = uA.s.signExp;
+ exp = expExtF80UI64( uiA64 );
+ sig = uA.s.signif;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ shiftDist = 0x403E - exp;
+ if ( 64 <= shiftDist ) {
+ if ( exact && (exp | sig) ) {
+ softfloat_exceptionFlags |= softfloat_flag_inexact;
+ }
+ return 0;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ sign = signExtF80UI64( uiA64 );
+ if ( sign || (shiftDist < 0) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ return
+ (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ))
+ ? ui64_fromNaN
+ : sign ? ui64_fromNegOverflow : ui64_fromPosOverflow;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ z = sig>>shiftDist;
+ if ( exact && (z<
+#include
+#include "platform.h"
+#include "internals.h"
+#include "softfloat.h"
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+void
+ f128M_add( const float128_t *aPtr, const float128_t *bPtr, float128_t *zPtr )
+{
+ const uint64_t *aWPtr, *bWPtr;
+ uint_fast64_t uiA64, uiA0;
+ bool signA;
+ uint_fast64_t uiB64, uiB0;
+ bool signB;
+#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 2)
+ float128_t
+ (*magsFuncPtr)(
+ uint_fast64_t, uint_fast64_t, uint_fast64_t, uint_fast64_t, bool );
+#endif
+
+ aWPtr = (const uint64_t *) aPtr;
+ bWPtr = (const uint64_t *) bPtr;
+ uiA64 = aWPtr[indexWord( 2, 1 )];
+ uiA0 = aWPtr[indexWord( 2, 0 )];
+ signA = signF128UI64( uiA64 );
+ uiB64 = bWPtr[indexWord( 2, 1 )];
+ uiB0 = bWPtr[indexWord( 2, 0 )];
+ signB = signF128UI64( uiB64 );
+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)
+ if ( signA == signB ) {
+ *zPtr = softfloat_addMagsF128( uiA64, uiA0, uiB64, uiB0, signA );
+ } else {
+ *zPtr = softfloat_subMagsF128( uiA64, uiA0, uiB64, uiB0, signA );
+ }
+#else
+ magsFuncPtr =
+ (signA == signB) ? softfloat_addMagsF128 : softfloat_subMagsF128;
+ *zPtr = (*magsFuncPtr)( uiA64, uiA0, uiB64, uiB0, signA );
+#endif
+
+}
+
+#else
+
+void
+ f128M_add( const float128_t *aPtr, const float128_t *bPtr, float128_t *zPtr )
+{
+
+ softfloat_addF128M(
+ (const uint32_t *) aPtr,
+ (const uint32_t *) bPtr,
+ (uint32_t *) zPtr,
+ false
+ );
+
+}
+
+#endif
+
diff --git a/softfloat/source/f128M_div.c b/softfloat/source/f128M_div.c
new file mode 100644
index 0000000..8355dc2
--- /dev/null
+++ b/softfloat/source/f128M_div.c
@@ -0,0 +1,187 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+void
+ f128M_div( const float128_t *aPtr, const float128_t *bPtr, float128_t *zPtr )
+{
+
+ *zPtr = f128_div( *aPtr, *bPtr );
+
+}
+
+#else
+
+void
+ f128M_div( const float128_t *aPtr, const float128_t *bPtr, float128_t *zPtr )
+{
+ const uint32_t *aWPtr, *bWPtr;
+ uint32_t *zWPtr, uiA96;
+ bool signA;
+ int32_t expA;
+ uint32_t uiB96;
+ bool signB;
+ int32_t expB;
+ bool signZ;
+ uint32_t y[5], sigB[4];
+ int32_t expZ;
+ uint32_t recip32;
+ int ix;
+ uint64_t q64;
+ uint32_t q, qs[3], uiZ96;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ aWPtr = (const uint32_t *) aPtr;
+ bWPtr = (const uint32_t *) bPtr;
+ zWPtr = (uint32_t *) zPtr;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uiA96 = aWPtr[indexWordHi( 4 )];
+ signA = signF128UI96( uiA96 );
+ expA = expF128UI96( uiA96 );
+ uiB96 = bWPtr[indexWordHi( 4 )];
+ signB = signF128UI96( uiB96 );
+ expB = expF128UI96( uiB96 );
+ signZ = signA ^ signB;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( (expA == 0x7FFF) || (expB == 0x7FFF) ) {
+ if ( softfloat_tryPropagateNaNF128M( aWPtr, bWPtr, zWPtr ) ) return;
+ if ( expA == 0x7FFF ) {
+ if ( expB == 0x7FFF ) goto invalid;
+ goto infinity;
+ }
+ goto zero;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ expA = softfloat_shiftNormSigF128M( aWPtr, 13, y );
+ expB = softfloat_shiftNormSigF128M( bWPtr, 13, sigB );
+ if ( expA == -128 ) {
+ if ( expB == -128 ) goto invalid;
+ goto zero;
+ }
+ if ( expB == -128 ) {
+ softfloat_raiseFlags( softfloat_flag_infinite );
+ goto infinity;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ expZ = expA - expB + 0x3FFE;
+ if ( softfloat_compare128M( y, sigB ) < 0 ) {
+ --expZ;
+ softfloat_add128M( y, y, y );
+ }
+ recip32 =
+ softfloat_approxRecip32_1(
+ ((uint64_t) sigB[indexWord( 4, 3 )]<<32 | sigB[indexWord( 4, 2 )])
+ >>30
+ );
+ ix = 3;
+ for (;;) {
+ q64 = (uint64_t) y[indexWordHi( 4 )] * recip32;
+ q = (q64 + 0x80000000)>>32;
+ --ix;
+ if ( ix < 0 ) break;
+ softfloat_remStep128MBy32( y, 29, sigB, q, y );
+ if ( y[indexWordHi( 4 )] & 0x80000000 ) {
+ --q;
+ softfloat_add128M( y, sigB, y );
+ }
+ qs[ix] = q;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( ((q + 1) & 7) < 2 ) {
+ softfloat_remStep128MBy32( y, 29, sigB, q, y );
+ if ( y[indexWordHi( 4 )] & 0x80000000 ) {
+ --q;
+ softfloat_add128M( y, sigB, y );
+ } else if ( softfloat_compare128M( sigB, y ) <= 0 ) {
+ ++q;
+ softfloat_sub128M( y, sigB, y );
+ }
+ if (
+ y[indexWordLo( 4 )] || y[indexWord( 4, 1 )]
+ || (y[indexWord( 4, 2 )] | y[indexWord( 4, 3 )])
+ ) {
+ q |= 1;
+ }
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ q64 = (uint64_t) q<<28;
+ y[indexWord( 5, 0 )] = q64;
+ q64 = ((uint64_t) qs[0]<<25) + (q64>>32);
+ y[indexWord( 5, 1 )] = q64;
+ q64 = ((uint64_t) qs[1]<<22) + (q64>>32);
+ y[indexWord( 5, 2 )] = q64;
+ q64 = ((uint64_t) qs[2]<<19) + (q64>>32);
+ y[indexWord( 5, 3 )] = q64;
+ y[indexWord( 5, 4 )] = q64>>32;
+ softfloat_roundPackMToF128M( signZ, expZ, y, zWPtr );
+ return;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ invalid:
+ softfloat_invalidF128M( zWPtr );
+ return;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ infinity:
+ uiZ96 = packToF128UI96( signZ, 0x7FFF, 0 );
+ goto uiZ96;
+ zero:
+ uiZ96 = packToF128UI96( signZ, 0, 0 );
+ uiZ96:
+ zWPtr[indexWordHi( 4 )] = uiZ96;
+ zWPtr[indexWord( 4, 2 )] = 0;
+ zWPtr[indexWord( 4, 1 )] = 0;
+ zWPtr[indexWord( 4, 0 )] = 0;
+
+}
+
+#endif
+
diff --git a/softfloat/source/f128M_eq.c b/softfloat/source/f128M_eq.c
new file mode 100644
index 0000000..4f28f5f
--- /dev/null
+++ b/softfloat/source/f128M_eq.c
@@ -0,0 +1,100 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+bool f128M_eq( const float128_t *aPtr, const float128_t *bPtr )
+{
+
+ return f128_eq( *aPtr, *bPtr );
+
+}
+
+#else
+
+bool f128M_eq( const float128_t *aPtr, const float128_t *bPtr )
+{
+ const uint32_t *aWPtr, *bWPtr;
+ uint32_t wordA, wordB, uiA96, uiB96;
+ bool possibleOppositeZeros;
+ uint32_t mashWord;
+
+ aWPtr = (const uint32_t *) aPtr;
+ bWPtr = (const uint32_t *) bPtr;
+ wordA = aWPtr[indexWord( 4, 2 )];
+ wordB = bWPtr[indexWord( 4, 2 )];
+ if ( wordA != wordB ) goto false_checkSigNaNs;
+ uiA96 = aWPtr[indexWordHi( 4 )];
+ uiB96 = bWPtr[indexWordHi( 4 )];
+ possibleOppositeZeros = false;
+ if ( uiA96 != uiB96 ) {
+ possibleOppositeZeros = (((uiA96 | uiB96) & 0x7FFFFFFF) == 0);
+ if ( ! possibleOppositeZeros ) goto false_checkSigNaNs;
+ }
+ mashWord = wordA | wordB;
+ wordA = aWPtr[indexWord( 4, 1 )];
+ wordB = bWPtr[indexWord( 4, 1 )];
+ if ( wordA != wordB ) goto false_checkSigNaNs;
+ mashWord |= wordA | wordB;
+ wordA = aWPtr[indexWord( 4, 0 )];
+ wordB = bWPtr[indexWord( 4, 0 )];
+ if ( wordA != wordB ) goto false_checkSigNaNs;
+ if ( possibleOppositeZeros && ((mashWord | wordA | wordB) != 0) ) {
+ goto false_checkSigNaNs;
+ }
+ if ( ! softfloat_isNaNF128M( aWPtr ) && ! softfloat_isNaNF128M( bWPtr ) ) {
+ return true;
+ }
+ false_checkSigNaNs:
+ if (
+ f128M_isSignalingNaN( (const float128_t *) aWPtr )
+ || f128M_isSignalingNaN( (const float128_t *) bWPtr )
+ ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ return false;
+
+}
+
+#endif
+
diff --git a/softfloat/source/f128M_eq_signaling.c b/softfloat/source/f128M_eq_signaling.c
new file mode 100644
index 0000000..d2ea5f4
--- /dev/null
+++ b/softfloat/source/f128M_eq_signaling.c
@@ -0,0 +1,92 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+bool f128M_eq_signaling( const float128_t *aPtr, const float128_t *bPtr )
+{
+
+ return f128_eq_signaling( *aPtr, *bPtr );
+
+}
+
+#else
+
+bool f128M_eq_signaling( const float128_t *aPtr, const float128_t *bPtr )
+{
+ const uint32_t *aWPtr, *bWPtr;
+ uint32_t wordA, wordB, uiA96, uiB96;
+ bool possibleOppositeZeros;
+ uint32_t mashWord;
+
+ aWPtr = (const uint32_t *) aPtr;
+ bWPtr = (const uint32_t *) bPtr;
+ if ( softfloat_isNaNF128M( aWPtr ) || softfloat_isNaNF128M( bWPtr ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ return false;
+ }
+ wordA = aWPtr[indexWord( 4, 2 )];
+ wordB = bWPtr[indexWord( 4, 2 )];
+ if ( wordA != wordB ) return false;
+ uiA96 = aWPtr[indexWordHi( 4 )];
+ uiB96 = bWPtr[indexWordHi( 4 )];
+ possibleOppositeZeros = false;
+ if ( uiA96 != uiB96 ) {
+ possibleOppositeZeros = (((uiA96 | uiB96) & 0x7FFFFFFF) == 0);
+ if ( ! possibleOppositeZeros ) return false;
+ }
+ mashWord = wordA | wordB;
+ wordA = aWPtr[indexWord( 4, 1 )];
+ wordB = bWPtr[indexWord( 4, 1 )];
+ if ( wordA != wordB ) return false;
+ mashWord |= wordA | wordB;
+ wordA = aWPtr[indexWord( 4, 0 )];
+ wordB = bWPtr[indexWord( 4, 0 )];
+ return
+ (wordA == wordB)
+ && (! possibleOppositeZeros || ((mashWord | wordA | wordB) == 0));
+
+}
+
+#endif
+
diff --git a/softfloat/source/f128M_le.c b/softfloat/source/f128M_le.c
new file mode 100644
index 0000000..af1dcba
--- /dev/null
+++ b/softfloat/source/f128M_le.c
@@ -0,0 +1,93 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "softfloat.h"
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+bool f128M_le( const float128_t *aPtr, const float128_t *bPtr )
+{
+
+ return f128_le( *aPtr, *bPtr );
+
+}
+
+#else
+
+bool f128M_le( const float128_t *aPtr, const float128_t *bPtr )
+{
+ const uint32_t *aWPtr, *bWPtr;
+ uint32_t uiA96, uiB96;
+ bool signA, signB;
+ uint32_t wordA, wordB;
+
+ aWPtr = (const uint32_t *) aPtr;
+ bWPtr = (const uint32_t *) bPtr;
+ if ( softfloat_isNaNF128M( aWPtr ) || softfloat_isNaNF128M( bWPtr ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ return false;
+ }
+ uiA96 = aWPtr[indexWordHi( 4 )];
+ uiB96 = bWPtr[indexWordHi( 4 )];
+ signA = signF128UI96( uiA96 );
+ signB = signF128UI96( uiB96 );
+ if ( signA != signB ) {
+ if ( signA ) return true;
+ if ( (uiA96 | uiB96) & 0x7FFFFFFF ) return false;
+ wordA = aWPtr[indexWord( 4, 2 )];
+ wordB = bWPtr[indexWord( 4, 2 )];
+ if ( wordA | wordB ) return false;
+ wordA = aWPtr[indexWord( 4, 1 )];
+ wordB = bWPtr[indexWord( 4, 1 )];
+ if ( wordA | wordB ) return false;
+ wordA = aWPtr[indexWord( 4, 0 )];
+ wordB = bWPtr[indexWord( 4, 0 )];
+ return ((wordA | wordB) == 0);
+ }
+ if ( signA ) {
+ aWPtr = (const uint32_t *) bPtr;
+ bWPtr = (const uint32_t *) aPtr;
+ }
+ return (softfloat_compare128M( aWPtr, bWPtr ) <= 0);
+
+}
+
+#endif
+
diff --git a/softfloat/source/f128M_le_quiet.c b/softfloat/source/f128M_le_quiet.c
new file mode 100644
index 0000000..0d051b6
--- /dev/null
+++ b/softfloat/source/f128M_le_quiet.c
@@ -0,0 +1,96 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+bool f128M_le_quiet( const float128_t *aPtr, const float128_t *bPtr )
+{
+
+ return f128_le_quiet( *aPtr, *bPtr );
+
+}
+
+#else
+
+bool f128M_le_quiet( const float128_t *aPtr, const float128_t *bPtr )
+{
+ const uint32_t *aWPtr, *bWPtr;
+ uint32_t uiA96, uiB96;
+ bool signA, signB;
+ uint32_t wordA, wordB;
+
+ aWPtr = (const uint32_t *) aPtr;
+ bWPtr = (const uint32_t *) bPtr;
+ if ( softfloat_isNaNF128M( aWPtr ) || softfloat_isNaNF128M( bWPtr ) ) {
+ if ( f128M_isSignalingNaN( aPtr ) || f128M_isSignalingNaN( bPtr ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ return false;
+ }
+ uiA96 = aWPtr[indexWordHi( 4 )];
+ uiB96 = bWPtr[indexWordHi( 4 )];
+ signA = signF128UI96( uiA96 );
+ signB = signF128UI96( uiB96 );
+ if ( signA != signB ) {
+ if ( signA ) return true;
+ if ( (uiA96 | uiB96) & 0x7FFFFFFF ) return false;
+ wordA = aWPtr[indexWord( 4, 2 )];
+ wordB = bWPtr[indexWord( 4, 2 )];
+ if ( wordA | wordB ) return false;
+ wordA = aWPtr[indexWord( 4, 1 )];
+ wordB = bWPtr[indexWord( 4, 1 )];
+ if ( wordA | wordB ) return false;
+ wordA = aWPtr[indexWord( 4, 0 )];
+ wordB = bWPtr[indexWord( 4, 0 )];
+ return ((wordA | wordB) == 0);
+ }
+ if ( signA ) {
+ aWPtr = (const uint32_t *) bPtr;
+ bWPtr = (const uint32_t *) aPtr;
+ }
+ return (softfloat_compare128M( aWPtr, bWPtr ) <= 0);
+
+}
+
+#endif
+
diff --git a/softfloat/source/f128M_lt.c b/softfloat/source/f128M_lt.c
new file mode 100644
index 0000000..64ff9b4
--- /dev/null
+++ b/softfloat/source/f128M_lt.c
@@ -0,0 +1,93 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "softfloat.h"
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+bool f128M_lt( const float128_t *aPtr, const float128_t *bPtr )
+{
+
+ return f128_lt( *aPtr, *bPtr );
+
+}
+
+#else
+
+bool f128M_lt( const float128_t *aPtr, const float128_t *bPtr )
+{
+ const uint32_t *aWPtr, *bWPtr;
+ uint32_t uiA96, uiB96;
+ bool signA, signB;
+ uint32_t wordA, wordB;
+
+ aWPtr = (const uint32_t *) aPtr;
+ bWPtr = (const uint32_t *) bPtr;
+ if ( softfloat_isNaNF128M( aWPtr ) || softfloat_isNaNF128M( bWPtr ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ return false;
+ }
+ uiA96 = aWPtr[indexWordHi( 4 )];
+ uiB96 = bWPtr[indexWordHi( 4 )];
+ signA = signF128UI96( uiA96 );
+ signB = signF128UI96( uiB96 );
+ if ( signA != signB ) {
+ if ( signB ) return false;
+ if ( (uiA96 | uiB96) & 0x7FFFFFFF ) return true;
+ wordA = aWPtr[indexWord( 4, 2 )];
+ wordB = bWPtr[indexWord( 4, 2 )];
+ if ( wordA | wordB ) return true;
+ wordA = aWPtr[indexWord( 4, 1 )];
+ wordB = bWPtr[indexWord( 4, 1 )];
+ if ( wordA | wordB ) return true;
+ wordA = aWPtr[indexWord( 4, 0 )];
+ wordB = bWPtr[indexWord( 4, 0 )];
+ return ((wordA | wordB) != 0);
+ }
+ if ( signA ) {
+ aWPtr = (const uint32_t *) bPtr;
+ bWPtr = (const uint32_t *) aPtr;
+ }
+ return (softfloat_compare128M( aWPtr, bWPtr ) < 0);
+
+}
+
+#endif
+
diff --git a/softfloat/source/f128M_lt_quiet.c b/softfloat/source/f128M_lt_quiet.c
new file mode 100644
index 0000000..6ccf3c8
--- /dev/null
+++ b/softfloat/source/f128M_lt_quiet.c
@@ -0,0 +1,96 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+bool f128M_lt_quiet( const float128_t *aPtr, const float128_t *bPtr )
+{
+
+ return f128_lt_quiet( *aPtr, *bPtr );
+
+}
+
+#else
+
+bool f128M_lt_quiet( const float128_t *aPtr, const float128_t *bPtr )
+{
+ const uint32_t *aWPtr, *bWPtr;
+ uint32_t uiA96, uiB96;
+ bool signA, signB;
+ uint32_t wordA, wordB;
+
+ aWPtr = (const uint32_t *) aPtr;
+ bWPtr = (const uint32_t *) bPtr;
+ if ( softfloat_isNaNF128M( aWPtr ) || softfloat_isNaNF128M( bWPtr ) ) {
+ if ( f128M_isSignalingNaN( aPtr ) || f128M_isSignalingNaN( bPtr ) ) {
+ softfloat_raiseFlags( softfloat_flag_invalid );
+ }
+ return false;
+ }
+ uiA96 = aWPtr[indexWordHi( 4 )];
+ uiB96 = bWPtr[indexWordHi( 4 )];
+ signA = signF128UI96( uiA96 );
+ signB = signF128UI96( uiB96 );
+ if ( signA != signB ) {
+ if ( signB ) return false;
+ if ( (uiA96 | uiB96) & 0x7FFFFFFF ) return true;
+ wordA = aWPtr[indexWord( 4, 2 )];
+ wordB = bWPtr[indexWord( 4, 2 )];
+ if ( wordA | wordB ) return true;
+ wordA = aWPtr[indexWord( 4, 1 )];
+ wordB = bWPtr[indexWord( 4, 1 )];
+ if ( wordA | wordB ) return true;
+ wordA = aWPtr[indexWord( 4, 0 )];
+ wordB = bWPtr[indexWord( 4, 0 )];
+ return ((wordA | wordB) != 0);
+ }
+ if ( signA ) {
+ aWPtr = (const uint32_t *) bPtr;
+ bWPtr = (const uint32_t *) aPtr;
+ }
+ return (softfloat_compare128M( aWPtr, bWPtr ) < 0);
+
+}
+
+#endif
+
diff --git a/softfloat/source/f128M_mul.c b/softfloat/source/f128M_mul.c
new file mode 100644
index 0000000..f2d6051
--- /dev/null
+++ b/softfloat/source/f128M_mul.c
@@ -0,0 +1,158 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+void
+ f128M_mul( const float128_t *aPtr, const float128_t *bPtr, float128_t *zPtr )
+{
+
+ *zPtr = f128_mul( *aPtr, *bPtr );
+
+}
+
+#else
+
+void
+ f128M_mul( const float128_t *aPtr, const float128_t *bPtr, float128_t *zPtr )
+{
+ const uint32_t *aWPtr, *bWPtr;
+ uint32_t *zWPtr;
+ uint32_t uiA96;
+ int32_t expA;
+ uint32_t uiB96;
+ int32_t expB;
+ bool signZ;
+ const uint32_t *ptr;
+ uint32_t uiZ96, sigA[4];
+ uint_fast8_t shiftDist;
+ uint32_t sigB[4];
+ int32_t expZ;
+ uint32_t sigProd[8], *extSigZPtr;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ aWPtr = (const uint32_t *) aPtr;
+ bWPtr = (const uint32_t *) bPtr;
+ zWPtr = (uint32_t *) zPtr;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uiA96 = aWPtr[indexWordHi( 4 )];
+ expA = expF128UI96( uiA96 );
+ uiB96 = bWPtr[indexWordHi( 4 )];
+ expB = expF128UI96( uiB96 );
+ signZ = signF128UI96( uiA96 ) ^ signF128UI96( uiB96 );
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( (expA == 0x7FFF) || (expB == 0x7FFF) ) {
+ if ( softfloat_tryPropagateNaNF128M( aWPtr, bWPtr, zWPtr ) ) return;
+ ptr = aWPtr;
+ if ( ! expA ) goto possiblyInvalid;
+ if ( ! expB ) {
+ ptr = bWPtr;
+ possiblyInvalid:
+ if (
+ ! fracF128UI96( ptr[indexWordHi( 4 )] )
+ && ! (ptr[indexWord( 4, 2 )] | ptr[indexWord( 4, 1 )]
+ | ptr[indexWord( 4, 0 )])
+ ) {
+ softfloat_invalidF128M( zWPtr );
+ return;
+ }
+ }
+ uiZ96 = packToF128UI96( signZ, 0x7FFF, 0 );
+ goto uiZ96;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( expA ) {
+ sigA[indexWordHi( 4 )] = fracF128UI96( uiA96 ) | 0x00010000;
+ sigA[indexWord( 4, 2 )] = aWPtr[indexWord( 4, 2 )];
+ sigA[indexWord( 4, 1 )] = aWPtr[indexWord( 4, 1 )];
+ sigA[indexWord( 4, 0 )] = aWPtr[indexWord( 4, 0 )];
+ } else {
+ expA = softfloat_shiftNormSigF128M( aWPtr, 0, sigA );
+ if ( expA == -128 ) goto zero;
+ }
+ if ( expB ) {
+ sigB[indexWordHi( 4 )] = fracF128UI96( uiB96 ) | 0x00010000;
+ sigB[indexWord( 4, 2 )] = bWPtr[indexWord( 4, 2 )];
+ sigB[indexWord( 4, 1 )] = bWPtr[indexWord( 4, 1 )];
+ sigB[indexWord( 4, 0 )] = bWPtr[indexWord( 4, 0 )];
+ } else {
+ expB = softfloat_shiftNormSigF128M( bWPtr, 0, sigB );
+ if ( expB == -128 ) goto zero;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ expZ = expA + expB - 0x4000;
+ softfloat_mul128MTo256M( sigA, sigB, sigProd );
+ if (
+ sigProd[indexWord( 8, 2 )]
+ || (sigProd[indexWord( 8, 1 )] | sigProd[indexWord( 8, 0 )])
+ ) {
+ sigProd[indexWord( 8, 3 )] |= 1;
+ }
+ extSigZPtr = &sigProd[indexMultiwordHi( 8, 5 )];
+ shiftDist = 16;
+ if ( extSigZPtr[indexWordHi( 5 )] & 2 ) {
+ ++expZ;
+ shiftDist = 15;
+ }
+ softfloat_shortShiftLeft160M( extSigZPtr, shiftDist, extSigZPtr );
+ softfloat_roundPackMToF128M( signZ, expZ, extSigZPtr, zWPtr );
+ return;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ zero:
+ uiZ96 = packToF128UI96( signZ, 0, 0 );
+ uiZ96:
+ zWPtr[indexWordHi( 4 )] = uiZ96;
+ zWPtr[indexWord( 4, 2 )] = 0;
+ zWPtr[indexWord( 4, 1 )] = 0;
+ zWPtr[indexWord( 4, 0 )] = 0;
+
+}
+
+#endif
+
diff --git a/softfloat/source/f128M_mulAdd.c b/softfloat/source/f128M_mulAdd.c
new file mode 100644
index 0000000..e2f95df
--- /dev/null
+++ b/softfloat/source/f128M_mulAdd.c
@@ -0,0 +1,92 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include "platform.h"
+#include "internals.h"
+#include "softfloat.h"
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+void
+ f128M_mulAdd(
+ const float128_t *aPtr,
+ const float128_t *bPtr,
+ const float128_t *cPtr,
+ float128_t *zPtr
+ )
+{
+ const uint64_t *aWPtr, *bWPtr, *cWPtr;
+ uint_fast64_t uiA64, uiA0;
+ uint_fast64_t uiB64, uiB0;
+ uint_fast64_t uiC64, uiC0;
+
+ aWPtr = (const uint64_t *) aPtr;
+ bWPtr = (const uint64_t *) bPtr;
+ cWPtr = (const uint64_t *) cPtr;
+ uiA64 = aWPtr[indexWord( 2, 1 )];
+ uiA0 = aWPtr[indexWord( 2, 0 )];
+ uiB64 = bWPtr[indexWord( 2, 1 )];
+ uiB0 = bWPtr[indexWord( 2, 0 )];
+ uiC64 = cWPtr[indexWord( 2, 1 )];
+ uiC0 = cWPtr[indexWord( 2, 0 )];
+ *zPtr = softfloat_mulAddF128( uiA64, uiA0, uiB64, uiB0, uiC64, uiC0, 0 );
+
+}
+
+#else
+
+void
+ f128M_mulAdd(
+ const float128_t *aPtr,
+ const float128_t *bPtr,
+ const float128_t *cPtr,
+ float128_t *zPtr
+ )
+{
+
+ softfloat_mulAddF128M(
+ (const uint32_t *) aPtr,
+ (const uint32_t *) bPtr,
+ (const uint32_t *) cPtr,
+ (uint32_t *) zPtr,
+ 0
+ );
+
+}
+
+#endif
+
diff --git a/softfloat/source/f128M_rem.c b/softfloat/source/f128M_rem.c
new file mode 100644
index 0000000..645ec99
--- /dev/null
+++ b/softfloat/source/f128M_rem.c
@@ -0,0 +1,182 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+void
+ f128M_rem( const float128_t *aPtr, const float128_t *bPtr, float128_t *zPtr )
+{
+
+ *zPtr = f128_rem( *aPtr, *bPtr );
+
+}
+
+#else
+
+void
+ f128M_rem( const float128_t *aPtr, const float128_t *bPtr, float128_t *zPtr )
+{
+ const uint32_t *aWPtr, *bWPtr;
+ uint32_t *zWPtr, uiA96;
+ int32_t expA, expB;
+ uint32_t x[4], rem1[5], *remPtr;
+ bool signRem;
+ int32_t expDiff;
+ uint32_t q, recip32;
+ uint64_t q64;
+ uint32_t rem2[5], *altRemPtr, *newRemPtr, wordMeanRem;
+
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ aWPtr = (const uint32_t *) aPtr;
+ bWPtr = (const uint32_t *) bPtr;
+ zWPtr = (uint32_t *) zPtr;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ uiA96 = aWPtr[indexWordHi( 4 )];
+ expA = expF128UI96( uiA96 );
+ expB = expF128UI96( bWPtr[indexWordHi( 4 )] );
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( (expA == 0x7FFF) || (expB == 0x7FFF) ) {
+ if ( softfloat_tryPropagateNaNF128M( aWPtr, bWPtr, zWPtr ) ) return;
+ if ( expA == 0x7FFF ) goto invalid;
+ goto copyA;
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ if ( expA < expB - 1 ) goto copyA;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ expB = softfloat_shiftNormSigF128M( bWPtr, 13, x );
+ if ( expB == -128 ) goto invalid;
+ remPtr = &rem1[indexMultiwordLo( 5, 4 )];
+ expA = softfloat_shiftNormSigF128M( aWPtr, 13, remPtr );
+ if ( expA == -128 ) goto copyA;
+ signRem = signF128UI96( uiA96 );
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ expDiff = expA - expB;
+ if ( expDiff < 1 ) {
+ if ( expDiff < -1 ) goto copyA;
+ if ( expDiff ) {
+ --expB;
+ softfloat_add128M( x, x, x );
+ q = 0;
+ } else {
+ q = (softfloat_compare128M( x, remPtr ) <= 0);
+ if ( q ) softfloat_sub128M( remPtr, x, remPtr );
+ }
+ } else {
+ recip32 =
+ softfloat_approxRecip32_1(
+ ((uint64_t) x[indexWord( 4, 3 )]<<32 | x[indexWord( 4, 2 )])
+ >>30
+ );
+ expDiff -= 30;
+ for (;;) {
+ q64 = (uint64_t) remPtr[indexWordHi( 4 )] * recip32;
+ if ( expDiff < 0 ) break;
+ q = (q64 + 0x80000000)>>32;
+ softfloat_remStep128MBy32( remPtr, 29, x, q, remPtr );
+ if ( remPtr[indexWordHi( 4 )] & 0x80000000 ) {
+ softfloat_add128M( remPtr, x, remPtr );
+ }
+ expDiff -= 29;
+ }
+ /*--------------------------------------------------------------------
+ | (`expDiff' cannot be less than -29 here.)
+ *--------------------------------------------------------------------*/
+ q = (uint32_t) (q64>>32)>>(~expDiff & 31);
+ softfloat_remStep128MBy32( remPtr, expDiff + 30, x, q, remPtr );
+ if ( remPtr[indexWordHi( 4 )] & 0x80000000 ) {
+ altRemPtr = &rem2[indexMultiwordLo( 5, 4 )];
+ softfloat_add128M( remPtr, x, altRemPtr );
+ goto selectRem;
+ }
+ }
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ altRemPtr = &rem2[indexMultiwordLo( 5, 4 )];
+ do {
+ ++q;
+ newRemPtr = altRemPtr;
+ softfloat_sub128M( remPtr, x, newRemPtr );
+ altRemPtr = remPtr;
+ remPtr = newRemPtr;
+ } while ( ! (remPtr[indexWordHi( 4 )] & 0x80000000) );
+ selectRem:
+ softfloat_add128M( remPtr, altRemPtr, x );
+ wordMeanRem = x[indexWordHi( 4 )];
+ if (
+ (wordMeanRem & 0x80000000)
+ || (! wordMeanRem && (q & 1) && ! x[indexWord( 4, 0 )]
+ && ! (x[indexWord( 4, 2 )] | x[indexWord( 4, 1 )]))
+ ) {
+ remPtr = altRemPtr;
+ }
+ if ( remPtr[indexWordHi( 4 )] & 0x80000000 ) {
+ signRem = ! signRem;
+ softfloat_negX128M( remPtr );
+ }
+ remPtr -= indexMultiwordLo( 5, 4 );
+ remPtr[indexWordHi( 5 )] = 0;
+ softfloat_normRoundPackMToF128M( signRem, expB + 18, remPtr, zWPtr );
+ return;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ invalid:
+ softfloat_invalidF128M( zWPtr );
+ return;
+ /*------------------------------------------------------------------------
+ *------------------------------------------------------------------------*/
+ copyA:
+ zWPtr[indexWordHi( 4 )] = uiA96;
+ zWPtr[indexWord( 4, 2 )] = aWPtr[indexWord( 4, 2 )];
+ zWPtr[indexWord( 4, 1 )] = aWPtr[indexWord( 4, 1 )];
+ zWPtr[indexWord( 4, 0 )] = aWPtr[indexWord( 4, 0 )];
+
+}
+
+#endif
+
diff --git a/softfloat/source/f128M_roundToInt.c b/softfloat/source/f128M_roundToInt.c
new file mode 100644
index 0000000..c467126
--- /dev/null
+++ b/softfloat/source/f128M_roundToInt.c
@@ -0,0 +1,223 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of
+California. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include
+#include