From: Rob Clark Date: Thu, 2 May 2019 16:37:21 +0000 (-0700) Subject: freedreno/ir3: add some ubo range related asserts X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ca3eb5db665cbcc2de5a5d3158e3dc68f86e5822;p=mesa.git freedreno/ir3: add some ubo range related asserts And a comment.. since we are mixing units of bytes/dwords/vec4, hopefully this will avoid some unit confusion. Signed-off-by: Rob Clark --- diff --git a/src/freedreno/ir3/ir3_context.c b/src/freedreno/ir3/ir3_context.c index f822e9e13e9..da1e148e37a 100644 --- a/src/freedreno/ir3/ir3_context.c +++ b/src/freedreno/ir3/ir3_context.c @@ -123,7 +123,10 @@ ir3_context_init(struct ir3_compiler *compiler, * * Immediates go last mostly because they are inserted in the CP pass * after the nir -> ir3 frontend. + * + * Note UBO size in bytes should be aligned to vec4 */ + debug_assert((ctx->so->shader->ubo_state.size % 16) == 0); unsigned constoff = align(ctx->so->shader->ubo_state.size / 16, 4); unsigned ptrsz = ir3_pointer_size(ctx); diff --git a/src/freedreno/ir3/ir3_shader.c b/src/freedreno/ir3/ir3_shader.c index 46eba2a0c5e..d1d748813af 100644 --- a/src/freedreno/ir3/ir3_shader.c +++ b/src/freedreno/ir3/ir3_shader.c @@ -131,7 +131,8 @@ void * ir3_shader_assemble(struct ir3_shader_variant *v, uint32_t gpu_id) * the compiler (to worst-case value) since we don't know in * the assembler what the max addr reg value can be: */ - v->constlen = MIN2(255, MAX2(v->constlen, v->info.max_const + 1)); + v->constlen = MAX2(v->constlen, v->info.max_const + 1); + debug_assert(v->constlen < 256); fixup_regfootprint(v, gpu_id); diff --git a/src/gallium/drivers/freedreno/ir3/ir3_gallium.c b/src/gallium/drivers/freedreno/ir3/ir3_gallium.c index 65fb7565de1..0f4427f3028 100644 --- a/src/gallium/drivers/freedreno/ir3/ir3_gallium.c +++ b/src/gallium/drivers/freedreno/ir3/ir3_gallium.c @@ -265,10 +265,13 @@ emit_user_consts(struct fd_context *ctx, const struct ir3_shader_variant *v, if (state->range[i].start < state->range[i].end && constbuf->enabled_mask & (1 << i)) { + uint32_t size = state->range[i].end - state->range[i].start; + uint32_t offset = cb->buffer_offset + state->range[i].start; + debug_assert((state->range[i].offset % 16) == 0); + debug_assert((size % 16) == 0); + debug_assert((offset % 16) == 0); ctx->emit_const(ring, v->type, state->range[i].offset / 4, - cb->buffer_offset + state->range[i].start, - (state->range[i].end - state->range[i].start) / 4, - cb->user_buffer, cb->buffer); + offset, size / 4, cb->user_buffer, cb->buffer); } } }