From: Andrew Waterman <waterman@cs.berkeley.edu>
Date: Wed, 13 Jan 2016 00:12:21 +0000 (-0800)
Subject: don't ignore data value when writing MIPI
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ca7ea7e8205ef31e5569066885cdf4b07c104f8b;p=riscv-isa-sim.git

don't ignore data value when writing MIPI
---

diff --git a/riscv/processor.cc b/riscv/processor.cc
index 3206ed0..8347b9d 100644
--- a/riscv/processor.cc
+++ b/riscv/processor.cc
@@ -329,7 +329,7 @@ void processor_t::set_csr(int which, reg_t val)
       break;
     }
     case CSR_MIPI: {
-      state.mip |= MIP_MSIP;
+      state.mip = set_field(state.mip, MIP_MSIP, val & 1);
       break;
     }
     case CSR_MIE: {