From: Eddie Hung <eddieh@ece.ubc.ca>
Date: Thu, 21 Feb 2019 21:15:45 +0000 (-0800)
Subject: Revert "tests/simple to also do LUT synth"
X-Git-Tag: working-ls180~1237^2~276
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ca870688c33f7a71eea78709d85a069957966ba6;p=yosys.git

Revert "tests/simple to also do LUT synth"

This reverts commit 5994382a20a0b7e890d22d032eecb39b61e0b3ce.
---

diff --git a/tests/tools/autotest.sh b/tests/tools/autotest.sh
index 2b8e60200..13c25432f 100755
--- a/tests/tools/autotest.sh
+++ b/tests/tools/autotest.sh
@@ -178,7 +178,6 @@ do
 		else
 			test_passes -f "$frontend $include_opts" -p "hierarchy; proc; opt; memory; opt; fsm; opt -full -fine" ${bn}_ref.v
 			test_passes -f "$frontend $include_opts" -p "hierarchy; synth -run coarse; techmap; opt; abc -dff" ${bn}_ref.v
-			test_passes -f "$frontend $include_opts" -p "hierarchy; synth -run coarse; techmap; opt; abc -lut 4" ${bn}_ref.v
 			if [ -n "$firrtl2verilog" ]; then
 			    if test -z "$xfirrtl" || ! grep "$fn" "$xfirrtl" ; then
 				"$toolsdir"/../../yosys -b "firrtl" -o ${bn}_ref.fir -f "$frontend $include_opts" -p "prep -nordff; proc; opt; memory; opt; fsm; opt -full -fine; pmuxtree" ${bn}_ref.v