From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sat, 3 Nov 2018 10:32:14 +0000 (+0000)
Subject: add sv shape CSRs
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ca93e02472d60119a12f6936ad217d6cbe7c5c5b;p=riscv-isa-sim.git

add sv shape CSRs
---

diff --git a/riscv/processor.cc b/riscv/processor.cc
index 83e02bb..eeb7c5e 100644
--- a/riscv/processor.cc
+++ b/riscv/processor.cc
@@ -524,6 +524,20 @@ void processor_t::set_csr(int which, reg_t val)
       state.remap[2].shape = get_field(val, SV_REMAP_SHAPE2);
       break;
     }
+    case CSR_USHAPE0:
+    case CSR_USHAPE1:
+    case CSR_USHAPE2:
+    {
+      int shapeidx = which - CSR_USHAPE0;
+      state.shape[shapeidx].xsz = get_field(val, SV_SHAPE_XDIM);
+      state.shape[shapeidx].ysz = get_field(val, SV_SHAPE_YDIM);
+      state.shape[shapeidx].zsz = get_field(val, SV_SHAPE_ZDIM);
+      state.shape[shapeidx].offs = (get_field(val, (1<<7 )) ? 0x1 : 0) |
+                                   (get_field(val, (1<<15)) ? 0x2 : 0) |
+                                   (get_field(val, (1<<23)) ? 0x4 : 0);
+      state.shape[shapeidx].permute = get_field(val, SV_SHAPE_PERM);
+      break;
+    }
 #endif
     case CSR_FFLAGS:
       dirty_fp_state;
@@ -776,6 +790,10 @@ reg_t processor_t::get_csr(int which)
       return 0;// XXX TODO: return correct entry
     case CSR_UREMAP:
       return 0;// XXX TODO: return correct entry
+    case CSR_USHAPE0:
+    case CSR_USHAPE1:
+    case CSR_USHAPE2:
+      return 0;// XXX TODO: return correct entry
 #endif
     case CSR_FFLAGS:
       require_fp;
diff --git a/riscv/sv.h b/riscv/sv.h
index 87c1ad3..60e9b8d 100644
--- a/riscv/sv.h
+++ b/riscv/sv.h
@@ -90,5 +90,9 @@ typedef struct {
 #define SV_REMAP_SHAPE0 (0x3<<24)
 #define SV_REMAP_SHAPE1 (0x3<<26)
 #define SV_REMAP_SHAPE2 (0x3<<28)
+#define SV_SHAPE_XDIM (0x7f)
+#define SV_SHAPE_YDIM (0x7f<<8)
+#define SV_SHAPE_ZDIM (0x7f<<16)
+#define SV_SHAPE_PERM (0x7<<24)
 
 #endif