From: Luke Kenneth Casson Leighton Date: Thu, 17 Jun 2021 14:47:19 +0000 (+0100) Subject: shuffle comments X-Git-Tag: xlen-bcd~436 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=caa636688159e5d07a812d330a9cc3d75ebffd9d;p=openpower-isa.git shuffle comments --- diff --git a/src/openpower/sv/svp64.py b/src/openpower/sv/svp64.py index b57ce780..634687e2 100644 --- a/src/openpower/sv/svp64.py +++ b/src/openpower/sv/svp64.py @@ -1,25 +1,29 @@ # SPDX-License-Identifier: LGPLv3+ # Copyright (C) 2021 Luke Kenneth Casson Leighton # Funded by NLnet http://nlnet.nl -"""SVP64 RM (Remap) Record. +"""SVP64 Data Structures -https://libre-soc.org/openpower/sv/svp64/ - -| Field Name | Field bits | Description | -|-------------|------------|----------------------------------------| -| MASKMODE | `0` | Execution (predication) Mask Kind | -| MASK | `1:3` | Execution Mask | -| ELWIDTH | `4:5` | Element Width | -| ELWIDTH_SRC | `6:7` | Element Width for Source | -| SUBVL | `8:9` | Sub-vector length | -| EXTRA | `10:18` | context-dependent extra | -| MODE | `19:23` | changes Vector behaviour | +For full spec see https://libre-soc.org/openpower/sv/ """ from nmigen import Record # in nMigen, Record begins at the LSB and fills upwards class SVP64Rec(Record): + """SVP64 RM (Remap) Record. + + https://libre-soc.org/openpower/sv/svp64/ + + | Field Name | Field bits | Description | + |-------------|------------|----------------------------------------| + | MASKMODE | `0` | Execution (predication) Mask Kind | + | MASK | `1:3` | Execution Mask | + | ELWIDTH | `4:5` | Element Width | + | ELWIDTH_SRC | `6:7` | Element Width for Source | + | SUBVL | `8:9` | Sub-vector length | + | EXTRA | `10:18` | context-dependent extra | + | MODE | `19:23` | changes Vector behaviour | + """ def __init__(self, name=None): Record.__init__(self, layout=[("mode" , 5), ("extra" , 9),