From: Gabe Black Date: Tue, 18 Aug 2020 08:16:30 +0000 (-0700) Subject: arch,cpu,sim: Get rid of the microcode ROM stub code. X-Git-Tag: v20.1.0.0~244 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=cac49d4e4709f869603380efcd009b73e9a41c88;p=gem5.git arch,cpu,sim: Get rid of the microcode ROM stub code. This code, including a switching header file, is no longer necessary because ROM based microops are now handled by the decoder itself. Change-Id: Ie3ea4a7371dec22993ede80e2acd1df7cd1ecf59 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32899 Reviewed-by: Andreas Sandberg Maintainer: Andreas Sandberg Tested-by: kokoro --- diff --git a/src/arch/SConscript b/src/arch/SConscript index 89c89c1e3..12e605ff8 100644 --- a/src/arch/SConscript +++ b/src/arch/SConscript @@ -61,7 +61,6 @@ env.SwitchingHeaders( isa.hh isa_traits.hh locked_mem.hh - microcode_rom.hh pseudo_inst.hh registers.hh remote_gdb.hh diff --git a/src/arch/arm/microcode_rom.hh b/src/arch/arm/microcode_rom.hh deleted file mode 100644 index 1584af439..000000000 --- a/src/arch/arm/microcode_rom.hh +++ /dev/null @@ -1,39 +0,0 @@ -/* - * Copyright (c) 2008 The Regents of The University of Michigan - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer; - * redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution; - * neither the name of the copyright holders nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef __ARCH_ARM_MICROCODE_ROM_HH__ -#define __ARCH_ARM_MICROCODE_ROM_HH__ - -#include "sim/microcode_rom.hh" - -namespace ArmISA -{ - using ::MicrocodeRom; -} - -#endif // __ARCH_ARM_MICROCODE_ROM_HH__ diff --git a/src/arch/mips/microcode_rom.hh b/src/arch/mips/microcode_rom.hh deleted file mode 100644 index ae273c747..000000000 --- a/src/arch/mips/microcode_rom.hh +++ /dev/null @@ -1,39 +0,0 @@ -/* - * Copyright (c) 2008 The Regents of The University of Michigan - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer; - * redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution; - * neither the name of the copyright holders nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef __ARCH_MIPS_MICROCODE_ROM_HH__ -#define __ARCH_MIPS_MICROCODE_ROM_HH__ - -#include "sim/microcode_rom.hh" - -namespace MipsISA -{ - using ::MicrocodeRom; -} - -#endif // __ARCH_MIPS_MICROCODE_ROM_HH__ diff --git a/src/arch/power/microcode_rom.hh b/src/arch/power/microcode_rom.hh deleted file mode 100644 index 97a5d752c..000000000 --- a/src/arch/power/microcode_rom.hh +++ /dev/null @@ -1,42 +0,0 @@ -/* - * Copyright (c) 2008 The Regents of The University of Michigan - * Copyright (c) 2009 The University of Edinburgh - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer; - * redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution; - * neither the name of the copyright holders nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef __ARCH_POWER_MICROCODE_ROM_HH__ -#define __ARCH_POWER_MICROCODE_ROM_HH__ - -#include "sim/microcode_rom.hh" - -namespace PowerISA -{ - -using ::MicrocodeRom; - -} // namespace PowerISA - -#endif // __ARCH_POWER_MICROCODE_ROM_HH__ diff --git a/src/arch/riscv/microcode_rom.hh b/src/arch/riscv/microcode_rom.hh deleted file mode 100644 index 781c31861..000000000 --- a/src/arch/riscv/microcode_rom.hh +++ /dev/null @@ -1,39 +0,0 @@ -/* - * Copyright (c) 2008 The Regents of The University of Michigan - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer; - * redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution; - * neither the name of the copyright holders nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef __ARCH_RISCV_MICROCODE_ROM_HH__ -#define __ARCH_RISCV_MICROCODE_ROM_HH__ - -#include "sim/microcode_rom.hh" - -namespace RiscvISA -{ - using ::MicrocodeRom; -} - -#endif // __ARCH_RISCV_MICROCODE_ROM_HH__ diff --git a/src/arch/sparc/microcode_rom.hh b/src/arch/sparc/microcode_rom.hh deleted file mode 100644 index 561f9334f..000000000 --- a/src/arch/sparc/microcode_rom.hh +++ /dev/null @@ -1,39 +0,0 @@ -/* - * Copyright (c) 2008 The Regents of The University of Michigan - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer; - * redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution; - * neither the name of the copyright holders nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef __ARCH_SPARC_MICROCODE_ROM_HH__ -#define __ARCH_SPARC_MICROCODE_ROM_HH__ - -#include "sim/microcode_rom.hh" - -namespace SparcISA -{ -using ::MicrocodeRom; -} - -#endif // __ARCH_SPARC_MICROCODE_ROM_HH__ diff --git a/src/cpu/base.hh b/src/cpu/base.hh index 629aaecbd..a00e83dc7 100644 --- a/src/cpu/base.hh +++ b/src/cpu/base.hh @@ -52,7 +52,6 @@ #else #include "arch/generic/interrupts.hh" #include "arch/isa_traits.hh" -#include "arch/microcode_rom.hh" #include "base/statistics.hh" #include "mem/port_proxy.hh" #include "sim/clocked_object.hh" @@ -213,8 +212,6 @@ class BaseCPU : public ClockedObject // @todo remove me after debugging with legion done Tick instCount() { return instCnt; } - TheISA::MicrocodeRom microcodeRom; - protected: std::vector interrupts; diff --git a/src/sim/SConscript b/src/sim/SConscript index 307c45b27..0bdf921f4 100644 --- a/src/sim/SConscript +++ b/src/sim/SConscript @@ -98,9 +98,6 @@ if env['TARGET_ISA'] != 'null': Source('syscall_desc.cc') Source('vma.cc') -if env['TARGET_ISA'] != 'x86': - Source('microcode_rom.cc') - DebugFlag('Checkpoint') DebugFlag('Config') DebugFlag('CxxConfig') diff --git a/src/sim/microcode_rom.cc b/src/sim/microcode_rom.cc deleted file mode 100644 index eaf300ef9..000000000 --- a/src/sim/microcode_rom.cc +++ /dev/null @@ -1,38 +0,0 @@ -/* - * Copyright (c) 2008 The Regents of The University of Michigan - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer; - * redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution; - * neither the name of the copyright holders nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include "sim/microcode_rom.hh" - -#include "base/logging.hh" -#include "cpu/static_inst_fwd.hh" - -StaticInstPtr -MicrocodeRom::fetchMicroop(MicroPC micropc, StaticInstPtr curMacroop) -{ - panic("ROM based microcode isn't implemented.\n"); -} diff --git a/src/sim/microcode_rom.hh b/src/sim/microcode_rom.hh deleted file mode 100644 index ebf7486b5..000000000 --- a/src/sim/microcode_rom.hh +++ /dev/null @@ -1,49 +0,0 @@ -/* - * Copyright (c) 2008 The Regents of The University of Michigan - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer; - * redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution; - * neither the name of the copyright holders nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef __SIM_MICROCODE_ROM_HH__ -#define __SIM_MICROCODE_ROM_HH__ - -/* - * This is a generic stub microcode ROM ISAs can use if they don't need - * anything more. - */ - -#include - -#include "cpu/static_inst_fwd.hh" - -typedef uint16_t MicroPC; - -class MicrocodeRom -{ - public: - StaticInstPtr fetchMicroop(MicroPC micropc, StaticInstPtr curMacroop); -}; - -#endif // __SIM_MICROCODE_ROM_HH__