From: H.J. Lu <hjl.tools@gmail.com>
Date: Wed, 4 Apr 2018 11:36:44 +0000 (-0700)
Subject: i386: Clear vex instead of vex.evex
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=caf0678c84b5b55fbc4bcc853954745a4ad8b658;p=binutils-gdb.git

i386: Clear vex instead of vex.evex

"vex" has many fields to control how to decode an instruction.  Clear
all fields in "vex" before decoding an instruction to avoid using values
left from the previous instruction.

gas/

	PR binutils/23025
	* testsuite/gas/i386/prefix.s: Add tests for vcvtpd2dq with
	VEX and EVEX prefixes.
	* testsuite/gas/i386/prefix.d: Updated.

opcodes/

	PR binutils/23025
	* i386-dis.c (get_valid_dis386): Don't set vex.prefix nor vex.w
	to 0.
	(print_insn): Clear vex instead of vex.evex.
---

diff --git a/gas/ChangeLog b/gas/ChangeLog
index d0f047e3358..17d1b17c6e0 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,10 @@
+2018-04-04  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR binutils/23025
+	* testsuite/gas/i386/prefix.s: Add tests for vcvtpd2dq with
+	VEX and EVEX prefixes.
+	* testsuite/gas/i386/prefix.d: Updated.
+
 2018-03-30  Peter Bergner <bergner@vnet.ibm.com>
 
 	PR binutils/23013
diff --git a/gas/testsuite/gas/i386/prefix.d b/gas/testsuite/gas/i386/prefix.d
index 8dd200be087..e9ad5eb56c0 100644
--- a/gas/testsuite/gas/i386/prefix.d
+++ b/gas/testsuite/gas/i386/prefix.d
@@ -72,5 +72,8 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	90                   	nop
 [ 	]*[a-f0-9]+:	f2 0f c7             	\(bad\)  
 [ 	]*[a-f0-9]+:	f0 90                	lock nop
+[ 	]*[a-f0-9]+:	c5 fb e6 40 20       	vcvtpd2dqx 0x20\(%eax\),%xmm0
+[ 	]*[a-f0-9]+:	62 f1 ff 18 e6 40 04 	vcvtpd2dq 0x20\(%eax\)\{1to2\},%xmm0
+[ 	]*[a-f0-9]+:	c5 fb e6 40 20       	vcvtpd2dqx 0x20\(%eax\),%xmm0
 	...
 #pass
diff --git a/gas/testsuite/gas/i386/prefix.s b/gas/testsuite/gas/i386/prefix.s
index 12d8bbc007d..a4c60a71448 100644
--- a/gas/testsuite/gas/i386/prefix.s
+++ b/gas/testsuite/gas/i386/prefix.s
@@ -391,5 +391,9 @@
 
 	nop
 
+	vcvtpd2dqx 0x20(%eax),%xmm0
+	vcvtpd2dq 0x20(%eax){1to2},%xmm0
+	vcvtpd2dqx 0x20(%eax),%xmm0
+
 # Get a good alignment.
  .p2align	4,0
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 28ffed34387..3add69b8d1a 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,10 @@
+2018-04-04  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR binutils/23025
+	* i386-dis.c (get_valid_dis386): Don't set vex.prefix nor vex.w
+	to 0.
+	(print_insn): Clear vex instead of vex.evex.
+
 2018-04-04  Nick Clifton  <nickc@redhat.com>
 
 	* po/es.po: Updated Spanish translation.
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index e5791c9a5f5..3e45d0e1f35 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -12826,7 +12826,6 @@ get_valid_dis386 (const struct dis386 *dp, disassemble_info *info)
       switch ((*codep & 0x3))
 	{
 	case 0:
-	  vex.prefix = 0;
 	  break;
 	case 1:
 	  vex.prefix = DATA_PREFIX_OPCODE;
@@ -12891,7 +12890,6 @@ get_valid_dis386 (const struct dis386 *dp, disassemble_info *info)
       switch ((*codep & 0x3))
 	{
 	case 0:
-	  vex.prefix = 0;
 	  break;
 	case 1:
 	  vex.prefix = DATA_PREFIX_OPCODE;
@@ -12929,12 +12927,10 @@ get_valid_dis386 (const struct dis386 *dp, disassemble_info *info)
       /* For the 2-byte VEX prefix in 32-bit mode, the highest bit in
 	 VEX.vvvv is 1.  */
       vex.register_specifier = (~(*codep >> 3)) & 0xf;
-      vex.w = 0;
       vex.length = (*codep & 0x4) ? 256 : 128;
       switch ((*codep & 0x3))
 	{
 	case 0:
-	  vex.prefix = 0;
 	  break;
 	case 1:
 	  vex.prefix = DATA_PREFIX_OPCODE;
@@ -13009,7 +13005,6 @@ get_valid_dis386 (const struct dis386 *dp, disassemble_info *info)
       switch ((*codep & 0x3))
 	{
 	case 0:
-	  vex.prefix = 0;
 	  break;
 	case 1:
 	  vex.prefix = DATA_PREFIX_OPCODE;
@@ -13367,7 +13362,7 @@ print_insn (bfd_vma pc, disassemble_info *info)
   need_vex = 0;
   need_vex_reg = 0;
   vex_w_done = 0;
-  vex.evex = 0;
+  memset (&vex, 0, sizeof (vex));
 
   if (dp->name == NULL && dp->op[0].bytemode == FLOATCODE)
     {