From: lkcl <lkcl@web>
Date: Sat, 2 Jul 2022 20:05:57 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~1410
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=cb44e92b43daacefb1b1d23d737e574ef22ab421;p=libreriscv.git

---

diff --git a/openpower/sv/setvl.mdwn b/openpower/sv/setvl.mdwn
index 4acd6335d..b6cfd1f88 100644
--- a/openpower/sv/setvl.mdwn
+++ b/openpower/sv/setvl.mdwn
@@ -109,7 +109,7 @@ Note that setmvli is a pseudo-op, based on RA/RT=0, and setvli likewise
     setvli VL=8    : setvl r5, r0, VL=8
     setmvli MVL=8  : setvl r0, r0, MVL=8
 
-Additional pseudo-op for obtaining VL without modifying it:
+Additional pseudo-op for obtaining VL without modifying it (or any state):
 
     getvl r5       : setvl r5, r0, vf=0, vs=0, ms=0
 
@@ -120,7 +120,7 @@ of srcstep and dststep:
 
 Note that whilst it is possible to set both MVL and VL from the same
 immediate, it is not possible to set them to different immediates in
-the same instruction.  That would require two instructions.
+the same instruction.  Doing so would require two instructions.
 
 **Selecting sources for VL**
 
@@ -155,7 +155,7 @@ by looping first through 0 to VL-1 and only then moving the PC
 to the next instruction, Vertical-First moves the PC onwards
 (vertically) through multiple instructions **with the same
 srcstep and dststep**, then an explict instruction used to
-advance srcstep/dststep, and an outer loop is expected to be
+advance srcstep/dststep. An outer loop is expected to be
 used (branch instruction) which completes a series of
 Vector operations.