From: Marek Olšák <marek.olsak@amd.com>
Date: Tue, 26 Sep 2017 14:17:47 +0000 (+0200)
Subject: tgsi/scan: scan address operands (v2)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=cb686a340f3af1cf60a2d9c0f7300ddcaf0253b2;p=mesa.git

tgsi/scan: scan address operands (v2)

v2: set swizzled usage mask

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
---

diff --git a/src/gallium/auxiliary/tgsi/tgsi_scan.c b/src/gallium/auxiliary/tgsi/tgsi_scan.c
index 1f8904cddd5..989c57ebeed 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_scan.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_scan.c
@@ -458,6 +458,29 @@ scan_instruction(struct tgsi_shader_info *info,
       scan_src_operand(info, fullinst, &fullinst->Src[i], i,
                        tgsi_util_get_inst_usage_mask(fullinst, i),
                        is_interp_instruction, &is_mem_inst);
+
+      if (fullinst->Src[i].Register.Indirect) {
+         struct tgsi_full_src_register src = {{0}};
+
+         src.Register.File = fullinst->Src[i].Indirect.File;
+         src.Register.Index = fullinst->Src[i].Indirect.Index;
+
+         scan_src_operand(info, fullinst, &src, -1,
+                          1 << fullinst->Src[i].Indirect.Swizzle,
+                          false, NULL);
+      }
+
+      if (fullinst->Src[i].Register.Dimension &&
+          fullinst->Src[i].Dimension.Indirect) {
+         struct tgsi_full_src_register src = {{0}};
+
+         src.Register.File = fullinst->Src[i].DimIndirect.File;
+         src.Register.Index = fullinst->Src[i].DimIndirect.Index;
+
+         scan_src_operand(info, fullinst, &src, -1,
+                          1 << fullinst->Src[i].DimIndirect.Swizzle,
+                          false, NULL);
+      }
    }
 
    if (fullinst->Instruction.Texture) {
@@ -479,13 +502,31 @@ scan_instruction(struct tgsi_shader_info *info,
    /* check for indirect register writes */
    for (i = 0; i < fullinst->Instruction.NumDstRegs; i++) {
       const struct tgsi_full_dst_register *dst = &fullinst->Dst[i];
+
       if (dst->Register.Indirect) {
+         struct tgsi_full_src_register src = {{0}};
+
+         src.Register.File = dst->Indirect.File;
+         src.Register.Index = dst->Indirect.Index;
+
+         scan_src_operand(info, fullinst, &src, -1,
+                          1 << dst->Indirect.Swizzle, false, NULL);
+
          info->indirect_files |= (1 << dst->Register.File);
          info->indirect_files_written |= (1 << dst->Register.File);
       }
 
-      if (dst->Register.Dimension && dst->Dimension.Indirect)
+      if (dst->Register.Dimension && dst->Dimension.Indirect) {
+         struct tgsi_full_src_register src = {{0}};
+
+         src.Register.File = dst->DimIndirect.File;
+         src.Register.Index = dst->DimIndirect.Index;
+
+         scan_src_operand(info, fullinst, &src, -1,
+                          1 << dst->DimIndirect.Swizzle, false, NULL);
+
          info->dim_indirect_files |= 1u << dst->Register.File;
+      }
 
       if (is_memory_file(dst->Register.File)) {
          assert(fullinst->Instruction.Opcode == TGSI_OPCODE_STORE);