From: Luke Kenneth Casson Leighton Date: Sat, 18 Apr 2020 13:03:32 +0000 (+0100) Subject: yield ports in dep cell X-Git-Tag: div_pipeline~1429 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=cbaa4c66f7d8479b58b98df99fa3c57df6cd171c;p=soc.git yield ports in dep cell --- diff --git a/src/soc/scoremulti/dependence_cell.py b/src/soc/scoremulti/dependence_cell.py index b1beb7e8..b4692e7c 100644 --- a/src/soc/scoremulti/dependence_cell.py +++ b/src/soc/scoremulti/dependence_cell.py @@ -157,8 +157,8 @@ class DependencyRow(Elaboratable): yield self.rd_pend_i yield self.wr_pend_i yield self.issue_i - yield from self.go_wr_i - yield from self.go_rd_i + yield self.go_wr_i + yield self.go_rd_i yield self.go_die_i yield from self.dest_rsel_o yield from self.src_rsel_o