From: Thomas Preud'homme Date: Fri, 17 Nov 2017 10:00:02 +0000 (+0000) Subject: [ARM] Fix ICE in Armv8-M Security Extensions code X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=cbabe49571dbc94f0dc810f7a7f122b9fdfbc5be;p=gcc.git [ARM] Fix ICE in Armv8-M Security Extensions code Commit r253825 which introduced some sanity checks for sbitmap revealed a bug in the conversion of cmse_nonsecure_entry_clear_before_return () to using bitmap structure. bitmap_and expects that the two bitmaps have the same length, yet the code in cmse_nonsecure_entry_clear_before_return () have different size for to_clear_bitmap and to_clear_arg_regs_bitmap, with the assumption that bitmap_and would behave has if the bits not allocated were in fact zero. This commit makes sure both bitmap are equally sized. 2017-11-17 Thomas Preud'homme gcc/ * config/arm/arm.c (cmse_nonsecure_entry_clear_before_return): Allocate to_clear_arg_regs_bitmap to the same size as to_clear_bitmap. From-SVN: r254859 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e07b3e6d175..e371bf761cc 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2017-11-17 Thomas Preud'homme + + * config/arm/arm.c (cmse_nonsecure_entry_clear_before_return): Allocate + to_clear_arg_regs_bitmap to the same size as to_clear_bitmap. + 2017-11-17 Richard Biener * tree-ssa-pre.c (phi_translate_1): Remove redundant constant diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index db99303f3fb..106e3edce0d 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -25205,7 +25205,8 @@ cmse_nonsecure_entry_clear_before_return (void) if (padding_bits_to_clear != 0) { rtx reg_rtx; - auto_sbitmap to_clear_arg_regs_bitmap (R0_REGNUM + NUM_ARG_REGS); + int to_clear_bitmap_size = SBITMAP_SIZE ((sbitmap) to_clear_bitmap); + auto_sbitmap to_clear_arg_regs_bitmap (to_clear_bitmap_size); /* Padding bits to clear is not 0 so we know we are dealing with returning a composite type, which only uses r0. Let's make sure that