From: Kenneth Graunke Date: Fri, 27 Jul 2012 18:24:19 +0000 (-0700) Subject: i965: Fix typo in shader channel select field name. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=cbcf750d5f2c4695c39766938b4cd9d8942d850b;p=mesa.git i965: Fix typo in shader channel select field name. "chanel" isn't very searchable. I can type, honest! Signed-off-by: Kenneth Graunke --- diff --git a/src/mesa/drivers/dri/i965/brw_structs.h b/src/mesa/drivers/dri/i965/brw_structs.h index 67bfb982efa..465d2a28a8e 100644 --- a/src/mesa/drivers/dri/i965/brw_structs.h +++ b/src/mesa/drivers/dri/i965/brw_structs.h @@ -881,10 +881,10 @@ struct gen7_surface_state /* Only on Haswell */ GLuint pad0:4; - GLuint shader_chanel_select_a:3; - GLuint shader_chanel_select_b:3; - GLuint shader_chanel_select_g:3; - GLuint shader_chanel_select_r:3; + GLuint shader_channel_select_a:3; + GLuint shader_channel_select_b:3; + GLuint shader_channel_select_g:3; + GLuint shader_channel_select_r:3; GLuint alpha_clear_color:1; GLuint blue_clear_color:1; diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp b/src/mesa/drivers/dri/i965/gen7_blorp.cpp index cc28d8c8951..66eb2c8909c 100644 --- a/src/mesa/drivers/dri/i965/gen7_blorp.cpp +++ b/src/mesa/drivers/dri/i965/gen7_blorp.cpp @@ -187,10 +187,10 @@ gen7_blorp_emit_surface_state(struct brw_context *brw, } if (intel->is_haswell) { - surf->ss7.shader_chanel_select_r = HSW_SCS_RED; - surf->ss7.shader_chanel_select_g = HSW_SCS_GREEN; - surf->ss7.shader_chanel_select_b = HSW_SCS_BLUE; - surf->ss7.shader_chanel_select_a = HSW_SCS_ALPHA; + surf->ss7.shader_channel_select_r = HSW_SCS_RED; + surf->ss7.shader_channel_select_g = HSW_SCS_GREEN; + surf->ss7.shader_channel_select_b = HSW_SCS_BLUE; + surf->ss7.shader_channel_select_a = HSW_SCS_ALPHA; } /* Emit relocation to surface contents */ diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c index 25222761e42..62d2be86658 100644 --- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c @@ -339,10 +339,10 @@ gen7_update_texture_surface(struct gl_context *ctx, GLuint unit) */ if (brw->intel.is_haswell) { - surf->ss7.shader_chanel_select_r = HSW_SCS_RED; - surf->ss7.shader_chanel_select_g = HSW_SCS_GREEN; - surf->ss7.shader_chanel_select_b = HSW_SCS_BLUE; - surf->ss7.shader_chanel_select_a = HSW_SCS_ALPHA; + surf->ss7.shader_channel_select_r = HSW_SCS_RED; + surf->ss7.shader_channel_select_g = HSW_SCS_GREEN; + surf->ss7.shader_channel_select_b = HSW_SCS_BLUE; + surf->ss7.shader_channel_select_a = HSW_SCS_ALPHA; } /* Emit relocation to surface contents */ @@ -387,10 +387,10 @@ gen7_create_constant_surface(struct brw_context *brw, gen7_set_surface_tiling(surf, I915_TILING_NONE); /* tiling now allowed */ if (brw->intel.is_haswell) { - surf->ss7.shader_chanel_select_r = HSW_SCS_RED; - surf->ss7.shader_chanel_select_g = HSW_SCS_GREEN; - surf->ss7.shader_chanel_select_b = HSW_SCS_BLUE; - surf->ss7.shader_chanel_select_a = HSW_SCS_ALPHA; + surf->ss7.shader_channel_select_r = HSW_SCS_RED; + surf->ss7.shader_channel_select_g = HSW_SCS_GREEN; + surf->ss7.shader_channel_select_b = HSW_SCS_BLUE; + surf->ss7.shader_channel_select_a = HSW_SCS_ALPHA; } /* Emit relocation to surface contents. Section 5.1.1 of the gen4 @@ -532,10 +532,10 @@ gen7_update_renderbuffer_surface(struct brw_context *brw, } if (intel->is_haswell) { - surf->ss7.shader_chanel_select_r = HSW_SCS_RED; - surf->ss7.shader_chanel_select_g = HSW_SCS_GREEN; - surf->ss7.shader_chanel_select_b = HSW_SCS_BLUE; - surf->ss7.shader_chanel_select_a = HSW_SCS_ALPHA; + surf->ss7.shader_channel_select_r = HSW_SCS_RED; + surf->ss7.shader_channel_select_g = HSW_SCS_GREEN; + surf->ss7.shader_channel_select_b = HSW_SCS_BLUE; + surf->ss7.shader_channel_select_a = HSW_SCS_ALPHA; } drm_intel_bo_emit_reloc(brw->intel.batch.bo,