From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Mon, 29 Oct 2018 04:22:25 +0000 (+0000)
Subject: remove unnecessary function for mmu elwidth load
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=cc1c45719601cd60f0ec4e154a7d9c90dac285e0;p=riscv-isa-sim.git

remove unnecessary function for mmu elwidth load
---

diff --git a/riscv/sv_insn_redirect.cc b/riscv/sv_insn_redirect.cc
index aa1d9af..85ee6d6 100644
--- a/riscv/sv_insn_redirect.cc
+++ b/riscv/sv_insn_redirect.cc
@@ -982,9 +982,3 @@ sv_reg_t sv_proc_t::mmu_load(reg_spec_t const& spec, sv_reg_t const& offs,
     return v;
 }
 
-sv_reg_t sv_proc_t::adjust_load(sv_reg_t const& v, size_t width, bool ext)
-{
-    fprintf(stderr, "mmu_adjust \n");
-    return v;
-}
-
diff --git a/riscv/sv_insn_redirect.h b/riscv/sv_insn_redirect.h
index a1094e3..5c82172 100644
--- a/riscv/sv_insn_redirect.h
+++ b/riscv/sv_insn_redirect.h
@@ -268,7 +268,6 @@ public:
 
     sv_freg_t fsgnj128(sv_freg_t a, sv_freg_t b, bool n, bool x);
 
-    sv_reg_t adjust_load(sv_reg_t const& v, size_t width, bool ext);
     sv_reg_t mmu_load(reg_spec_t const& spec, sv_reg_t const& offs,
                                 size_t width, bool ext);
 
diff --git a/riscv/sv_mmu.cc b/riscv/sv_mmu.cc
index 8a79af7..399fa1d 100644
--- a/riscv/sv_mmu.cc
+++ b/riscv/sv_mmu.cc
@@ -6,7 +6,7 @@ sv_reg_t sv_mmu_t::load_##type(reg_spec_t const& spec, sv_reg_t const& offs) { \
 } \
 sv_reg_t sv_mmu_t::load_##type(reg_t const& addr) { \
   type##_t v = mmu_t::load_##type(addr); \
-  return proc->s.adjust_load(sv_reg_t(v), width, ext); \
+  return v; \
 } 
 
 // load value from memory at aligned address; zero extend to register width