From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sat, 28 Jul 2018 09:57:16 +0000 (+0100)
Subject: whoops reverse flexbus in/out AD
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=cc61eac16912c892c6cf87ae916f42ab8c6ea9c0;p=pinmux.git

whoops reverse flexbus in/out AD
---

diff --git a/src/bsv/peripheral_gen/flexbus.py b/src/bsv/peripheral_gen/flexbus.py
index 82d67e4..3ab1f2b 100644
--- a/src/bsv/peripheral_gen/flexbus.py
+++ b/src/bsv/peripheral_gen/flexbus.py
@@ -50,8 +50,8 @@ class flexbus(PBase):
             ('bwe', 'm_BWEn'),
             ('tbst', 'm_TBSTn'),
             ('tsiz', 'm_TSIZ'),
-            ('ad_in', 'm_AD'),
-            ('ad_out', 'm_din'),
+            ('ad_out', 'm_AD'),
+            ('ad_in', 'm_din'),
             ('ad_en', 'm_OE32n'),
         ]:
             ret.append(template.format(ps, ptype, n, stype))