From: Tobias Platen <tplaten@posteo.de>
Date: Thu, 28 Oct 2021 18:25:51 +0000 (+0200)
Subject: test_compldst_multi_mmu.py: use nmigen.back.pysim
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=cc93aabeadd5068014aa6df4ec77c7e7e0fe2935;p=soc.git

test_compldst_multi_mmu.py: use nmigen.back.pysim
---

diff --git a/src/soc/experiment/test/test_compldst_multi_mmu.py b/src/soc/experiment/test/test_compldst_multi_mmu.py
index 8f5fcf1a..63f9854e 100644
--- a/src/soc/experiment/test/test_compldst_multi_mmu.py
+++ b/src/soc/experiment/test/test_compldst_multi_mmu.py
@@ -1,7 +1,6 @@
 # test case for LOAD / STORE Computation Unit using MMU
 
-#from nmigen.compat.sim import run_simulation
-from nmigen.compat.sim import Simulator, Delay, Settle
+from nmigen.back.pysim import Simulator, Delay, Settle, Tick
 from nmigen.cli import verilog, rtlil
 from nmigen import Module, Signal, Mux, Cat, Elaboratable, Array, Repl
 from nmigen.hdl.rec import Record, Layout