From: Andrey Miroshnikov Date: Tue, 28 Jun 2022 21:44:48 +0000 (+0100) Subject: Fixed description error X-Git-Tag: opf_rfc_ls005_v1~1474 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ccbd54ccd0e87b6b204e9088eb19bae87dd7cac7;p=libreriscv.git Fixed description error --- diff --git a/docs/pypowersim.mdwn b/docs/pypowersim.mdwn index f094c2c2c..651895036 100644 --- a/docs/pypowersim.mdwn +++ b/docs/pypowersim.mdwn @@ -14,15 +14,13 @@ Audio/Video CODECs (such as MP3). succesfully, you need to dump the memory contents and inspect them. -## Pypowersim +## Pypowersim - PowerISA Simulator -**NOTE**: This is a basic description, as the author has not studied or used -the simulator in great detail. - -Pypowersim is a Python script containing useful functions for PowerISA testing. -Assembler code written in SV is decoded by a given ISA class instance, and a +Pypowersim is a PowerISA simulator written and Python. +PowerISA assembler code is decoded by a given ISA class instance, and a simulation is managed cycle by cycle, for instruction and memory debugging. -Use of QEMU as a co-simulator is also supported. +Use of QEMU as a co-simulator is also supported for verifying the binaries +run identically. To find out about input arg information, run the script with "-h/--help" or no arguments to get the help message: @@ -33,7 +31,7 @@ no arguments to get the help message: ### About -The tests consist of running the "pypowersim" tool with several input arg's: +The tests consist of running Pypowersim with several input arg's: * ".gpr" text file for initialising the General Purpose (integer) Registers * ".spr" text file for initialising the Special Purpose Registers