From: Richard Sandiford Date: Fri, 19 Jul 2019 11:18:02 +0000 (+0100) Subject: [AArch64] Rename +bitperm to +sve2-bitperm X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ccbdd22fb96b8680ebeaecd829e8e51958845a8f;p=binutils-gdb.git [AArch64] Rename +bitperm to +sve2-bitperm After some discussion, we've decided to rename the +bitperm feature flag to +sve2-bitperm, so that it's consistent with the other SVE2 feature flags. The associated internal macros already used "SVE2_BITPERM", so only the feature flag itself needs to change. 2019-07-19 Richard Sandiford gas/ * doc/c-aarch64.texi: Remame the +bitperm extension to +sve2-bitperm. * config/tc-aarch64.c (aarch64_features): Likewise. * testsuite/gas/aarch64/illegal-sve2-aes.d: Update accordingly. * testsuite/gas/aarch64/illegal-sve2-sha3.d: Likewise. * testsuite/gas/aarch64/illegal-sve2-sm4.d: Likewise. * testsuite/gas/aarch64/illegal-sve2.d: Likewise. * testsuite/gas/aarch64/sve2.d: Likewise. --- diff --git a/gas/ChangeLog b/gas/ChangeLog index b445ba3f827..fa190309b6b 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,13 @@ +2019-07-19 Richard Sandiford + + * doc/c-aarch64.texi: Remame the +bitperm extension to +sve2-bitperm. + * config/tc-aarch64.c (aarch64_features): Likewise. + * testsuite/gas/aarch64/illegal-sve2-aes.d: Update accordingly. + * testsuite/gas/aarch64/illegal-sve2-sha3.d: Likewise. + * testsuite/gas/aarch64/illegal-sve2-sm4.d: Likewise. + * testsuite/gas/aarch64/illegal-sve2.d: Likewise. + * testsuite/gas/aarch64/sve2.d: Likewise. + 2019-07-19 Alan Modra * config/tc-ppc.c (ppc_elf_suffix): Map "tls@pcrel", "got@tlsgd@pcrel", diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index 47af14389ee..4c19cd4a24a 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -8963,7 +8963,7 @@ static const struct aarch64_option_cpu_value_table aarch64_features[] = { {"sve2-sha3", AARCH64_FEATURE (AARCH64_FEATURE_SVE2_SHA3, 0), AARCH64_FEATURE (AARCH64_FEATURE_SVE2 | AARCH64_FEATURE_SHA3, 0)}, - {"bitperm", AARCH64_FEATURE (AARCH64_FEATURE_SVE2_BITPERM, 0), + {"sve2-bitperm", AARCH64_FEATURE (AARCH64_FEATURE_SVE2_BITPERM, 0), AARCH64_FEATURE (AARCH64_FEATURE_SVE2, 0)}, {NULL, AARCH64_ARCH_NONE, AARCH64_ARCH_NONE}, }; diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi index 6844f598021..05e49ad6a8c 100644 --- a/gas/doc/c-aarch64.texi +++ b/gas/doc/c-aarch64.texi @@ -198,7 +198,7 @@ automatically cause those extensions to be disabled. @tab Enable Transactional Memory Extensions. @item @code{sve2} @tab ARMv8-A @tab No @tab Enable the SVE2 Extension. -@item @code{bitperm} @tab ARMv8-A @tab No +@item @code{sve2-bitperm} @tab ARMv8-A @tab No @tab Enable SVE2 BITPERM Extension. @item @code{sve2-sm4} @tab ARMv8-A @tab No @tab Enable SVE2 SM4 Extension. diff --git a/gas/testsuite/gas/aarch64/illegal-sve2-aes.d b/gas/testsuite/gas/aarch64/illegal-sve2-aes.d index 926db22e4d2..e4453f8261c 100644 --- a/gas/testsuite/gas/aarch64/illegal-sve2-aes.d +++ b/gas/testsuite/gas/aarch64/illegal-sve2-aes.d @@ -1,5 +1,5 @@ #name: Missing SVE2 AES argument -#as: -march=armv8-a+sve2+sve2-sm4+sve2-sha3+bitperm +#as: -march=armv8-a+sve2+sve2-sm4+sve2-sha3+sve2-bitperm #source: sve2.s #error: [^ :]+: Assembler messages: #error: [^ :]+:[0-9]+: Error: selected processor does not support `aesd z17\.b,z17\.b,z21\.b' diff --git a/gas/testsuite/gas/aarch64/illegal-sve2-sha3.d b/gas/testsuite/gas/aarch64/illegal-sve2-sha3.d index 35b03826f6e..5c1430c9626 100644 --- a/gas/testsuite/gas/aarch64/illegal-sve2-sha3.d +++ b/gas/testsuite/gas/aarch64/illegal-sve2-sha3.d @@ -1,5 +1,5 @@ #name: Missing SVE2 SHA3 argument -#as: -march=armv8-a+sve2+sve2-sm4+sve2-aes+bitperm +#as: -march=armv8-a+sve2+sve2-sm4+sve2-aes+sve2-bitperm #source: sve2.s #error: [^ :]+: Assembler messages: #error: [^ :]+:[0-9]+: Error: selected processor does not support `rax1 z17\.d,z21\.d,z27\.d' diff --git a/gas/testsuite/gas/aarch64/illegal-sve2-sm4.d b/gas/testsuite/gas/aarch64/illegal-sve2-sm4.d index ee3734fdabe..7c3c1e53422 100644 --- a/gas/testsuite/gas/aarch64/illegal-sve2-sm4.d +++ b/gas/testsuite/gas/aarch64/illegal-sve2-sm4.d @@ -1,5 +1,5 @@ #name: Missing SVE2 SM4 argument -#as: -march=armv8-a+sve2+sve2-sha3+sve2-aes+bitperm +#as: -march=armv8-a+sve2+sve2-sha3+sve2-aes+sve2-bitperm #source: sve2.s #error: [^ :]+: Assembler messages: #error: [^ :]+:[0-9]+: Error: selected processor does not support `sm4e z17\.s,z17\.s,z21\.s' diff --git a/gas/testsuite/gas/aarch64/illegal-sve2.d b/gas/testsuite/gas/aarch64/illegal-sve2.d index f1626ac9dde..5d0fa5e7646 100644 --- a/gas/testsuite/gas/aarch64/illegal-sve2.d +++ b/gas/testsuite/gas/aarch64/illegal-sve2.d @@ -1,4 +1,4 @@ #name: Illegal SVE2 -#as: -march=armv8-a+sve2+sve2-aes+sve2-sm4+sve2-sha3+bitperm +#as: -march=armv8-a+sve2+sve2-aes+sve2-sm4+sve2-sha3+sve2-bitperm #source: illegal-sve2.s #error_output: illegal-sve2.l diff --git a/gas/testsuite/gas/aarch64/sve2.d b/gas/testsuite/gas/aarch64/sve2.d index 5324583020f..f8be1c57c32 100644 --- a/gas/testsuite/gas/aarch64/sve2.d +++ b/gas/testsuite/gas/aarch64/sve2.d @@ -1,4 +1,4 @@ -#as: -march=armv8-a+sve2+sve2-aes+sve2-sm4+sve2-sha3+bitperm +#as: -march=armv8-a+sve2+sve2-aes+sve2-sm4+sve2-sha3+sve2-bitperm #objdump: -dr [^:]+: file format .*