From: Dmitry Selyutin <ghostmansd@gmail.com>
Date: Mon, 6 Jun 2022 19:30:42 +0000 (+0000)
Subject: svp64.py: fix stdin/stdout modus operandi
X-Git-Tag: sv_maxu_works-initial~396
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=cd1145ac5252b9bc56a7af9c74fdd511f5e3764c;p=openpower-isa.git

svp64.py: fix stdin/stdout modus operandi
---

diff --git a/src/openpower/sv/trans/svp64.py b/src/openpower/sv/trans/svp64.py
index 0c9c3b5b..9edc09e6 100644
--- a/src/openpower/sv/trans/svp64.py
+++ b/src/openpower/sv/trans/svp64.py
@@ -1181,7 +1181,6 @@ def get_ws(line):
 
 
 def asm_process():
-
     # get an input file and an output file
     args = sys.argv[1:]
     if len(args) == 0:
@@ -1209,9 +1208,9 @@ def asm_process():
     macros = {}  # macros which start ".set"
     isa = SVP64Asm([])
     for line in lines:
-        ls = line.split("#")
+        (op, *comments) = map(str.strip, line.split("#"))
+        ls = [op, "#".join(comments)]
         # identify macros
-        op = ls[0].strip()
         if op.startswith("setvl") or op.startswith("svshape"):
             ws, line = get_ws(ls[0])
             lst = list(isa.translate_one(ls[0].strip(), macros))
@@ -1225,7 +1224,7 @@ def asm_process():
         if len(ls) != 2:
             outfile.write(line)
             continue
-        potential = ls[1].strip()
+        potential = ls[0].strip()
         if not potential.startswith("sv."):
             outfile.write(line)
             continue
@@ -1300,5 +1299,4 @@ if __name__ == '__main__':
     ]
     isa = SVP64Asm(lst, macros=macros)
     log("list", list(isa))
-    csvs = SVP64RM()
-    # asm_process()
+    asm_process()