From: Faraz Shahbazker Date: Tue, 14 May 2019 00:19:37 +0000 (-0700) Subject: MIPS/gas: Reject $0 as source register for DAUI instruction X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=cd4797ee054654160fe6c4b6fbecd636b7961e19;p=binutils-gdb.git MIPS/gas: Reject $0 as source register for DAUI instruction The MIPS64R6 TRM requires that the source register for DAUI not be r0. [1] "MIPS Architecture for Programmers Volume II-A: The MIPS64 Instruction Set Manual", Imagination Technologies Ltd., Document Number: MD00087, Revision 6.06, December 15, 2016, Section 3.2 "Alphabetical List of Instructions", pp. 67-68. gas/ * testsuite/gas/mips/r6-branch-constraints.s: Rename to ... * testsuite/gas/mips/r6-reg-constraints.s: this and add test case for DAUI. * testsuite/gas/mips/r6-branch-constraints.l: Rename to ... * testsuite/gas/mips/r6-reg-constraints.l: this and add test for DAUI. * testsuite/gas/mips/mips.exp: Rename test from r6-branch-constraints to r6-reg-constraints. opcodes/ * mips-opc.c (mips_builtin_opcodes): Change source register constraint for DAUI. --- diff --git a/gas/ChangeLog b/gas/ChangeLog index dfd5d6f1b70..f25c2dc2ba8 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,14 @@ +2019-05-21 Faraz Shahbazker + + * testsuite/gas/mips/r6-branch-constraints.s: Rename to ... + * testsuite/gas/mips/r6-reg-constraints.s: this and add test + case for DAUI. + * testsuite/gas/mips/r6-branch-constraints.l: Rename to ... + * testsuite/gas/mips/r6-reg-constraints.l: this and add test + for DAUI. + * testsuite/gas/mips/mips.exp: Rename test from + r6-branch-constraints to r6-reg-constraints. + 2019-05-21 Andre Vieira PR 24559 diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp index c8ecd04e943..eaeb488f61f 100644 --- a/gas/testsuite/gas/mips/mips.exp +++ b/gas/testsuite/gas/mips/mips.exp @@ -2074,7 +2074,7 @@ if { [istarget mips*-*-vxworks*] } { run_list_test_arches "r6-removed" "-32" [mips_arch_list_matching mips32r6] run_list_test_arches "r6-64-removed" [mips_arch_list_matching mips64r6] - run_list_test_arches "r6-branch-constraints" "-32" \ + run_list_test_arches "r6-reg-constraints" "-32" \ [mips_arch_list_matching mips32r6] run_dump_test_arches "crc" [mips_arch_list_matching mips32r6] diff --git a/gas/testsuite/gas/mips/r6-branch-constraints.l b/gas/testsuite/gas/mips/r6-branch-constraints.l deleted file mode 100644 index bdeea9f160c..00000000000 --- a/gas/testsuite/gas/mips/r6-branch-constraints.l +++ /dev/null @@ -1,25 +0,0 @@ -.*: Assembler messages: -.*:2: Error: the source register must not be \$0 `blezc \$0,.' -.*:3: Error: the source register must not be \$0 `bgezc \$0,.' -.*:4: Error: the source register must not be \$0 `bgtzc \$0,.' -.*:5: Error: the source register must not be \$0 `bltzc \$0,.' -.*:6: Error: the source register must not be \$0 `beqzc \$0,.' -.*:7: Error: the source register must not be \$0 `bnezc \$0,.' -.*:8: Error: the source register must not be \$0 `bgec \$0,\$2,.' -.*:9: Error: invalid operands `bgec \$2,\$0,.' -.*:10: Error: invalid operands `bgec \$2,\$2,.' -.*:11: Error: the source register must not be \$0 `bgeuc \$0,\$2,.' -.*:12: Error: invalid operands `bgeuc \$2,\$0,.' -.*:13: Error: invalid operands `bgeuc \$2,\$2,.' -.*:14: Error: the source register must not be \$0 `bltc \$0,\$2,.' -.*:15: Error: invalid operands `bltc \$2,\$0,.' -.*:16: Error: invalid operands `bltc \$2,\$2,.' -.*:17: Error: the source register must not be \$0 `bltuc \$0,\$2,.' -.*:18: Error: invalid operands `bltuc \$2,\$0,.' -.*:19: Error: invalid operands `bltuc \$2,\$2,.' -.*:20: Error: the source register must not be \$0 `beqc \$0,\$2,.' -.*:21: Error: invalid operands `beqc \$2,\$0,.' -.*:22: Error: invalid operands `beqc \$2,\$2,.' -.*:23: Error: the source register must not be \$0 `bnec \$0,\$2,.' -.*:24: Error: invalid operands `bnec \$2,\$0,.' -.*:25: Error: invalid operands `bnec \$2,\$2,.' diff --git a/gas/testsuite/gas/mips/r6-branch-constraints.s b/gas/testsuite/gas/mips/r6-branch-constraints.s deleted file mode 100644 index 62ca893b2c4..00000000000 --- a/gas/testsuite/gas/mips/r6-branch-constraints.s +++ /dev/null @@ -1,25 +0,0 @@ - .text - blezc $0,. - bgezc $0,. - bgtzc $0,. - bltzc $0,. - beqzc $0,. - bnezc $0,. - bgec $0,$2,. - bgec $2,$0,. - bgec $2,$2,. - bgeuc $0,$2,. - bgeuc $2,$0,. - bgeuc $2,$2,. - bltc $0,$2,. - bltc $2,$0,. - bltc $2,$2,. - bltuc $0,$2,. - bltuc $2,$0,. - bltuc $2,$2,. - beqc $0,$2,. - beqc $2,$0,. - beqc $2,$2,. - bnec $0,$2,. - bnec $2,$0,. - bnec $2,$2,. diff --git a/gas/testsuite/gas/mips/r6-reg-constraints.l b/gas/testsuite/gas/mips/r6-reg-constraints.l new file mode 100644 index 00000000000..c89807347e4 --- /dev/null +++ b/gas/testsuite/gas/mips/r6-reg-constraints.l @@ -0,0 +1,26 @@ +.*: Assembler messages: +.*:2: Error: the source register must not be \$0 `blezc \$0,.' +.*:3: Error: the source register must not be \$0 `bgezc \$0,.' +.*:4: Error: the source register must not be \$0 `bgtzc \$0,.' +.*:5: Error: the source register must not be \$0 `bltzc \$0,.' +.*:6: Error: the source register must not be \$0 `beqzc \$0,.' +.*:7: Error: the source register must not be \$0 `bnezc \$0,.' +.*:8: Error: the source register must not be \$0 `bgec \$0,\$2,.' +.*:9: Error: invalid operands `bgec \$2,\$0,.' +.*:10: Error: invalid operands `bgec \$2,\$2,.' +.*:11: Error: the source register must not be \$0 `bgeuc \$0,\$2,.' +.*:12: Error: invalid operands `bgeuc \$2,\$0,.' +.*:13: Error: invalid operands `bgeuc \$2,\$2,.' +.*:14: Error: the source register must not be \$0 `bltc \$0,\$2,.' +.*:15: Error: invalid operands `bltc \$2,\$0,.' +.*:16: Error: invalid operands `bltc \$2,\$2,.' +.*:17: Error: the source register must not be \$0 `bltuc \$0,\$2,.' +.*:18: Error: invalid operands `bltuc \$2,\$0,.' +.*:19: Error: invalid operands `bltuc \$2,\$2,.' +.*:20: Error: the source register must not be \$0 `beqc \$0,\$2,.' +.*:21: Error: invalid operands `beqc \$2,\$0,.' +.*:22: Error: invalid operands `beqc \$2,\$2,.' +.*:23: Error: the source register must not be \$0 `bnec \$0,\$2,.' +.*:24: Error: invalid operands `bnec \$2,\$0,.' +.*:25: Error: invalid operands `bnec \$2,\$2,.' +.*:26: Error: the source register must not be \$0 `daui \$2,\$0,1' diff --git a/gas/testsuite/gas/mips/r6-reg-constraints.s b/gas/testsuite/gas/mips/r6-reg-constraints.s new file mode 100644 index 00000000000..b29527c248f --- /dev/null +++ b/gas/testsuite/gas/mips/r6-reg-constraints.s @@ -0,0 +1,26 @@ + .text + blezc $0,. + bgezc $0,. + bgtzc $0,. + bltzc $0,. + beqzc $0,. + bnezc $0,. + bgec $0,$2,. + bgec $2,$0,. + bgec $2,$2,. + bgeuc $0,$2,. + bgeuc $2,$0,. + bgeuc $2,$2,. + bltc $0,$2,. + bltc $2,$0,. + bltc $2,$2,. + bltuc $0,$2,. + bltuc $2,$0,. + bltuc $2,$2,. + beqc $0,$2,. + beqc $2,$0,. + beqc $2,$2,. + bnec $0,$2,. + bnec $2,$0,. + bnec $2,$2,. + daui $2,$0,1 diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 61adb8e4655..7f061c28d30 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2019-05-21 Faraz Shahbazker + + * mips-opc.c (mips_builtin_opcodes): Change source register + constraint for DAUI. + 2019-05-20 Nick Clifton * po/fr.po: Updated French translation. diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c index 69b16be80f6..0483a04edec 100644 --- a/opcodes/mips-opc.c +++ b/opcodes/mips-opc.c @@ -3271,7 +3271,7 @@ const struct mips_opcode mips_builtin_opcodes[] = /* MIPS r6. */ {"aui", "t,s,u", 0x3c000000, 0xfc000000, WR_1|RD_2, 0, I37, 0, 0 }, {"auipc", "s,u", 0xec1e0000, 0xfc1f0000, WR_1, RD_pc, I37, 0, 0 }, -{"daui", "t,s,u", 0x74000000, 0xfc000000, WR_1|RD_2, 0, I37, 0, 0 }, +{"daui", "t,-s,u", 0x74000000, 0xfc000000, WR_1|RD_2, 0, I37, 0, 0 }, {"dahi", "s,-d,u", 0x04060000, 0xfc1f0000, MOD_1, 0, I69, 0, 0 }, {"dati", "s,-d,u", 0x041e0000, 0xfc1f0000, MOD_1, 0, I69, 0, 0 },