From: David Edelsohn <dje.gcc@gmail.com>
Date: Wed, 16 Dec 2020 20:16:06 +0000 (-0500)
Subject: testsuite: Adjust expected instruction count for PPC fold testcases.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=cdb1c276560b26a9c3bc837340669962ef1b430a;p=gcc.git

testsuite: Adjust expected instruction count for PPC fold testcases.

commit r11-5958 changed the code generation for the vector logical fold
tests.  This patch updates the expected instruction counts for different
instructions.

gcc/testsuite/ChangeLog:

2020-12-16  David Edelsohn  <dje.gcc@gmail.com>

	PR target/98280
	* gcc.target/powerpc/fold-vec-logical-ors-char.c: Adjust count.
	* gcc.target/powerpc/fold-vec-logical-ors-int.c: Adjust count.
	* gcc.target/powerpc/fold-vec-logical-ors-longlong.c: Adjust count.
	* gcc.target/powerpc/fold-vec-logical-ors-short.c: Adjust count.
	* gcc.target/powerpc/fold-vec-logical-other-char.c: Adjust count.
	* gcc.target/powerpc/fold-vec-logical-other-int.c: Adjust count.
	* gcc.target/powerpc/fold-vec-logical-other-longlong.c: Adjust count.
	* gcc.target/powerpc/fold-vec-logical-other-short.c: Adjust count.
---

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-char.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-char.c
index 7406039d054..713fed7824a 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-char.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-char.c
@@ -120,6 +120,6 @@ test6_nor (vector unsigned char x, vector unsigned char y)
   return *foo;
 }
 
-/* { dg-final { scan-assembler-times {\mxxlor\M} 6 } } */
+/* { dg-final { scan-assembler-times {\mxxlor\M} 7 } } */
 /* { dg-final { scan-assembler-times {\mxxlxor\M} 6 } } */
-/* { dg-final { scan-assembler-times {\mxxlnor\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mxxlnor\M} 1 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-int.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-int.c
index a7c6366b938..4d1c78f40ec 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-int.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-int.c
@@ -119,6 +119,6 @@ test6_nor (vector unsigned int x, vector unsigned int y)
   return *foo;
 }
 
-/* { dg-final { scan-assembler-times {\mxxlor\M} 6 } } */
+/* { dg-final { scan-assembler-times {\mxxlor\M} 7 } } */
 /* { dg-final { scan-assembler-times {\mxxlxor\M} 6 } } */
-/* { dg-final { scan-assembler-times {\mxxlnor\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mxxlnor\M} 1 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-longlong.c
index 10c69d3d87b..27ef09ada80 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-longlong.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-longlong.c
@@ -156,6 +156,6 @@ test6_nor (vector unsigned long long x, vector unsigned long long y)
 // For simplicity, this test now only targets "powerpc_p8vector_ok" environments
 // where the answer is expected to be 6.
 
-/* { dg-final { scan-assembler-times {\mxxlor\M} 6 } } */
+/* { dg-final { scan-assembler-times {\mxxlor\M} 9 } } */
 /* { dg-final { scan-assembler-times {\mxxlxor\M} 6 } } */
-/* { dg-final { scan-assembler-times {\mxxlnor\M} 6 } } */
+/* { dg-final { scan-assembler-times {\mxxlnor\M} 3 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-short.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-short.c
index 8352a7f4dc5..f796c5b33a9 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-short.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-short.c
@@ -119,6 +119,6 @@ test6_nor (vector unsigned short x, vector unsigned short y)
   return *foo;
 }
 
-/* { dg-final { scan-assembler-times {\mxxlor\M} 6 } } */
+/* { dg-final { scan-assembler-times {\mxxlor\M} 7 } } */
 /* { dg-final { scan-assembler-times {\mxxlxor\M} 6 } } */
-/* { dg-final { scan-assembler-times {\mxxlnor\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mxxlnor\M} 1 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-char.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-char.c
index 7fe3e0b8e0e..e74308ccda2 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-char.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-char.c
@@ -104,5 +104,5 @@ test6_nand (vector unsigned char x, vector unsigned char y)
   return *foo;
 }
 
-/* { dg-final { scan-assembler-times {\mxxlnand\M} 6 } } */
+/* { dg-final { scan-assembler-times {\mxxlnand\M} 3 } } */
 /* { dg-final { scan-assembler-times {\mxxlorc\M} 6 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-int.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-int.c
index 61d34059b67..57edaad52a8 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-int.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-int.c
@@ -104,5 +104,5 @@ test6_nand (vector unsigned int x, vector unsigned int y)
   return *foo;
 }
 
-/* { dg-final { scan-assembler-times {\mxxlnand\M} 6 } } */
+/* { dg-final { scan-assembler-times {\mxxlnand\M} 3 } } */
 /* { dg-final { scan-assembler-times {\mxxlorc\M} 6 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-longlong.c
index 8e14927620e..d4b85796406 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-longlong.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-longlong.c
@@ -102,5 +102,5 @@ test6_nand (vector unsigned long long x, vector unsigned long long y)
   return *foo;
 }
 
+/* { dg-final { scan-assembler-times {\mxxlnand\M} 3 } } */
 /* { dg-final { scan-assembler-times {\mxxlorc\M} 6 } } */
-/* { dg-final { scan-assembler-times {\mxxlnand\M} 6 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-short.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-short.c
index cc354b935dc..bf98652750c 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-short.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-short.c
@@ -104,5 +104,5 @@ test6_nand (vector unsigned short x, vector unsigned short y)
   return *foo;
 }
 
-/* { dg-final { scan-assembler-times {\mxxlnand\M} 6 } } */
+/* { dg-final { scan-assembler-times {\mxxlnand\M} 3 } } */
 /* { dg-final { scan-assembler-times {\mxxlorc\M} 6 } } */