From: lkcl <lkcl@web>
Date: Tue, 20 Sep 2022 16:33:36 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~348
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=cdc9910b7dc1939a83f00a80b43fc93731fa1079;p=libreriscv.git

---

diff --git a/openpower/sv/overview.mdwn b/openpower/sv/overview.mdwn
index 2d54cc30e..84a02e459 100644
--- a/openpower/sv/overview.mdwn
+++ b/openpower/sv/overview.mdwn
@@ -323,7 +323,7 @@ into account:
 
     function op_add(RT, RA, RB) # add not VADD!
       int id=0, irs1=0, irs2=0;
-      predval = get_pred_val(FALSE, rd);
+      predval = get_pred_val(FALSE, RT); # dest pred
       for i = 0 to VL-1:
         if (predval & 1<<i) # predication bit test
            ireg[RT+id] <= ireg[RA+irs1] + ireg[RB+irs2];