From: Will Schmidt <will_schmidt@vnet.ibm.com>
Date: Thu, 18 May 2017 14:08:13 +0000 (+0000)
Subject: fold-vec-div-float.c: Update dg-requires and dg-options statements.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=cdefeea2e6b4fc847fd23ff4d438b3c9db00d5a7;p=gcc.git

fold-vec-div-float.c: Update dg-requires and dg-options statements.

2017-05-18  Will Schmidt  <will_schmidt@vnet.ibm.com>

[gcc/testsuite]

	* fold-vec-div-float.c: Update dg-requires and dg-options statements.
	* fold-vec-div-floatdouble.c: Likewise.
	* fold-vec-logical-ands-char.c: Likewise.
	* fold-vec-logical-ands-int.c: Likewise.
	* fold-vec-logical-ands-short.c: Likewise.
	* fold-vec-logical-ors-char.c: Likewise.
	* fold-vec-logical-ors-int.c: Likewise.
	* fold-vec-logical-ors-short.c: Likewise.
	* fold-vec-logical-other-char.c: Likewise.
	* fold-vec-mule-misc.c: Likewise.
	* fold-vec-mult-float.c: Likewise.
	* fold-vec-mult-floatdouble.c: Likewise.
	* fold-vec-mult-int.c: Likewise.
	* fold-vec-mult-int128-p9.c: Likewise.
	* fold-vec-sub-floatdouble.c: Likewise.
	* fold-vec-div-longlong.c: Update dg-requires and dg-options statements.
	Add lp64 requirement.
	* fold-vec-mult-int128-p8.c: Likewise.
	* fold-vec-logical-ors-longlong.c: Fix comment typo.

From-SVN: r248202
---

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 98c8081547d..d20ade3afcd 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,25 @@
+2017-05-18  Will Schmidt  <will_schmidt@vnet.ibm.com>
+
+	* fold-vec-div-float.c: Update dg-requires and dg-options statements.
+	* fold-vec-div-floatdouble.c: Likewise.
+	* fold-vec-logical-ands-char.c: Likewise.
+	* fold-vec-logical-ands-int.c: Likewise.
+	* fold-vec-logical-ands-short.c: Likewise.
+	* fold-vec-logical-ors-char.c: Likewise.
+	* fold-vec-logical-ors-int.c: Likewise.
+	* fold-vec-logical-ors-short.c: Likewise.
+	* fold-vec-logical-other-char.c: Likewise.
+	* fold-vec-mule-misc.c: Likewise.
+	* fold-vec-mult-float.c: Likewise.
+	* fold-vec-mult-floatdouble.c: Likewise.
+	* fold-vec-mult-int.c: Likewise.
+	* fold-vec-mult-int128-p9.c: Likewise.
+	* fold-vec-sub-floatdouble.c: Likewise.
+	* fold-vec-div-longlong.c: Update dg-requires and dg-options statements.
+	Add lp64 requirement.
+	* fold-vec-mult-int128-p8.c: Likewise.
+	* fold-vec-logical-ors-longlong.c: Fix comment typo.
+
 2017-05-18  Steven Munroe  <munroesj@gcc.gnu.org>
 
 	* gcc.target/powerpc/bmi-andn-1.c: Fix-up dg-options.
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-div-float.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-div-float.c
index 8e8f645baf4..47254ce66a8 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-div-float.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-div-float.c
@@ -1,9 +1,9 @@
 /* Verify that overloaded built-ins for vec_div with float
-   inputs produce the right results with -maltivec.  */
+   inputs produce the right results.  */
 
 /* { dg-do compile } */
-/* { dg-require-effective-target powerpc_altivec_ok } */
-/* { dg-options "-maltivec" } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-mvsx" } */
 
 #include <altivec.h>
 
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-div-floatdouble.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-div-floatdouble.c
index 0559013dc33..569467e61f9 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-div-floatdouble.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-div-floatdouble.c
@@ -1,9 +1,9 @@
 /* Verify that overloaded built-ins for vec_div with float and
-   double inputs for VSX produce the right results with -mvsx. */
+   double inputs for VSX produce the right results. */
 
 /* { dg-do compile } */
 /* { dg-require-effective-target powerpc_vsx_ok } */
-/* { dg-options "-maltivec" } */
+/* { dg-options "-mvsx" } */
 
 #include <altivec.h>
 
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c
index c37c6485817..312e984d3cc 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c
@@ -2,8 +2,9 @@
    inputs produce the right results.  */
 
 /* { dg-do compile } */
-/* { dg-require-effective-target powerpc_p8vector_ok } */
-/* { dg-options "-maltivec -mpower8-vector -O3" } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-mvsx -O2" } */
 
 #include <altivec.h>
 
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ands-char.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ands-char.c
index 021da58441e..d1f66f434ad 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ands-char.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ands-char.c
@@ -3,7 +3,7 @@
 
 /* { dg-do compile } */
 /* { dg-require-effective-target powerpc_vsx_ok } */
-/* { dg-options "-maltivec -O1" } */
+/* { dg-options "-mvsx -O1" } */
 
 #include <altivec.h>
 
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ands-int.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ands-int.c
index ccac7d5f8f2..59a23e89b48 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ands-int.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ands-int.c
@@ -2,8 +2,8 @@
  * with int inputs produce the right results.  */
 
 /* { dg-do compile } */
-/* { dg-require-effective-target powerpc_altivec_ok } */
-/* { dg-options "-maltivec -O1" } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-mvsx -O1" } */
 
 #include <altivec.h>
 
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ands-short.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ands-short.c
index 8ee320675b1..805d34561ba 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ands-short.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ands-short.c
@@ -2,8 +2,8 @@
    inputs produce the right results.  */
 
 /* { dg-do compile } */
-/* { dg-require-effective-target powerpc_altivec_ok } */
-/* { dg-options "-maltivec -O1" } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-mvsx -O1" } */
 
 #include <altivec.h>
 
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-char.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-char.c
index 283189f8713..7406039d054 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-char.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-char.c
@@ -3,11 +3,10 @@
 
 /* { dg-do compile } */
 /* { dg-require-effective-target powerpc_vsx_ok } */
-/* { dg-options "-maltivec -O1" } */
+/* { dg-options "-mvsx -O1" } */
 
 #include <altivec.h>
 
-
 vector signed char
 test1_or (vector bool char x, vector signed char y)
 {
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-int.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-int.c
index 11e98ae4dcf..a7c6366b938 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-int.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-int.c
@@ -2,8 +2,8 @@
  * with int inputs produce the right results.  */
 
 /* { dg-do compile } */
-/* { dg-require-effective-target powerpc_altivec_ok } */
-/* { dg-options "-maltivec -O1" } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-mvsx -O1" } */
 
 #include <altivec.h>
 
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-longlong.c
index ac532f52d0c..7ca23fb2454 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-longlong.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-longlong.c
@@ -153,7 +153,7 @@ test6_nor (vector unsigned long long x, vector unsigned long long y)
 
 // Codegen on power7 is such that the vec_or() tests generate more xxlor
 // instructions than what is seen on power8 or newer.
-// Thus, an additional target close for the xxlor instruction check.
+// Thus, an additional target clause for the xxlor instruction check.
 /* { dg-final { scan-assembler-times {\mxxlor\M} 6 { target p8vector_hw }  } } */
 /* { dg-final { scan-assembler-times {\mxxlor\M} 24 { target { ! p8vector_hw }  }  } } */
 
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-short.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-short.c
index 24f3a55efe0..8352a7f4dc5 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-short.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-short.c
@@ -2,8 +2,8 @@
    inputs produce the right results.  */
 
 /* { dg-do compile } */
-/* { dg-require-effective-target powerpc_altivec_ok } */
-/* { dg-options "-maltivec -O1" } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-mvsx -O1" } */
 
 #include <altivec.h>
 
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-char.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-char.c
index 8726df617de..7fe3e0b8e0e 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-char.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-char.c
@@ -3,7 +3,7 @@
  * vec_nand) were added as part of ISA 2.07 (P8).  */
 
 /* { dg-do compile } */
-/* { dg-require-effective-target p8vector_hw } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
 /* { dg-options "-mpower8-vector -O1" } */
 
 #include <altivec.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-mule-misc.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-mule-misc.c
index 4bb61853169..9b89118a0fa 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-mule-misc.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-mule-misc.c
@@ -1,8 +1,8 @@
 /* PR target/79941 */
 
 /* { dg-do run } */
-/* { dg-require-effective-target powerpc_vsx_ok } */
-/* { dg-options "-mvsx -O2 -save-temps" } */
+/* { dg-require-effective-target powerpc_altivec_ok } */
+/* { dg-options "-maltivec -O2 -save-temps" } */
 
 #include <altivec.h>
 
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-float.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-float.c
index 619cd6eaed8..46afc685570 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-float.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-float.c
@@ -2,8 +2,8 @@
    inputs produce the right results.  */
 
 /* { dg-do compile } */
-/* { dg-require-effective-target powerpc_altivec_ok } */
-/* { dg-options "-maltivec -mvsx" } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-mvsx -O2" } */
 
 #include <altivec.h>
 
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-floatdouble.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-floatdouble.c
index 685318a322b..59e936154e9 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-floatdouble.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-floatdouble.c
@@ -3,7 +3,7 @@
 
 /* { dg-do compile } */
 /* { dg-require-effective-target powerpc_vsx_ok } */
-/* { dg-options "-maltivec -mvsx" } */
+/* { dg-options "-mvsx" } */
 
 #include <altivec.h>
 
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int.c
index 3359fbec61c..b536bcedaa9 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int.c
@@ -3,7 +3,7 @@
 
 /* { dg-do compile } */
 /* { dg-require-effective-target powerpc_p8vector_ok } */
-/* { dg-options "-maltivec -mvsx -mpower8-vector" } */
+/* { dg-options "-mpower8-vector" } */
 
 #include <altivec.h>
 
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int128-p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int128-p8.c
index a133c5d90fe..97d6b945f43 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int128-p8.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int128-p8.c
@@ -4,7 +4,8 @@
 /* { dg-do compile } */
 /* { dg-require-effective-target powerpc_p8vector_ok } */
 /* { dg-require-effective-target int128 } */
-/* { dg-options "-maltivec -mvsx -mpower8-vector" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-mpower8-vector" } */
 /* { dg-additional-options "-maix64" { target powerpc-ibm-aix* } } */
 
 #include "altivec.h"
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int128-p9.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int128-p9.c
index 96c9d019682..e81ea5f3134 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int128-p9.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int128-p9.c
@@ -5,7 +5,7 @@
 /* { dg-require-effective-target powerpc_float128_hw_ok } */
 /* { dg-require-effective-target int128 } */
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
-/* { dg-options "-maltivec -mvsx -mcpu=power9 -O2" } */
+/* { dg-options "-mcpu=power9 -O2" } */
 /* { dg-additional-options "-maix64" { target powerpc-ibm-aix* } } */
 
 #include "altivec.h"
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-sub-floatdouble.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-sub-floatdouble.c
index c29acc93b56..116f15e6688 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-sub-floatdouble.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-sub-floatdouble.c
@@ -3,7 +3,7 @@
 
 /* { dg-do compile } */
 /* { dg-require-effective-target powerpc_vsx_ok } */
-/* { dg-options "-maltivec -mvsx" } */
+/* { dg-options "-mvsx" } */
 
 #include <altivec.h>