From: Florent Kermarrec Date: Mon, 13 Apr 2015 12:29:44 +0000 (+0200) Subject: liteusb: pep8 (E201) X-Git-Tag: 24jan2021_ls180~2347 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ce0e818d6670e584c479c7fb587a531a2a0f3fa7;p=litex.git liteusb: pep8 (E201) --- diff --git a/misoclib/com/liteusb/common.py b/misoclib/com/liteusb/common.py index b27e8318..2f6f9772 100644 --- a/misoclib/com/liteusb/common.py +++ b/misoclib/com/liteusb/common.py @@ -4,17 +4,15 @@ from migen.actorlib.fifo import * from migen.flow.actor import EndpointDescription user_layout = EndpointDescription( - [ ("dst", 8), - ("length", 4*8), - ("error", 1), - ("d", 8) + [("dst", 8), + ("length", 4*8), + ("error", 1), + ("d", 8) ], packetized=True ) -phy_layout = [ - ("d", 8) -] +phy_layout = [("d", 8)] class LiteUSBPipe: diff --git a/misoclib/com/liteusb/core/depacketizer.py b/misoclib/com/liteusb/core/depacketizer.py index cbc919e8..9ed1a035 100644 --- a/misoclib/com/liteusb/core/depacketizer.py +++ b/misoclib/com/liteusb/core/depacketizer.py @@ -43,11 +43,11 @@ class LiteUSBDepacketizer(Module): preamble[i].eq(preamble[i-1]) ) fsm.act("WAIT_SOP", - If( (preamble[3] == 0x5A) & - (preamble[2] == 0xA5) & - (preamble[1] == 0x5A) & - (preamble[0] == 0xA5) & - sink.stb, + If((preamble[3] == 0x5A) & + (preamble[2] == 0xA5) & + (preamble[1] == 0x5A) & + (preamble[0] == 0xA5) & + sink.stb, NextState("RECEIVE_HEADER") ), sink.ack.eq(1),