From: Cesar Strauss <cestrauss@gmail.com>
Date: Sat, 9 Jan 2021 17:29:53 +0000 (-0300)
Subject: Use the correct class name
X-Git-Tag: ls180-24jan2020~18
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ce423cf8cdef107d41134b4b6accb0e976e5dec2;p=ieee754fpu.git

Use the correct class name
---

diff --git a/src/ieee754/part_cmp/formal/proof_partitioned_eq_gt_ge.py b/src/ieee754/part_cmp/formal/proof_partitioned_eq_gt_ge.py
index 9e906353..ed000b42 100644
--- a/src/ieee754/part_cmp/formal/proof_partitioned_eq_gt_ge.py
+++ b/src/ieee754/part_cmp/formal/proof_partitioned_eq_gt_ge.py
@@ -33,7 +33,7 @@ class Driver(Elaboratable):
         # instantiate the DUT
         m.submodules.dut = dut = PartitionedEqGtGe(width, points)
         # post-process the output to ripple the LSB
-        # TODO: remove this once PartitionedEq is conformant
+        # TODO: remove this once PartitionedEqGtGe is conformant
         m.submodules.ripple = ripple = RippleLSB(mwidth)
         comb += ripple.results_in.eq(dut.output)
         comb += ripple.gates.eq(gates)
@@ -48,7 +48,7 @@ class Driver(Elaboratable):
         p_b = Signal(width)
         for pos in range(mwidth):
             with m.If(p_offset == pos):
-                # TODO: change to dut.output once PartitionedEq is conformant
+                # TODO: change to dut.output once PartitionedEqGtGe is conformant
                 comb += p_output.eq(ripple.output[pos:])
                 comb += p_a.eq(dut.a[pos * step:])
                 comb += p_b.eq(dut.b[pos * step:])